The IMX8MPDS Table 37 [1] shows that the max SPI master read frequency
depends on the pins the interface is muxed behind with ECSPI2
muxed behind ECSPI2 supporting up to 25MHz.
Adjust the spi-max-frequency based on these findings.
[1] https://www.nxp.com/webapp/Download?colCode=IMX8MPIEC
Fixes: 531936b218 ("arm64: dts: imx8mp-venice-gw74xx: update to revB PCB")
Cc: stable@vger.kernel.org
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The IMX8MPDS Table 37 [1] shows that the max SPI master read frequency
depends on the pins the interface is muxed behind with ECSPI2
muxed behind ECSPI2 supporting up to 25MHz.
Adjust the spi-max-frequency based on these findings.
[1] https://www.nxp.com/webapp/Download?colCode=IMX8MPIEC
Fixes: 2b3ab9d81a ("arm64: dts: imx8mp-venice-gw73xx: add TPM device")
Cc: stable@vger.kernel.org
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The IMX8MPDS Table 37 [1] shows that the max SPI master read frequency
depends on the pins the interface is muxed behind with ECSPI2
muxed behind ECSPI2 supporting up to 25MHz.
Adjust the spi-max-frequency based on these findings.
[1] https://www.nxp.com/webapp/Download?colCode=IMX8MPIEC
Fixes: 5016f22028 ("arm64: dts: imx8mp-venice-gw72xx: add TPM device")
Cc: stable@vger.kernel.org
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
After commit da5dd31efd ("gpio: vf610: Switch to gpio-mmio"),
the vf610 GPIO driver no longer uses the static number 32 for
gc->ngpio. This allows users to configure the number of GPIOs
per port.
And some gpio controllers did have less pads. So add 'ngpios' here,
this can save some memory when request bitmap, and also show user
more accurate information when use gpio tools.
Besides, some gpio controllers have hole in the gpio ranges, so use
'gpio-reserved-ranges' to cover that, then the gpioinfo tool show the
correct result.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT entries for the sm8650 iris decoder.
Since the firmware is required to be signed, only enable
on Qualcomm development boards where the firmware is
available.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250613-topic-sm8x50-upstream-iris-8650-dt-v4-1-35ea7952f2d2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This dts adds support for BQ Aquaris X5 Plus (Longcheer L9360) released
in 2016.
Add a device tree with initial support for:
- GPIO keys
- NFC
- SDHCI
- Status LED
- Touchscreen
Signed-off-by: André Apitzsch <git@apitzsch.eu>
Link: https://lore.kernel.org/r/20250615-bqx5plus-v2-4-72b45c84237d@apitzsch.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The blsp_dma controller is shared between the different subsystems,
which is why it is already initialized by the firmware. We should not
reinitialize it from Linux to avoid potential other users of the DMA
engine to misbehave.
In mainline this can be described using the "qcom,controlled-remotely"
property. In the downstream/vendor kernel from Qualcomm there is an
opposite "qcom,managed-locally" property. This property is *not* set
for the qcom,sps-dma@7884000 and qcom,sps-dma@7ac4000 [1] so adding
"qcom,controlled-remotely" upstream matches the behavior of the
downstream/vendor kernel.
Adding this fixes booting Longcheer L9360.
[1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/blob/LA.BR.1.3.7.c26/arch/arm/boot/dts/qcom/msm8976.dtsi#L1149-1163
Fixes: 0484d3ce09 ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: André Apitzsch <git@apitzsch.eu>
Link: https://lore.kernel.org/r/20250615-bqx5plus-v2-1-72b45c84237d@apitzsch.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
In preparation for switching to the architected timer as the primary
clockevents device, mark the cpuidle nodes with the 'local-timer-stop'
property to indicate that an alternative clockevents device must be
used for waking up from the "c2" idle state.
Signed-off-by: Will Deacon <willdeacon@google.com>
[Original commit from a896fd9863]
Signed-off-by: Will McVicker <willmcvicker@google.com>
Reviewed-by: Youngmin Nam <youngmin.nam@samsung.com>
Tested-by: Youngmin Nam <youngmin.nam@samsung.com>
Fixes: ea89fdf24f ("arm64: dts: exynos: google: Add initial Google gs101 SoC support")
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250611-gs101-cpuidle-v2-1-4fa811ec404d@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Universal Serial Interface (USI) supports three serial protocol
like uart, i2c and spi. ExynosAutov920 has 18 instances of USI.
Add spi nodes for all the instances.
Signed-off-by: Faraz Ata <faraz.ata@samsung.com>
Link: https://lore.kernel.org/r/20250613062208.978641-1-faraz.ata@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add support for the camera subsystem on the SM8550 Qualcomm SoC. This
includes bringing up the CSIPHY, CSID, VFE/RDI interfaces.
SM8550 provides
- 3 x VFE, 3 RDI per VFE
- 2 x VFE Lite, 4 RDI per VFE
- 3 x CSID
- 2 x CSID Lite
- 8 x CSI PHY
Co-developed-by: Depeng Shao <quic_depengs@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20250612-sm8550-camss-v2-1-ed370124075e@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Disable the CTI device of the camera block to prevent potential NoC errors
during AMBA bus device matching.
The clocks for the Qualcomm Debug Subsystem (QDSS) are managed by aoss_qmp
through a mailbox. However, the camera block resides outside the AP domain,
meaning its QDSS clock cannot be controlled via aoss_qmp.
Fixes: bf46963055 ("arm64: dts: qcom: qcs615: Add coresight nodes")
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250611030003.3801-1-jie.gan@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable all remoteproc nodes on the qcs615-ride board and point to the
appropriate firmware files to allow proper functioning of the remote
processors.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-6-06a7d8bed0b5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add a simple-mfd representing IMEM on QCS615 and define the PIL
relocation info region as its child. The PIL region in IMEM is used to
communicate load addresses of remoteproc to post mortem debug tools, so
that these tools can collect ramdumps.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-4-06a7d8bed0b5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The Shared Memory Point to Point (SMP2P) protocol facilitates
communication of a single 32-bit value between two processors.
Add these two nodes for remoteproc enablement on QCS615 SoC.
Signed-off-by: Kyle Deng <quic_chunkaid@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-3-06a7d8bed0b5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Initial support for Asus Zenbook A14. Particular moddel exists
in X1-26-100, X1P-42-100 (UX3407QA) and X1E-78-100 (UX3407RA).
Mostly similar to other X1-based laptops. Notable differences are:
* Wifi/Bluetooth combo being Qualcomm FastConnect 6900 on UX3407QA
and Qualcomm FastConnect 7800 on UX3407RA
* USB Type-C retimers are Parade PS8833, appear to behave identical
to Parade PS8830
* gpio90 is TZ protected
Working:
* Keyboard
* Touchpad
* NVME
* Lid switch
* Camera LED
* eDP (FHD OLED, SDC420D) with brightness control
* Bluetooth, WiFi (WCN6855)
* USB Type-A port
* USB Type-C ports in USB2/USB3/DP (both orientations)
* aDSP/cDPS firmware loading, battery info
* Sleep/suspend, nothing visibly broken on resume
Out of scope of this series:
* Audio (Speakers/microphones/headphone jack)
* Camera (OmniVision OV02C10)
* HDMI (Parade PS185HDM)
* EC
Add dtsi and create two configurations for UX3407QA, UX3407RA.
Tested on UX3407QA with X1-26-100.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Link: https://lore.kernel.org/r/20250523131605.6624-2-alex.vinarskis@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
We need more than what is currently described, expand the region to its
actual boundaries.
Fixes: ede638c42c ("arm64: dts: qcom: sc7180: Add IMEM and pil info regions")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250523-topic-ipa_mem_dts-v1-3-f7aa94fac1ab@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
We need more than what is currently described, expand the region to its
actual boundaries.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Fixes: 948f6161c6 ("arm64: dts: qcom: sdm845: Add IMEM and PIL info region")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250523-topic-ipa_mem_dts-v1-2-f7aa94fac1ab@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
An infinite loop has been created by the Coresight devices. When only a
source device is enabled, the coresight_find_activated_sysfs_sink function
is recursively invoked in an attempt to locate an active sink device,
ultimately leading to a stack overflow and system crash. Therefore, disable
the replicator1 to break the infinite loop and prevent a potential stack
overflow.
replicator1_out -> funnel_swao_in6 -> tmc_etf_swao_in -> tmc_etf_swao_out
| |
replicator1_in replicator_swao_in
| |
replicator0_out1 replicator_swao_out0
| |
replicator0_in funnel_in1_in3
| |
tmc_etf_out <- tmc_etf_in <- funnel_merg_out <- funnel_merg_in1 <- funnel_in1_out
[call trace]
dump_backtrace+0x9c/0x128
show_stack+0x20/0x38
dump_stack_lvl+0x48/0x60
dump_stack+0x18/0x28
panic+0x340/0x3b0
nmi_panic+0x94/0xa0
panic_bad_stack+0x114/0x138
handle_bad_stack+0x34/0xb8
__bad_stack+0x78/0x80
coresight_find_activated_sysfs_sink+0x28/0xa0 [coresight]
coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight]
coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight]
coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight]
coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight]
...
coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight]
coresight_enable_sysfs+0x80/0x2a0 [coresight]
side effect after the change:
Only trace data originating from AOSS can reach the ETF_SWAO and EUD sinks.
Fixes: bf46963055 ("arm64: dts: qcom: qcs615: Add coresight nodes")
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250522005016.2148-1-jie.gan@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add the APR node and its associated services required for audio on
the SM6350 SoC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250321-sm6350-apr-v1-1-7805ce7b4dcf@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable video nodes on the sa8775p-ride board and point to the
appropriate firmware files.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Link: https://lore.kernel.org/r/20250421-dtbinding-v5-3-363c1c05bc80@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add OPP tables required to scale DDR and L3 per freq-domain
on SA8775P platform.
If a single OPP table is used for both CPU domains, then
_allocate_opp_table() won't be invoked for CPU4 but instead
CPU4 will be added as device under the CPU0 OPP table. Due
to this, dev_pm_opp_of_find_icc_paths() won't be invoked for
CPU4 device and hence CPU4 won't be able to independently scale
it's interconnects. Both CPU0 and CPU4 devices will scale the
same ICC path which can lead to one device overwriting the BW
vote placed by other device. Hence CPU0 and CPU4 require separate
OPP tables to allow independent scaling of DDR and L3 frequencies
for each CPU domain, with the final DDR and L3 frequencies being
an aggregate of both.
Co-developed-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250415095343.32125-8-quic_rlaggysh@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add Epoch Subsystem (EPSS) L3 interconnect provider node on SA8775P
SoCs. L3 instances on this SoC are same as SM8250 and SC7280 SoCs.
These SoCs use EPSS_L3_PERF register instead of REG_L3_VOTE register for
programming the perf level. This is taken care in the data associated
with the target specific compatible. Since, the HW is same in the all
SoCs with EPSS support, using the same generic compatible for all.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Link: https://lore.kernel.org/r/20250415095343.32125-7-quic_rlaggysh@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Follow the example of the recently added apq8016-sbc-usb-host.dtso and
convert apq8016-sbc-d3-camera-mezzanine.dts to a DT overlay that can be
applied on top of the apq8016-sbc.dtb. This makes it more clear that
this is not a special type of DB410c but just an addon board that can
be added on top.
Functionally there should not be any difference since
apq8016-sbc-d3-camera-mezzanine.dtb is still generated as before
(but now by applying the overlay on top of apq8016-sbc.dtb).
Since dtc does not know that there are default #address/size-cells in
msm8916.dtsi, repeat those in the overlay to avoid dtc warnings because
it expects the wrong amount of address/size-cells.
It would be nice to have a generic overlay for the D3 camera mezzanine
(that can be applied to all 96Boards) but that's much more complicated
than providing a board-specific DT overlay as intermediate step.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250408-apq8016-sbc-camera-dtso-v1-1-cdf1cd41bda6@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add the WiFi/BT nodes for XPS and describe the regulators for the WCN7850
combo chip using the new power sequencing bindings. All voltages are
derived from chained fixed regulators controlled using a single GPIO.
Based on the commit d09ab685a8 ("arm64: dts: qcom: x1e80100-qcp: Add
WiFi/BT pwrseq").
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Tested-by: Laurentiu Tudor <laurentiu.tudor1@dell.com>
Link: https://lore.kernel.org/r/20250331204610.526672-2-alex.vinarskis@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add QMP handle which is used to send QMP command to always on processor
to populate DDR stats. Add QMP handle for SM8450/SM8550/SM8650/SM8750.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250611-ddr_stats_-v5-3-24b16dd67c9c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
After a change enabling camera clock controller for all Qualcomm SM8250
boards the explicit control of the clock controller status can be removed
from the RB5 vision mezzanine dts overlay file.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250523092313.2625421-2-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable camera clock controller on all Qualcomm SM8250 derived boards
by default due to the established agreement of having all clock
controllers enabled.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250523092313.2625421-1-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Move the {address,size}-cells property from the (disabled) touchbar screen
mipi node inside the dtsi file to the model-specific dts file where it's
enabled to fix the following W=1 warnings:
t8103.dtsi:404.34-433.5: Warning (avoid_unnecessary_addr_size): /soc/dsi@228600000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
t8112.dtsi:419.34-448.5: Warning (avoid_unnecessary_addr_size): /soc/dsi@228600000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
Fixes: 7275e795e5 ("arm64: dts: apple: Add touchbar screen nodes")
Reviewed-by: Janne Grunau <j@jannau.net>
Link: https://lore.kernel.org/r/20250611-display-pipe-mipi-warning-v1-1-bd80ba2c0eea@kernel.org
Signed-off-by: Sven Peter <sven@kernel.org>
Fix the following warning by dropping #{address,size}-cells from the SPI
NOR node which only has a single child node without reg property:
spi1-nvram.dtsi:19.10-38.4: Warning (avoid_unnecessary_addr_size): /soc/spi@235104000/flash@0: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
Fixes: 3febe9de5c ("arm64: dts: apple: Add SPI NOR nvram partition to all devices")
Reviewed-by: Janne Grunau <j@jannau.net>
Link: https://lore.kernel.org/r/20250610-apple-dts-warnings-v1-1-70b53e8108a0@kernel.org
Signed-off-by: Sven Peter <sven@kernel.org>
Starting with commit e6ef4f8ede ("gpio: vf610: make irq_chip immutable")
gpio-vf610 supports locking GPIO being used for IRQ. This already prevents
configuring the GPIO as output, so there is no need for a GPIO hog.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
TQMa9352 is only using LPDDR4X, so the BUCK2 regulator should be fixed
at 600MV.
Fixes: d2858e6bd3 ("arm64: dts: freescale: imx93-tqma9352: Add PMIC node")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add required dt node for CMU_HSI2 block, which
provides clocks to ufs and ethernet IPs
Signed-off-by: Raghav Sharma <raghav.s@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250529112640.1646740-5-raghav.s@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Samsung Galaxy S22+ (SM-S906B), codenamed g0s, is a mobile phone from
2022. It features 8GB RAM, 128/256GB UFS 3.1, Exynos 2200 SoC and a
1080x2340 Dynamic AMOLED display.
This device has an issue where cpu2 and cpu3 fail to come up
consistently, which leads to a hang later in the boot process. Disable
them until the problem is figured out.
This initial device tree configures simple-framebuffer, volume-up key and
usb.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Link: https://lore.kernel.org/r/20250504145907.1728721-4-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Exynos 2200 SoC is an ARMv8 mobile SoC found in the Samsung Galaxy S22
(r0s), S22+ (g0s), S22 Ultra (b0s) Add minimal support for that SoC,
including psci, pmu, chipid, architecture timer and mct, pinctrl,
clocks and usb.
The devices using this SoC suffer from an issue caused by the stock
Samsung bootloader, as it doesn't configure CNTFRQ_EL0. Hence it's
needed to hardcode the adequate frequency in the timer node,
otherwise the kernel panics.
Further platform support will be added over time.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Link: https://lore.kernel.org/r/20250504145907.1728721-3-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
The 8-core SKUs of the X1 family have a different sensor configuration.
Override it to expose what the sensors really measure.
Fixes: f08edb5299 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250520-topic-x1p4_tsens-v2-1-9687b789a4fb@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add device nodes for most of the sound support - WSA884x smart speakers,
WCD9395 audio codec (headset) and sound card - which allows sound
playback via speakers and recording via AMIC microphones. Changes bring
necessary foundation for headset playback/recording via USB, but that
part is not yet ready.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250526-sm8750-audio-part-2-v3-3-74429c686bb1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add device nodes for most of the sound support - WSA883x smart speakers,
WCD9395 audio codec (headset) and sound card - which allows sound
playback via speakers and recording via DMIC microphones. Changes bring
necessary foundation for headset playback/recording via USB, but that
part is not yet ready.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250526-sm8750-audio-part-2-v3-2-74429c686bb1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
At least from Linux, these buses are not in use. Remove them from the dt.
Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250610-hp-x14-v3-2-35d5b50efae0@oldschoolsolutions.biz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The usb_1_1 port doesn't have the PS8830 repeater, but apparently some
MUX for DP altmode control. After a suggestion from sgerhold on
'#aarch64-laptops' I added gpio-sbu-mux nodes from the x1e80100-QCP
tree, and this appears to work well. It is still guesswork, but
working guesswork.
Added and rewired for usb_1_1
Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Link: https://lore.kernel.org/r/20250610-hp-x14-v3-1-35d5b50efae0@oldschoolsolutions.biz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add in the mt8395-genio-1200-evk devicetree the memory regions for the
Audio DSP (ADSP) and Audio Front-End (AFE), and a sound card node
configured to use the ADSP.
This enables audio output through the 3.5mm headphone jacks (speaker or
earphone), available on the board.
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Link: https://lore.kernel.org/r/20250526-mt8395-genio-1200-evk-sound-v1-1-142fb15292c5@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Some MediaTek platforms already reserve a small block of memory for the
audio frontend. These platforms reserve it at a fixed address, though it
is unclear if that is due to hardware access restrictions or simply
compacting the reserved memory blocks together.
Reserve the same size of memory on the MT8192 Asurada family as well, to
align with the other MediaTek-based ChromeOS platforms.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250424102509.1083185-14-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Some MediaTek platforms already reserve a small block of memory for the
audio frontend. These platforms reserve it at a fixed address, though it
is unclear if that is due to hardware access restrictions or simply
compacting the reserved memory blocks together.
Reserve the same size of memory on the MT8186 Corsola family as well, to
align with the other MediaTek-based ChromeOS platforms. This also helps
with memory starvation as these devices sometimes end up in low memory
conditions.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250424102509.1083185-13-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Some MediaTek platforms already reserve a small block of memory for the
audio frontend. These platforms reserve it at a fixed address, though it
is unclear if that is due to hardware access restrictions or simply
compacting the reserved memory blocks together.
Reserve the same size of memory on the MT8183 Kukui & Jacuzzi families
as well, to align with the other MediaTek-based ChromeOS platforms. This
also helps with memory starvation as these devices commonly end up in
low memory conditions.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250424102509.1083185-12-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Some MediaTek platforms already reserve a small block of memory for the
audio frontend. These platforms reserve it at a fixed address, though it
is unclear if that is due to hardware access restrictions or simply
compacting the reserved memory blocks together.
Reserve the same size of memory on the MT8173 as well, to align with the
other platforms. This also helps with memory starvation as these devices
commonly end up in low memory conditions.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250424102509.1083185-11-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Hook up the gpu as a passive cooling device to the thermal zones' alert
trip point just like the cpu.
The gpu here consists of 3D GPU, 2D GPU and NPU.
One way to test would be to set one "alert" trip point low enough
and watch the cooling device state increase:
echo 10000 > /sys/class/thermal/thermal_zone0/trip_point_0_temp
watch cat /sys/class/thermal/cooling_device*/cur_state
And of course set the trip point back to its original value and watch
the cooling device states jump to 0 again.
Signed-off-by: Martin Kepplinger-Novaković <martink@posteo.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
I.MX95 I3C only need two clocks so add clock fix. Add "nxp,imx95-i3c"
compatible string for all imx95 i3c nodes.
Signed-off-by: Carlos Song <carlos.song@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the IRIS video-codec node on QCS8300 platform to support video
functionality.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250501-qcs8300_iris-v7-4-b229d5347990@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add device tree nodes for the DSI0 and DSI1 controllers
with their corresponding PHYs found on Qualcomm SA8775P SoC.
Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
Reviewed-by: Dmitry Baryshkov <lumag@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250604071851.1438612-2-quic_amakhija@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The default interrupt parent is a parent node containing
"#interrupt-cells", so an explicit "interrupt-parent" is not necessary.
Fixes these dtschema warnings:
(arm,gic-400): v2m@70000: 'interrupt-parent' does not match any of the regexes: '^pinctrl-[0-9]+$'
(arm,gic-400): v2m@60000: 'interrupt-parent' does not match any of the regexes: '^pinctrl-[0-9]+$'
(arm,gic-400): v2m@50000: 'interrupt-parent' does not match any of the regexes: '^pinctrl-[0-9]+$'
(arm,gic-400): v2m@40000: 'interrupt-parent' does not match any of the regexes: '^pinctrl-[0-9]+$'
(arm,gic-400): v2m@30000: 'interrupt-parent' does not match any of the regexes: '^pinctrl-[0-9]+$'
(arm,gic-400): v2m@20000: 'interrupt-parent' does not match any of the regexes: '^pinctrl-[0-9]+$'
(arm,gic-400): v2m@10000: 'interrupt-parent' does not match any of the regexes: '^pinctrl-[0-9]+$'
(arm,gic-400): v2m@0: 'interrupt-parent' does not match any of the regexes: '^pinctrl-[0-9]+$'
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250609203705.2852500-1-robh@kernel.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
'global' interrupt is used to receive PCIe controller and link specific
events.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-23-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
'global' interrupt is used to receive PCIe controller and link specific
events.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-22-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
'global' interrupt is used to receive PCIe controller and link specific
events.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-21-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
'global' interrupt is used to receive PCIe controller and link specific
events.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-10-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
'global' interrupt is used to receive PCIe controller and link specific
events.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-8-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
'global' interrupt is used to receive PCIe controller and link specific
events.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-6-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
'global' interrupt is used to receive PCIe controller and link specific
events.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-4-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
'global' interrupt is used to receive PCIe controller and link specific
events.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-2-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On many Qualcomm platforms the PMIC RTC control and time registers are
read-only so that the RTC time can not be updated. Instead an offset
needs be stored in some machine-specific non-volatile memory, which a
driver can take into account.
On platforms where the offset is stored in a Qualcomm specific UEFI
variable the variables are also accessed in a non-standard way, which
means that the OS cannot assume that the variable service is available
by the time the RTC driver probes.
Use the new 'qcom,uefi-rtc-info' property to indicate that the offset is
stored in a UEFI variable so that the OS can determine whether to wait
for it to become available.
Fixes: b53c2c23d3 ("arm64: dts: qcom: x1e80100: enable rtc")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250423075143.11157-5-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On many Qualcomm platforms the PMIC RTC control and time registers are
read-only so that the RTC time can not be updated. Instead an offset
needs be stored in some machine-specific non-volatile memory, which a
driver can take into account.
On platforms where the offset is stored in a Qualcomm specific UEFI
variable the variables are also accessed in a non-standard way, which
means that the OS cannot assume that the variable service is available
by the time the RTC driver probes.
Use the new 'qcom,uefi-rtc-info' property to indicate that the offset is
stored in a UEFI variable so that the OS can determine whether to wait
for it to become available.
Fixes: 409803681a ("arm64: dts: qcom: sc8280xp-x13s: switch to uefi rtc offset")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250423075143.11157-4-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Now that the binding head has been merged, convert the power-domain ids
back to these constants for easier handling.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250510161531.2086706-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add device tree for the Luckfox Omni3576 Carrier Board with Core3576
Module, powered by the Rockchip RK3576 SoC with four Cortex-A72 cores,
four Cortex-A53 cores, and a Mali-G52 MC3 GPU. This initial
implementation enables essential functionality for booting Linux and
basic connectivity.
Supported and tested features:
- UART for serial console
- SD card for storage
- PCIe with NVMe SSD (detected, mounted, and fully functional)
- USB 2.0 host ports
- RK806 PMIC for power management
- RTC with timekeeping and wake-up
- GPIO-controlled LED with heartbeat trigger
- eMMC (enabled, not populated on tested board)
The device tree provides a foundation for further peripheral support, such
as WiFi, MIPI-DSI, HDMI, and Ethernet, in future updates.
Tested on Linux 6.15-rc4
Based on the Luckfox SDK, which derives from Rockchip’s SDK examples, with
relevant changes to align with upstream Linux.
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20250516002713.145026-4-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK3588 GPU power domain cannot be activated unless the external
power regulator is already on. When GPU support was added to this DT,
we had no way to represent this requirement, so `regulator-always-on`
was added to the `vdd_gpu_s0` regulator in order to ensure stability.
A later patch series (see "Fixes:" commit) resolved this shortcoming,
but that commit left the workaround -- and rendered the comment above
it no longer correct.
Remove the workaround to allow the GPU power regulator to power off, now
that the DT includes the necessary information to power it back on
correctly.
Fixes: f94500eb73 ("arm64: dts: rockchip: Add GPU power domain regulator dependency for RK3588")
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250608184855.130206-1-CFSworks@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Pine64 touch panel is a panel consisting of the Feiyang fy07024di26a30d
panel with a Goodix gt911 touch screen. Add a device tree overlay to
allow the display to be easily used on the device.
This was previously included in the main device tree but left disabled
by default which still required rebuilding the DT to use the device, now
overlays can go upstream the overlay is the best way to handle the
add on devices.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
[added the missing v2 to
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2-screen.dtb
^^
rk3399-rockpro64-v2-screen-dtbs := rk3399-rockpro64-v2.dtb \
rk3399-rockpro64-screen.dtbo
dropped address-cells/size-cells from panel node to fix warning about
rk3399-rockpro64-screen.dtso:69.22-84.4: Warning (avoid_unnecessary_addr_size)
/fragment@2/__overlay__/panel@0: unnecessary #address-cells/#size-cells
without "ranges", "dma-ranges" or child "reg" property]
Link: https://lore.kernel.org/r/20250518215944.178582-2-pbrobinson@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable CRU, I2C0 and CSI on RZ/G3E SMARC EVK and tie the CSI to the
OV5645 sensor using Device Tree overlay. RZ/G3E SMARK EVK is a RZ/G2L
alike EVK hence reuse rz-smarc-cru-csi-ov5645.dtsi.
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250514162422.910114-5-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enable device I2C0 node for the RZ SMARC Carrier-II Board and set clock
frequency to 400kHz.
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250514162422.910114-4-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the device tree node for the ARM Mali-G31 GPU found on selected
variants of the Renesas RZ/V2N (R9A09G056) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250514101528.41663-10-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the nine RIIC controllers present on the Renesas RZ/V2N (R9A09G056)
SoC to its DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250514101528.41663-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enable OSTM0-OSTM7 instances in the RZ/V2N EVK device tree so that all
eight OSTM general timers are active and available.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250514101528.41663-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enable SLPI, Sensors DSP on the Lenovo Yoga C630. The DSP boots the
firmware and provides QMI services, however it is of limited
functionality due to the missing fastrpc_shell_1 binary.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250608-c630-slpi-v1-1-72210249e37e@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The fingerprint sensor, hidden in the power button, is connected to one
of the USB multiport ports; while the other port is unused.
Describe the USB controller, the four phys and the repeater involved to
make the fingerprint sensor operational.
Tested-by: Stefan Schmidt <stefan.schmidt@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250605-xps13-fingerprint-v2-1-eebf84c172f2@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Define the RP1 node in an overlay. The inclusion tree is
as follow (the arrow points to the includer):
rp1.dtso
^
|
rp1-common.dtsi ----> rp1-nexus.dtsi
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250529135052.28398-10-andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Add the fully populated DTS for RaspberryPi 5 which includes
the RP1 node definition. The inclusion tree is as follow (the
arrow points to the includer):
rp1-common.dtsi ----> rp1-nexus.dtsi ----> bcm2712-rpi-5-b.dts
^
|
bcm2712-rpi-5-b-ovl-rp1.dts
This is designed to maximize the compatibility with downstream DT
while ensuring that a fully defined DT (one which includes the RP1
node as opposed to load it from overlay at runtime) is present
since early boot stage.
Since the preferred board DT is the fully populated one, name it
bcm2712-rpi-5-b.dts and move the previous one into
bcm2712-rpi-5-b-ovl-rp1.dts.
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Link: https://lore.kernel.org/r/20250529135052.28398-9-andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
The RP1 found on Raspberry Pi 5 board needs an external crystal at 50MHz.
Add clk_rp1_xosc node to provide that.
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250529135052.28398-8-andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
RaspberryPi RP1 is a multi function PCI endpoint device that
exposes several subperipherals via PCI BAR.
Add a dtb overlay that will be compiled into a binary blob
and linked in the RP1 driver.
This overlay offers just minimal support to represent the
RP1 device itself, the sub-peripherals will be added by
future patches.
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250529135052.28398-6-andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
All the BCMBCA SoCs share a set of peripherals at 0xff800000,
albeit at slightly varying memory locations on the bus and
with varying IRQ assignments.
Add the watchdog, GPIO blocks, RNG, LED, second UART and DMA
blocks for the BCM63158 based on the vendor files 63158_map_part.h
and 63158_intr.h from the "bcmopen-consumer" code drop.
The DTSI file has clearly been authored for the B0 revision of
the SoC: there is an earlier A0 version, but this has
the UARTs in the legacy PERF memory space, while the B0
has opened a new peripheral window at 0xff812000 for the
three UARTs. It also has a designated AHB peripheral area
at 0xff810000 where the DMA resides, the peripheral range
window fits these two peripheral groups.
This SoC has up to 256 possible GPIOs due to having 8
registers with 32 GPIOs in each available.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-12-86f97ab4326f@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
All the BCMBCA SoCs share a set of peripherals at 0xff800000,
albeit at slightly varying memory locations on the bus and
with varying IRQ assignments. ARM64 SoCs have additional
peripherals at 0xff858000. Extend the peripheral window range
to 0x400000 and add the DMA controller at offset 0x59000.
Add the watchdog, GPIO blocks, RNG, LED, second UART and DMA
blocks for the BCM6858 based on the vendor files 6858_map_part.h
and 6858_intr.h from the "bcmopen-consumer" code drop.
This SoC has up to 256 possible GPIOs due to having 8
registers with 32 GPIOs in each available.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-11-86f97ab4326f@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
All the BCMBCA SoCs share a set of peripherals at 0xff800000,
albeit at slightly varying memory locations on the bus and
with varying IRQ assignments. ARM64 SoCs have additional
peripherals at 0xff858000. Extend the BCM6856 the PERF window
to 0x400000 and add the DMA block at offset 0x59000.
Add the watchdog, GPIO blocks, RNG, LED, second UART and DMA
blocks for the BCM6856 based on the vendor files 6856_map_part.h
and 6856_intr.h from the "bcmopen-consumer" code drop.
This SoC has up to 256 possible GPIOs due to having 8
registers with 32 GPIOs in each available.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-10-86f97ab4326f@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
All the BCMBCA SoCs share a set of peripherals at 0xff800000,
albeit at slightly varying memory locations on the bus and
with varying IRQ assignments. ARM64 SoCs have additional
peripherals at 0xff858000, we extend the peripheral bus
range to 0x400000 to cover this area.
Add the watchdog, remaining GPIO blocks, RNG, and DMA blocks
for the BCM4908 based on the vendor files 4908_map_part.h
and 4908_intr.h from the "bcmopen-consumer" code drop.
This SoC has up to 320 possible GPIOs due to having 10
registers with 32 GPIOs in each available.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-9-86f97ab4326f@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
The touch panel display is an optional add on for the RockPro64
so this should be an DT overlay, drop the panel options in
preparation to add this as an overlay.
This effectively reverts commit b65155c786 so as to add an
overlay for it.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Link: https://lore.kernel.org/r/20250518215944.178582-1-pbrobinson@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Replace deprecated snps,reset-gpio, snps,reset-active-low, and
snps,reset-delays-us in gmac0 and gmac1 nodes with standard reset-gpios,
reset-assert-us, and reset-deassert-us in rgmii_phy0 and rgmii_phy1 nodes.
Add pinctrl properties to PHY nodes and define gmac0_rst and gmac1_rst in
pinctrl node. Reorder phy-handle for consistency.
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20250520003332.163124-2-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RADXA ROCK 5T is a single board computer quite similar to the ROCK
5B+, except it has one more PCIe-to-Ethernet controller (at the expense
of a USB3 port) and a barrel jack for power input instead. Some pins are
shuffled around as well.
Add a device tree for it.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250520-add-rock5t-v2-4-1f1971850a20@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A few device tree nodes are shared between ROCK 5B and ROCK 5B+ that are
not shared with ROCK 5T.
Move them into their own device tree include.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250520-add-rock5t-v2-3-1f1971850a20@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As subsequent patches will add ROCK 5T support, rename the .dtsi file to
reflect that it's shared between ROCK 5B, ROCK 5B+ and ROCK 5T.
This is done separately from moving the 5B and 5B+ only nodes to a
common tree so that the history stays bisectable and the diff easily
reviewable.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250520-add-rock5t-v2-2-1f1971850a20@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
cd-gpios is used for sdcard detects for sdmmc.
Fixes: 3f5d336d64 ("arm64: dts: rockchip: Add support for rk3588s based board Cool Pi 4B")
Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20250524064223.5741-2-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
cd-gpios is used for sdcard detects for sdmmc.
Fixes: 791c154c39 ("arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB")
Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20250524064223.5741-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The SW_MACHINE_COVER switch event was added to input event codes to
detect the removal of the back cover of the N900.
But on the PineNote its purpose is to detect when the front cover gets
closed, just like when a laptop lid is closed. Therefore SW_LID is the
appropriate linux code and not SW_MACHINE_COVER.
Reported-by: hrdl <git@hrdl.eu>
Helped-by: phantomas <phantomas@phantomas.xyz>
Link: https://lore.kernel.org/r/270f27c9-afd6-171d-7dce-fe1d71dd8f9a@wizzup.org/
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://lore.kernel.org/r/20250526161506.139028-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
For the RK3588 HDMI controller, the falling edge of DDC SDA and SCL
almost coincide and cannot be adjusted by HDMI registrer, resulting
in poor compatibility of DDC communication.
An improvement of the compatibility of DDC can be done by increasing
the driver strength of SCL and decreasing the driver strength of SDA
to increase the slope of the falling edge.
It should be noted that the maximum driving strength of hdmim0_tx1_scl
is only 3, which is different from that of the other IOs.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250522020537.1884771-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
pcie0 already used 0 as its pci-domain, so pcie1 will fail to
allocate the same pci-domain if both of them are used.
rk-pcie 2a210000.pcie: PCIe Link up, LTSSM is 0x130011
rk-pcie 2a210000.pcie: PCIe Gen.2 x1 link up
rk-pcie 2a210000.pcie: Scanning root bridge failed
rk-pcie 2a210000.pcie: failed to initialize host
Fixes: d4b9fc2af4 ("arm64: dts: rockchip: Add rk3576 pcie nodes")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/r/1748918140-212263-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Update the i2c1 bus noting that the unknown/unused device at 0x3c is an
iSmartWare SW2001 "encryption IC".
Based on the documentation I was able to find, this IC appears to be
used to authenticate a device for certain programs to ensure they only
run on authorized devices as a form of digital rights management.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20250604024119.381337-1-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds support for the Ethernet Switch adapter connected to the
mezzanine connector on RK3588 Jaguar.
This adapter has a KSZ9896 Ethernet Switch with 4 1GbE Ethernet
connectors, two user controllable LEDs, and an M12 12-pin connector
which exposes the following signals:
- RS232/RS485 (max 250Kbps/500Kbps, RX pin1, TX pin2)
- two digital inputs (pin4 routed to GPIO3_C5 on SoC, pin5 to GPIO4_B4)
- two digital outputs (pin7 routed to GPIO3_D3 on SoC, pin8 to
GPIO3_D1)
- two analog inputs (pin10 to channel1 of ADS1015, pin11 to channel2)
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
[Andrew's review for gmac1 and switch@5f parts]
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250604-jaguar-mezz-eth-switch-v3-1-c68123240f9e@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable the DSI controller, DSI DCPHY, and Huiling hl055fhav028c
1080x1920 panel for the Gameforce Ace.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Link: https://lore.kernel.org/r/20250603193930.323607-5-macroalpha82@gmail.com
[moved lcd_rst pin into a lcd pinctrl group with lcd_bl_en]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
New support:
- Renesas RZ/V2H(P) dma support for r9a09g057
- Arm DMA-350 driver
- Tegra Tegra264 ADMA support
Updates:
- AMD ptdma driver code removal and optimizations
- Freescale edma error interrupt handler support
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmhBO1YACgkQfBQHDyUj
g0cuMxAAqscuPU17PjJPDy9Fzaq+B3nsZ9JR+Y/M7ifxFJSedJqdaZc7w4OsfGy2
VZIWiSbpK2WrQHLTh/KlE2AeycO0zX5H1vQmYc4GNQn+18cprxj68YHLb05ZskJq
sNVpEI0zZCxrFUgz8TrwdNcDzTC71TdtD2VLqZ6dCYcoi8lWiHPdbzxR/cSpbENb
ysSrAoJy6v92ES2McH3wLAcwuchlC1wFMof9kVVhe3ueZnrtvuBML/fZldKE85qc
dgcm9r1XOdcU3rOBxKQkQq2b0PzeRcUhUNRErqMQVTNs8Vg3N02x2jM214XKNLGt
G/aFac9neun6iJ3H8rXzHEFhO8bInNddCjfv1SBdV0UR2LZHnzHQHz+0Og/HdyGD
kkr3QsU+JzUQe29cHRwDKUR63l5dd+6PgwkWgcxYuauhFNRFpxdlosepmWZWZ+GE
OVy4D/tWu1acXvorm9ZnIbkg/9anzQJEj78+Y9Tlgh5C59nBINfBtVjTVw9BWDTo
1P9YS3YGdkT49uZu1sust9ug4H9/yifcXY4uXzBdTIYZTt3kNZfncVr3kMkMgAdU
bcm5PvnklIRo+JWd8WftiLQDyF4OWUcf5CG3VVFthIR4Fla+1Wpg41NjQVLvRNzk
Ji/WzLj0Wnzx+QuPyUC3NFKE11IJdB+7hGktfVBHcuQ/W6Vc7bY=
=cu98
-----END PGP SIGNATURE-----
Merge tag 'dmaengine-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul:
"A fairly small update for the dmaengine subsystem. This has a new ARM
dmaengine driver and couple of new device support and few driver
changes:
New support:
- Renesas RZ/V2H(P) dma support for r9a09g057
- Arm DMA-350 driver
- Tegra Tegra264 ADMA support
Updates:
- AMD ptdma driver code removal and optimizations
- Freescale edma error interrupt handler support"
* tag 'dmaengine-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (27 commits)
dmaengine: idxd: Remove unused pointer and macro
arm64: dts: renesas: r9a09g057: Add DMAC nodes
dmaengine: sh: rz-dmac: Add RZ/V2H(P) support
dmaengine: sh: rz-dmac: Allow for multiple DMACs
irqchip/renesas-rzv2h: Add rzv2h_icu_register_dma_req()
dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs
dt-bindings: dma: rz-dmac: Restrict properties for RZ/A1H
dmaengine: idxd: Narrow the restriction on BATCH to ver. 1 only
dmaengine: ti: Add NULL check in udma_probe()
fsldma: Set correct dma_mask based on hw capability
dmaengine: idxd: Check availability of workqueue allocated by idxd wq driver before using
dmaengine: xilinx_dma: Set dma_device directions
dmaengine: tegra210-adma: Add Tegra264 support
dt-bindings: Document Tegra264 ADMA support
dmaengine: dw-edma: Add HDMA NATIVE map check
dmaegnine: fsl-edma: add edma error interrupt handler
dt-bindings: dma: fsl-edma: increase maxItems of interrupts and interrupt-names
dmaengine: ARM_DMA350 should depend on ARM/ARM64
dt-bindings: dma: qcom,bam: Document dma-coherent property
dmaengine: Add Arm DMA-350 driver
...
semaphore" from Lance Yang enhances the hung task detector. The
detector presently dumps the blocking tasks's stack when it is blocked
on a mutex. Lance's series extends this to semaphores.
- The 2 patch series "nilfs2: improve sanity checks in dirty state
propagation" from Wentao Liang addresses a couple of minor flaws in
nilfs2.
- The 2 patch series "scripts/gdb: Fixes related to lx_per_cpu()" from
Illia Ostapyshyn fixes a couple of issues in the gdb scripts.
- The 9 patch series "Support kdump with LUKS encryption by reusing LUKS
volume keys" from Coiby Xu addresses a usability problem with kdump.
When the dump device is LUKS-encrypted, the kdump kernel may not have
the keys to the encrypted filesystem. A full writeup of this is in the
series [0/N] cover letter.
- The 2 patch series "sysfs: add counters for lockups and stalls" from
Max Kellermann adds /sys/kernel/hardlockup_count and
/sys/kernel/hardlockup_count and /sys/kernel/rcu_stall_count.
- The 3 patch series "fork: Page operation cleanups in the fork code"
from Pasha Tatashin implements a number of code cleanups in fork.c.
- The 3 patch series "scripts/gdb/symbols: determine KASLR offset on
s390 during early boot" from Ilya Leoshkevich fixes some s390 issues in
the gdb scripts.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQTTMBEPP41GrTpTJgfdBJ7gKXxAjgUCaDuCvQAKCRDdBJ7gKXxA
jrkxAQCnFAp/uK9ckkbN4nfpJ0+OMY36C+A+dawSDtuRsIkXBAEAq3e6MNAUdg5W
Ca0cXdgSIq1Op7ZKEA+66Km6Rfvfow8=
=g45L
-----END PGP SIGNATURE-----
Merge tag 'mm-nonmm-stable-2025-05-31-15-28' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm
Pull non-MM updates from Andrew Morton:
- "hung_task: extend blocking task stacktrace dump to semaphore" from
Lance Yang enhances the hung task detector.
The detector presently dumps the blocking tasks's stack when it is
blocked on a mutex. Lance's series extends this to semaphores
- "nilfs2: improve sanity checks in dirty state propagation" from
Wentao Liang addresses a couple of minor flaws in nilfs2
- "scripts/gdb: Fixes related to lx_per_cpu()" from Illia Ostapyshyn
fixes a couple of issues in the gdb scripts
- "Support kdump with LUKS encryption by reusing LUKS volume keys" from
Coiby Xu addresses a usability problem with kdump.
When the dump device is LUKS-encrypted, the kdump kernel may not have
the keys to the encrypted filesystem. A full writeup of this is in
the series [0/N] cover letter
- "sysfs: add counters for lockups and stalls" from Max Kellermann adds
/sys/kernel/hardlockup_count and /sys/kernel/hardlockup_count and
/sys/kernel/rcu_stall_count
- "fork: Page operation cleanups in the fork code" from Pasha Tatashin
implements a number of code cleanups in fork.c
- "scripts/gdb/symbols: determine KASLR offset on s390 during early
boot" from Ilya Leoshkevich fixes some s390 issues in the gdb
scripts
* tag 'mm-nonmm-stable-2025-05-31-15-28' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (67 commits)
llist: make llist_add_batch() a static inline
delayacct: remove redundant code and adjust indentation
squashfs: add optional full compressed block caching
crash_dump, nvme: select CONFIGFS_FS as built-in
scripts/gdb/symbols: determine KASLR offset on s390 during early boot
scripts/gdb/symbols: factor out pagination_off()
scripts/gdb/symbols: factor out get_vmlinux()
kernel/panic.c: format kernel-doc comments
mailmap: update and consolidate Casey Connolly's name and email
nilfs2: remove wbc->for_reclaim handling
fork: define a local GFP_VMAP_STACK
fork: check charging success before zeroing stack
fork: clean-up naming of vm_stack/vm_struct variables in vmap stacks code
fork: clean-up ifdef logic around stack allocation
kernel/rcu/tree_stall: add /sys/kernel/rcu_stall_count
kernel/watchdog: add /sys/kernel/{hard,soft}lockup_count
x86/crash: make the page that stores the dm crypt keys inaccessible
x86/crash: pass dm crypt keys to kdump kernel
Revert "x86/mm: Remove unused __set_memory_prot()"
crash_dump: retrieve dm crypt keys in kdump kernel
...
There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straig reuses of the existing
chip in a new package:
- RK3562 is a new chip based on the old Cortex-A53 core, apparently
a low-cost version of the Cortex-A55 based RK3568/RK3566.
- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.
- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2 family
- Amlogic S6/S7/S7D
- Samsung Exynos7870 is an older chip similar to Exynos7885
- WonderMedia wm8950 is a minor variation on the wm8850 chip
- Amlogic s805y is almost idential to s805x
- Allwinner A523 is similar to A527 and T527
- Qualcomm MSM8926 is a variant of MSM8226
- Qualcomm Snapdragon X1P42100 is related to R1E80100
There are also 65 boards, including reference designs for the chips
above, this includes
- 12 new boards based on TI K3 series chips, most of them from
Toradex
- 10 devices using Rockchips RK35xx and PX30 chips
- 2 phones and 2 laptops based on Qualcomm Snapdragon designs
- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses
- 3 Samsung Galaxy phones based on Exynos7870
- 5 Allwinner based boards using a variety of ARMv8 chips
- 9 32-bit machines, each based on a different SoC family
Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmg5zYMACgkQmmx57+YA
GNl1Ag/8CX35g42Gwxyr2X8wit+O2eU0axGoxM+SD1cmIcSnutZjMGu17lDGduOO
8FC524yLE6Z9HxAUa2/cd+5fOiJcsd6Ggi5WXEFc+dHz0+P5End2DNsdIANbGcFU
OAhCpuSB63/Mb5dcecoUULw+LIXIBffwt3FCJ0AaXFDi4RvWr0WatzQxHk/G63ci
IoE5pAs/6W9mFvQ5R8Kt4jKISy1zF3JgqOmzy+JIsczPHlyMsbFosZRDxBWMRDza
PenoULO/RSe3k37PGe8XCU1sja0lSCVEeJINUB11mSVGoIKRZ9Wxf57O9J81cEqF
8HiqQ58vA/HpStPKfWZV3rXSlc3U3XGUj0lbG4iUSIOE4gMKnjWbPVuBTrr5mYsc
cJ1pnzbZ0gbylufeS088GkCCKY/ej40aH0vLeoXEHwGh9LoWudI2xMrTJgwX5AlM
H+X9kmP+JaC/woMmY7fr9XpMYuggraIMvDzI1j3qfohGnAUFCG7kh2IvfqkLNAEM
o2dJkI/r/PY+fPeHBPw6EvsP6ZJhcorczwB7CxVEYJ8fqKOOunATs+aECa6HLPpv
toh86d9rnKUrR9+hbuxacx5xxE/YT30muzh66lnV2p1rCS1RJcnzhAkFzeFNJEXf
lpNLMauW1D3Elmk/qawKIxICazeuh4NJyQtNfdrCt/9hEpnmmeM=
=ewvq
-----END PGP SIGNATURE-----
Merge tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straight reuses of the existing chip
in a new package:
- RK3562 is a new chip based on the old Cortex-A53 core, apparently a
low-cost version of the Cortex-A55 based RK3568/RK3566.
- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.
- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2
family
- Amlogic S6/S7/S7D
- Samsung Exynos7870 is an older chip similar to Exynos7885
- WonderMedia wm8950 is a minor variation on the wm8850 chip
- Amlogic s805y is almost idential to s805x
- Allwinner A523 is similar to A527 and T527
- Qualcomm MSM8926 is a variant of MSM8226
- Qualcomm Snapdragon X1P42100 is related to R1E80100
There are also 65 boards, including reference designs for the chips
above, this includes
- 12 new boards based on TI K3 series chips, most of them from
Toradex
- 10 devices using Rockchips RK35xx and PX30 chips
- 2 phones and 2 laptops based on Qualcomm Snapdragon designs
- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses
- 3 Samsung Galaxy phones based on Exynos7870
- 5 Allwinner based boards using a variety of ARMv8 chips
- 9 32-bit machines, each based on a different SoC family
Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets"
* tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (956 commits)
MAINTAINERS, mailmap: update Sven Peter's email address
arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency
arm64: dts: nuvoton: Add pinctrl
ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
arm64: dts: blaize-blzp1600: Enable GPIO support
dt-bindings: clock: socfpga: convert to yaml
arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3562 pcie unit addresses
arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node
arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi
arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3576 pcie unit addresses
arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
arm64: dts: rockchip: Add missing SFC power-domains to rk3576
Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"
arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes
arm64: dts: mt6359: Rename RTC node to match binding expectations
arm64: dts: mt8365-evk: Add goodix touchscreen support
arm64: dts: mediatek: mt8188: Add missing #reset-cells property
arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board
...
new drivers:
- bring in the asahi uapi header standalone
- nova-drm: stub driver
rust dependencies (for nova-core):
- auxiliary
- bus abstractions
- driver registration
- sample driver
- devres changes from driver-core
- revocable changes
core:
- add Apple fourcc modifiers
- add virtio capset definitions
- extend EXPORT_SYNC_FILE for timeline syncobjs
- convert to devm_platform_ioremap_resource
- refactor shmem helper page pinning
- DP powerup/down link helpers
- remove disgusting turds
- extended %p4cc in vsprintf.c to support fourcc prints
- change vsprintf %p4cn to %p4chR, remove %p4cn
- Add drm_file_err function
- IN_FORMATS_ASYNC property
- move sitronix from tiny to their own subdir
rust:
- add drm core infrastructure rust abstractions
(device/driver, ioctl, file, gem)
dma-buf:
- adjust sg handling to not cache map on attach
- allow setting dma-device for import
- Add a helper to sort and deduplicate dma_fence arrays
docs:
- updated drm scheduler docs
- fbdev todo update
- fb rendering
- actual brightness
ttm:
- fix delayed destroy resv object
bridge:
- add kunit tests
- convert tc358775 to atomic
- convert drivers to devm_drm_bridge_alloc
- convert rk3066_hdmi to bridge driver
scheduler:
- add kunit tests
panel:
- refcount panels to improve lifetime handling
- Powertip PH128800T004-ZZA01
- NLT NL13676BC25-03F, Tianma TM070JDHG34-00
- Himax HX8279/HX8279-D DDIC
- Visionox G2647FB105
- Sitronix ST7571
- ZOTAC rotation quirk
vkms:
- allow attaching more displays
i915:
- xe3lpd display updates
- vrr refactor
- intel_display struct conversions
- xe2hpd memory type identification
- add link rate/count to i915_display_info
- cleanup VGA plane handling
- refactor HDCP GSC
- fix SLPC wait boosting reference counting
- add 20ms delay to engine reset
- fix fence release on early probe errors
xe:
- SRIOV updates
- BMG PCI ID update
- support separate firmware for each GT
- SVM fix, prelim SVM multi-device work
- export fan speed
- temp disable d3cold on BMG
- backup VRAM in PM notifier instead of suspend/freeze
- update xe_ttm_access_memory to use GPU for non-visible access
- fix guc_info debugfs for VFs
- use copy_from_user instead of __copy_from_user
- append PCIe gen5 limitations to xe_firmware document
amdgpu:
- DSC cleanup
- DC Scaling updates
- Fused I2C-over-AUX updates
- DMUB updates
- Use drm_file_err in amdgpu
- Enforce isolation updates
- Use new dma_fence helpers
- USERQ fixes
- Documentation updates
- SR-IOV updates
- RAS updates
- PSP 12 cleanups
- GC 9.5 updates
- SMU 13.x updates
- VCN / JPEG SR-IOV updates
amdkfd:
- Update error messages for SDMA
- Userptr updates
- XNACK fixes
radeon:
- CIK doorbell cleanup
nouveau:
- add support for NVIDIA r570 GSP firmware
- enable Hopper/Blackwell support
nova-core:
- fix task list
- register definition infrastructure
- move firmware into own rust module
- register auxiliary device for nova-drm
nova-drm:
- initial driver skeleton
msm:
- GPU:
- ACD (adaptive clock distribution) for X1-85
- drop fictional address_space_size
- improve GMU HFI response time out robustness
- fix crash when throttling during boot
- DPU:
- use single CTL path for flushing on DPU 5.x+
- improve SSPP allocation code for better sharing
- Enabled SmartDMA on SM8150, SC8180X, SC8280XP, SM8550
- Added SAR2130P support
- Disabled DSC support on MSM8937, MSM8917, MSM8953, SDM660
- DP:
- switch to new audio helpers
- better LTTPR handling
- DSI:
- Added support for SA8775P
- Added SAR2130P support
- HDMI:
- Switched to use new helpers for ACR data
- Fixed old standing issue of HPD not working in some cases
amdxdna:
- add dma-buf support
- allow empty command submits
renesas:
- add dma-buf support
- add zpos, alpha, blend support
panthor:
- fail properly for NO_MMAP bos
- add SET_LABEL ioctl
- debugfs BO dumping support
imagination:
- update DT bindings
- support TI AM68 GPU
hibmc:
- improve interrupt handling and HPD support
virtio:
- add panic handler support
rockchip:
- add RK3588 support
- add DP AUX bus panel support
ivpu:
- add heartbeat based hangcheck
mediatek:
- prepares support for MT8195/99 HDMIv2/DDCv2
anx7625:
- improve HPD
tegra:
- speed up firmware loading
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmg2aVAACgkQDHTzWXnE
hr6DjhAApr2fZjugU3EmpsARdcIWgEd+X65R97ef7RlUGqBKm2joSwZGOhH0oBsG
9WyO92Qzu6XMe8OibKqY4D2hir9UPz5v+uEWe3q9CzZGbNyAwyVRjVkaKpnI9upv
1dmHFI7HgPu6qbz6RfPIfgALBLXvVXMaQ4+ZgN/cLtZFa+OLAV5ByqWsRPPXZFb0
F/pQGQ4ursglfA+LH3SVPfnTN53lu93IlM5/Os9OQQGj+44w94zQ6DCm7CY1AugH
n+RM/0Yv7WaoF1ByeOtq4FcrmLRrd+ozsvITbRZqhOx7zS/mhP8LRzAwgKWOYzSh
puKunyQiSdHR7FSqSi8uyY3YumcLWNa/17LMKoTf+KqweJbKGE7RVBuFBn6WUdPb
AYHZrSB4USAeyahdrrsU+q7ltu5urs5ckpbXsRurMiaUz/BLim1PIm3N5FDLPY7B
PD1n1FcMUv3CmJT5Y+aNIQgmf1/dETESRTSAgSoOo3gNp6jdRCYqSuWIBsppibWT
26+tyz0/FGhE50QviHzg0Sv+jd/g93fN6snNlV8wNFMviq3bC69Toa+y3qJ5e7UC
/42R7nCWdkCZJfr6E67rOaahe9TDV/LXLqPErwptOkdK8sMchaIgF+deybgTtTi/
zGRBfjLvb5ocYBmPbeGX4mtXNRpyZ3o9I0QUyGUO4zMwFXmFwn0=
=jpVr
-----END PGP SIGNATURE-----
Merge tag 'drm-next-2025-05-28' of https://gitlab.freedesktop.org/drm/kernel
Pull drm updates from Dave Airlie:
"As part of building up nova-core/nova-drm pieces we've brought in some
rust abstractions through this tree, aux bus being the main one, with
devres changes also in the driver-core tree. Along with the drm core
abstractions and enough nova-core/nova-drm to use them. This is still
all stub work under construction, to build the nova driver upstream.
The other big NVIDIA related one is nouveau adds support for
Hopper/Blackwell GPUs, this required a new GSP firmware update to
570.144, and a bunch of rework in order to support multiple fw
interfaces.
There is also the introduction of an asahi uapi header file as a
precursor to getting the real driver in later, but to unblock
userspace mesa packages while the driver is trapped behind rust
enablement.
Otherwise it's the usual mixture of stuff all over, amdgpu, i915/xe,
and msm being the main ones, and some changes to vsprintf.
new drivers:
- bring in the asahi uapi header standalone
- nova-drm: stub driver
rust dependencies (for nova-core):
- auxiliary
- bus abstractions
- driver registration
- sample driver
- devres changes from driver-core
- revocable changes
core:
- add Apple fourcc modifiers
- add virtio capset definitions
- extend EXPORT_SYNC_FILE for timeline syncobjs
- convert to devm_platform_ioremap_resource
- refactor shmem helper page pinning
- DP powerup/down link helpers
- extended %p4cc in vsprintf.c to support fourcc prints
- change vsprintf %p4cn to %p4chR, remove %p4cn
- Add drm_file_err function
- IN_FORMATS_ASYNC property
- move sitronix from tiny to their own subdir
rust:
- add drm core infrastructure rust abstractions
(device/driver, ioctl, file, gem)
dma-buf:
- adjust sg handling to not cache map on attach
- allow setting dma-device for import
- Add a helper to sort and deduplicate dma_fence arrays
docs:
- updated drm scheduler docs
- fbdev todo update
- fb rendering
- actual brightness
ttm:
- fix delayed destroy resv object
bridge:
- add kunit tests
- convert tc358775 to atomic
- convert drivers to devm_drm_bridge_alloc
- convert rk3066_hdmi to bridge driver
scheduler:
- add kunit tests
panel:
- refcount panels to improve lifetime handling
- Powertip PH128800T004-ZZA01
- NLT NL13676BC25-03F, Tianma TM070JDHG34-00
- Himax HX8279/HX8279-D DDIC
- Visionox G2647FB105
- Sitronix ST7571
- ZOTAC rotation quirk
vkms:
- allow attaching more displays
i915:
- xe3lpd display updates
- vrr refactor
- intel_display struct conversions
- xe2hpd memory type identification
- add link rate/count to i915_display_info
- cleanup VGA plane handling
- refactor HDCP GSC
- fix SLPC wait boosting reference counting
- add 20ms delay to engine reset
- fix fence release on early probe errors
xe:
- SRIOV updates
- BMG PCI ID update
- support separate firmware for each GT
- SVM fix, prelim SVM multi-device work
- export fan speed
- temp disable d3cold on BMG
- backup VRAM in PM notifier instead of suspend/freeze
- update xe_ttm_access_memory to use GPU for non-visible access
- fix guc_info debugfs for VFs
- use copy_from_user instead of __copy_from_user
- append PCIe gen5 limitations to xe_firmware document
amdgpu:
- DSC cleanup
- DC Scaling updates
- Fused I2C-over-AUX updates
- DMUB updates
- Use drm_file_err in amdgpu
- Enforce isolation updates
- Use new dma_fence helpers
- USERQ fixes
- Documentation updates
- SR-IOV updates
- RAS updates
- PSP 12 cleanups
- GC 9.5 updates
- SMU 13.x updates
- VCN / JPEG SR-IOV updates
amdkfd:
- Update error messages for SDMA
- Userptr updates
- XNACK fixes
radeon:
- CIK doorbell cleanup
nouveau:
- add support for NVIDIA r570 GSP firmware
- enable Hopper/Blackwell support
nova-core:
- fix task list
- register definition infrastructure
- move firmware into own rust module
- register auxiliary device for nova-drm
nova-drm:
- initial driver skeleton
msm:
- GPU:
- ACD (adaptive clock distribution) for X1-85
- drop fictional address_space_size
- improve GMU HFI response time out robustness
- fix crash when throttling during boot
- DPU:
- use single CTL path for flushing on DPU 5.x+
- improve SSPP allocation code for better sharing
- Enabled SmartDMA on SM8150, SC8180X, SC8280XP, SM8550
- Added SAR2130P support
- Disabled DSC support on MSM8937, MSM8917, MSM8953, SDM660
- DP:
- switch to new audio helpers
- better LTTPR handling
- DSI:
- Added support for SA8775P
- Added SAR2130P support
- HDMI:
- Switched to use new helpers for ACR data
- Fixed old standing issue of HPD not working in some cases
amdxdna:
- add dma-buf support
- allow empty command submits
renesas:
- add dma-buf support
- add zpos, alpha, blend support
panthor:
- fail properly for NO_MMAP bos
- add SET_LABEL ioctl
- debugfs BO dumping support
imagination:
- update DT bindings
- support TI AM68 GPU
hibmc:
- improve interrupt handling and HPD support
virtio:
- add panic handler support
rockchip:
- add RK3588 support
- add DP AUX bus panel support
ivpu:
- add heartbeat based hangcheck
mediatek:
- prepares support for MT8195/99 HDMIv2/DDCv2
anx7625:
- improve HPD
tegra:
- speed up firmware loading
* tag 'drm-next-2025-05-28' of https://gitlab.freedesktop.org/drm/kernel: (1627 commits)
drm/nouveau/tegra: Fix error pointer vs NULL return in nvkm_device_tegra_resource_addr()
drm/xe: Default auto_link_downgrade status to false
drm/xe/guc: Make creation of SLPC debugfs files conditional
drm/i915/display: Add check for alloc_ordered_workqueue() and alloc_workqueue()
drm/i915/dp_mst: Work around Thunderbolt sink disconnect after SINK_COUNT_ESI read
drm/i915/ptl: Use everywhere the correct DDI port clock select mask
drm/nouveau/kms: add support for GB20x
drm/dp: add option to disable zero sized address only transactions.
drm/nouveau: add support for GB20x
drm/nouveau/gsp: add hal for fifo.chan.doorbell_handle
drm/nouveau: add support for GB10x
drm/nouveau/gf100-: track chan progress with non-WFI semaphore release
drm/nouveau/nv50-: separate CHANNEL_GPFIFO handling out from CHANNEL_DMA
drm/nouveau: add helper functions for allocating pinned/cpu-mapped bos
drm/nouveau: add support for GH100
drm/nouveau: improve handling of 64-bit BARs
drm/nouveau/gv100-: switch to volta semaphore methods
drm/nouveau/gsp: support deeper page tables in COPY_SERVER_RESERVED_PDES
drm/nouveau/gsp: init client VMMs with NV0080_CTRL_DMA_SET_PAGE_DIRECTORY
drm/nouveau/gsp: fetch level shift and PDE from BAR2 VMM
...
Lower the I2C2 bus clock frequency on the RZ/G3E SMARC SoM from 1MHz to
400kHz to improve compatibility with a wider range of I2C peripherals.
As the GreenPAK device is programmed to operate at 400kHz, the previous
1MHz setting was too aggressive, causing it to experience timing issues.
Fixes: f7a98e256e ("arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol")
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250518220812.1480696-1-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Few updates to the Arm FVP(Fixed Virtual Platform) device tree, enhancing
support for system tracing, power management, and firmware coexistence:
1. ETE and TRBE support
Adds CoreSight ETE and TRBE nodes for the FVP Rev C model. These are
disabled by default as they need to be enabled explicitly via model
parameters.
2. CPU idle states and system timer for idle broadcast
Introduces CPU idle state definitions but disabled by default due to
potential performance impact on the model. Also adds a system-level
broadcast timer for use when CPUs enter deep idle states where local
timers stop.
3. Firmware memory reservation
Reserves 64MB at the end of the first DRAM bank to prevent conflicts
with FF-A firmware or similar configurations that rely on this region.
4. Drop the unnecessary clock-frequency property in the timer nodes
The boot/secure firmware must configure the timer clock frequency and
the non-secure OS must be able to read the same. The clock-frequency is
generally used when the firmware is broken which is not the case on
most of the fast models and Juno platform.
As noted above some of the changes are disabled by default where applicable
to ensure backward compatibility and avoid unintended performance impact
on platforms using default model parameters.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmgiNcUACgkQAEG6vDF+
4pi4pA/9EoZFtzrkCmdEYvXeXwe8rkxUukR+kt8inwbZ1ES+BnaAop4qBWDfTQt/
0d2B3jWy5PBtVSqmSVOnqJromiKMwvWCrmg7bHMz8yMaP8xGduuAcOpUgqX5eXmo
VO/F3as9BXVYGQBSn4JqpHTpp7Y5WJBYVV+N8CZDABQXfMafDEXAxqiBEXGoTaiZ
lECMNzTo5WLnRUL4PrZjIxSGoeh2NApPzoBi5V02G6lWa2Do1WsnKS6/wYAwiSlz
rGkpCYp8g1qA+KxxOh9QUiUOPOndk8NwWH/ldgIUCYOR7C1tTp1ICBvhLNqbA596
pv58Y8MYjX9R22n/MHGjzIXLVxWGm8b7HclDzwMNYt0pWdRrtSRIuf5ltdsbEW4S
wlT5FuVrYUiLeLpGi77hqTlyHaAFS1e+wZJwEu1jcgUW73WAJnh+t6UPRfGtGf4L
yXrVqEZQmABmX/IhYrpe6v623n+gS4qfxzM7Vz5TpzzApY057qbngD2d+ZUFpryt
JuhRLl+pCo/EfMhrYap1QptxLc2Mjh+NkCnlN8D/ExpBevWxEY6vwRIagrmbD1km
lO0T6QWpevahU4Wfl/tiyExW3ciE52RhQ2PlgX30edQKXlZZu5s2RISNYzXRCHmt
cOiU6jVo2HE6iqxXhLgwYycl5rLWJl3FcJmNlXSkBxLWZYHrN10=
=dPTB
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmgvArUACgkQmmx57+YA
GNm4phAAoGrzPSjTSEThKNdD2p9PZ5ZL87b2zcI/SD+DVMsppv8AyOPL36u1YOUE
eianNg/oYOlbGufN2hJyaZJ5it6Zm9vo9GblvBwq5ICc0ogY5uaMqaLUhsRddT5x
FQwv7sWXDtbJRkFYDkiUpNx+a9p82tia8mb941R6EMCjoS5U/h6is5s52P53i/WX
5UUAAbvtkiBV874P8RIbOXnZUEohYvrhs2UKW8pCUbPt7hU7SzDl8dpljNqFxBFF
ZmQfJFCLulfJ1ObfxTu5Ixu6rDJnyDzAYyMXYXHBwzpYZbdDcvBOYKn6kCQMP70C
6MJJvuQCsDy5TL5j19rrGP9EPO0fyLF4BP5giMBmZOUMTbcuJyhkzWucT4cPXeDB
h4XAjPNa6oqeJ3wd+Ak5uxq/J73iLjdTfnahZLWCz5Q5mGfXBvicTWJY+ylqPys9
sJdiVZZGdY287GzKrLKClL7ee9urdqazVdB/3WQUwK8pSJ+5OgC1DJzs0w1VRmgE
HM615IOKKmM5amjJLJbCr370s6OtNQNThZWOJbIVv1YlyTyLaqFglIccGCGdRUfs
h7ptiq+HwRUs7mrGGGOIETyk2tc/OcesDm+BHtTXxZWO76O8uC1mvTDUp810XPnj
8myhcVslEjH+mR0SIbs+m8PNMgAo1l0YyN1YjgINpVbUx0WkiJM=
=oTg4
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
Armv8 Juno/FVP updates for v6.16
Few updates to the Arm FVP(Fixed Virtual Platform) device tree, enhancing
support for system tracing, power management, and firmware coexistence:
1. ETE and TRBE support
Adds CoreSight ETE and TRBE nodes for the FVP Rev C model. These are
disabled by default as they need to be enabled explicitly via model
parameters.
2. CPU idle states and system timer for idle broadcast
Introduces CPU idle state definitions but disabled by default due to
potential performance impact on the model. Also adds a system-level
broadcast timer for use when CPUs enter deep idle states where local
timers stop.
3. Firmware memory reservation
Reserves 64MB at the end of the first DRAM bank to prevent conflicts
with FF-A firmware or similar configurations that rely on this region.
4. Drop the unnecessary clock-frequency property in the timer nodes
The boot/secure firmware must configure the timer clock frequency and
the non-secure OS must be able to read the same. The clock-frequency is
generally used when the firmware is broken which is not the case on
most of the fast models and Juno platform.
As noted above some of the changes are disabled by default where applicable
to ensure backward compatibility and avoid unintended performance impact
on platforms using default model parameters.
* tag 'juno-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: fvp: Add ETE and TRBE nodes for Rev C model
arm64: dts: arm: Drop the clock-frequency property from timer nodes
arm64: dts: fvp: Reserve 64MB for the FF-A firmware in memory map
arm64: dts: fvp: Add CPU idle states for Rev C model
arm64: dts: fvp: Add system timer for broadcast during CPU idle
Link: https://lore.kernel.org/r/20250513143827.3606686-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Support for CPU frequency scaling is enabled on the X Elite platform.
Also on X Elite, support for the HP EliteBook Ultra G1q is introduced.
Support for the QCS6490 RB3gen2 Industrial Mezzanine is also added.
PCIe controllers and PHYs are described and enabled across IPQ5018,
IPQ5332, and IPQ5424. On IPQ9474 the missing MHI register range is
added. The TCSR block is described and used to enable download mode
flags on IPQ5018.
The venus video encoder/decoder is enabled on the MSM8998-based Lenovo
Miix 630 laptop.
The crypto engine is enabled on QCM2290 and QCS615. Bluetooth is enabled
on the QCM2210-based RB1 board.
The Fairphone FP5 gains Displayport sound support.
SAR2130P display nodes are added.
On 8cx Gen3 the sensor remoteproc (SLPI) is introduced and this is
enabled on Lenovo Thinkpad X13s and the CRD.
The SDM845-based Samsung Galaxy S9 gains graphics, modem and initial
sound support.
On SDX75 the QPIC BAM and NAND support is added, and these are enabled
on the IDP board.
LLCC is added for SM8750. SM8550 gains Iris video decoder support.
For X Elite, Lenovo ThinkPad T14s support for the SDX62 modem, as well
as audio headset, is added. ASUS Vivobook S 15 gains Bluetooth support,
Microsoft Surface Laptop 7 models gets support for DP over USB Type-C,
HP Omnibook X 14 gains audio support. The devkit gets the USB multiport
controller and the two USB Type-A ports described.
Additionally a variety of Devicetree fixes are introduced, primarily
identified through binding validation.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmgr6zgVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fy8wP+wYwYDpCg9j4m+ccM9tpgbouZLnd
roVlGEQ56nct4rocKezOo8bJ1I6CIN0gQNpeoJEq5vUfeKb2/k/Olg7s4Bq9eueC
qjHiftP8RcSWF80RALvSmSRN1JbLxTx9JZoK6mnuymbd9OEXI6JuGViNcCBBpy3i
XRVQAAPG2VeHd3oWIXdv0cAhT477nNxHQor6SH/JlrhBG5ShR4KDixcgPBEyWad1
5R8hw7pjjhHWQEUBmGlJA73fWdPMPGWw3yufxFKhn9D1J4he5YBMtCDLeIfEyNgL
0wtHkw6mkKH0H6ewaogjwLB+J1FV/t66QOeI+F8bt3g17yfrbCad2uoIdR1E6SHj
5WVsdjlcdfaQ/YZwLqa8FM7EgoYpoXv56XLCRjDUL84nzvgFjT+yOuHssb110JQX
tM3SFDORFIwXV6Ad5zUH0YPnx3qS5uW9ac7XUH6cM+595P2HlFra4+9u4fQ582Pa
S6VGjTMSP7Esmy3zepcVBrzjl+jwhLPdDFrldj5aVB1EqBWtm2OK8M98ufg6z+/Q
AcPzDafbe8opFO9lf1uGRor1NanLLhsZ3w2wZtyddwjn3bS9v8hZq3UlaPfQz/QL
UU6IW2/qU6QQ94mRFOk2PZIyMZ/lKncAQXHS9B5KwAP9Ch5UCxvul43MVApdRAyT
6fi8GYoEU+HrF/G5
=NTyn
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguUJIACgkQmmx57+YA
GNkYzRAAn9trCzvy27M+Ozu0ZSzbpJtN8vtNOd+/3WERjRtd9Ikpb6vK6CNukc8V
4SgO7IN3MPPRMXm3Vf9t5qJR/MICRb0ZiuMGDkOWGR/pDOc2e/mIKz54XWSLfT0g
11pDKxLLiDK4e8s/NMGNT6ro9fk6fv4JO9Ylk/PdykRQoac7Dko0ArDbQ6w4SZ4x
H18um4z3AJu7lDdwe5XmQjaLzKohMZK//l7Ie3CDbwYitE0EnJAhcgi1GIGUnTd1
j4clArJo8shFeHWvmdhvVGPOFC4vGP76yFcrrrJ/hLGEgKjcvjO1uJAs/Or0WqI2
F4JFdrz2kALH026qeL2CYPYTPvQrtusdko13GZGIKsREbbyrONoHrgVaZ9W/mz84
Ac8pAUSG9mFqrOatGA3LXg7PrKKgVmxZa2qbf86QOM8MO47WFBAeawH00zD8Re/L
1VdYZarLPq+8ZmqTR+bWjAfC+45G4JfbQewl8zZu60Z+82WzesZHhutz/WPiyuqy
OZYjyin7Xxl8kPFH7tRuVnQ0CKtDLCoofi+lP6pDvJCGd694nbNNKJXgWTyI5f9i
2Ac479PxHArbUkNEgi3/d58cg7e6fNoR3qmiCaFghIQZAvDlHWaUXlCFTN3VrehV
NfHOwmgdJCZwnmT+D0Mje/wULlt60uSwmy31k+lpZfAnD4P8D20=
=dAtQ
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
More Qualcomm Arm64 DeviceTree updates for v6.16
Support for CPU frequency scaling is enabled on the X Elite platform.
Also on X Elite, support for the HP EliteBook Ultra G1q is introduced.
Support for the QCS6490 RB3gen2 Industrial Mezzanine is also added.
PCIe controllers and PHYs are described and enabled across IPQ5018,
IPQ5332, and IPQ5424. On IPQ9474 the missing MHI register range is
added. The TCSR block is described and used to enable download mode
flags on IPQ5018.
The venus video encoder/decoder is enabled on the MSM8998-based Lenovo
Miix 630 laptop.
The crypto engine is enabled on QCM2290 and QCS615. Bluetooth is enabled
on the QCM2210-based RB1 board.
The Fairphone FP5 gains Displayport sound support.
SAR2130P display nodes are added.
On 8cx Gen3 the sensor remoteproc (SLPI) is introduced and this is
enabled on Lenovo Thinkpad X13s and the CRD.
The SDM845-based Samsung Galaxy S9 gains graphics, modem and initial
sound support.
On SDX75 the QPIC BAM and NAND support is added, and these are enabled
on the IDP board.
LLCC is added for SM8750. SM8550 gains Iris video decoder support.
For X Elite, Lenovo ThinkPad T14s support for the SDX62 modem, as well
as audio headset, is added. ASUS Vivobook S 15 gains Bluetooth support,
Microsoft Surface Laptop 7 models gets support for DP over USB Type-C,
HP Omnibook X 14 gains audio support. The devkit gets the USB multiport
controller and the two USB Type-A ports described.
Additionally a variety of Devicetree fixes are introduced, primarily
identified through binding validation.
* tag 'qcom-arm64-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (58 commits)
arm64: dts: qcom: sm4450: Add RPMh power domains support
arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: add retimers, dp altmode support
arm64: dts: qcom: ipq5424: Enable PCIe PHYs and controllers
arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodes
arm64: dts: qcom: sc7280: Mark FastRPC context banks as dma-coherent
arm64: dts: qcom: sdx75-idp: Enable QPIC BAM & QPIC NAND support
arm64: dts: qcom: sdx75: Add QPIC NAND support
arm64: dts: qcom: sdx75: Add QPIC BAM support
arm64: dts: qcom: qcm2290: Add crypto engine
arm64: dts: qcom: x1e80100-vivobook-s15: Add bluetooth
arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties
arm64: dts: qcom: qcs615: Fix up UFS clocks
arm64: dts: qcom: sa8775p: Clean up the PSCI PDs
arm64: dts: qcom: msm8996-oneplus: Add SLPI VDD_PX
arm64: dts: qcom: sm6350-pdx213: Wire up USB regulators
arm64: dts: qcom: msm8998-yoshino: Add QUSB2PHY VDD supply
arm64: dts: qcom: msm8998-mtp: Add QUSB2PHY VDD supply
arm64: dts: qcom: msm8998-fxtec: Add QUSB2PHY VDD supply
arm64: dts: qcom: qcs615: Remove disallowed property from AOSS_QMP node
arm64: dts: qcom: msm8998: Remove mdss_hdmi_phy phandle argument
...
Link: https://lore.kernel.org/r/20250520024248.38904-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
New boards:
- Cobra and PP1516 from Theobroma-Systems (build around the PX30)
- Radxa Rock 5B+ (rk3588)
- Rockchip RK3399 industrial eval board
New peripherals:
- GMAC + SDMMC/SDIO on rk3528
- SAI + HDMI-audio on rk3576
Interesting general updates:
- move rk3528 i2c + uart aliases as requested
- rk3568 PCIe3 MSI to use GIC ITS
- update deprecated dwmac reset properties on some px30 boards
- updates for cypress usb hubs on some Theobroma boards
Binding taken with Greg's blessing
https://lore.kernel.org/all/2025051550-polish-prude-ed56@gregkh/
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmgpowIQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgetSB/9Y8zHYt6QdUIjDjbLeniD5cD1mRuSg4vAe
NtpdAMw4ra6mzT5Hv5AMBaKxAHf+4YZau3/v+4fp1Ig4y1l9KoZlupZ5h2lDALJ8
00GABgyhc0r9VsAiuuK3oOokZO5JTsav59ltq4zF6+ZnvjtfxWxiclDHzp+VX3x9
FM58iH81NT/+8G7yIzkdahZRdqDrnSr8mbnsKsMj8V3XjkHjphnOMdi9GCpNwyKy
RM3Fd+bL2yIsPF6YgmXuiXmjnLZEOIz3IklMKDd/EFYf0lIpegtUVogUtAh/+aP9
NM+eqydudyZMipF4exr0wtGI9TZAt1umBDtMmNm/0jAHtZUC9qxN
=fi8d
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTy8ACgkQmmx57+YA
GNnpdA//VngVV9rEeqrXEpF1LeELrilOP0gHIchHPrpnlZ/ZOR44uNqBc3S7YbxS
lkCBgWDUlepCq3JgyrtRnG+Vu7V52mtx/msxsyct3HAnJZb0zpAn77UjnHutu/yX
d0q5TaF9gLDANqaHYtGIjzEJq+7D0HGak6fVLAvFn4NdHGX85MUX5ZLmDi/glzQZ
0lWpVV1YqZudCtIanRp9TfFLuKMegfUm7wVOgDYMrSp1jK+Wh5Mc2dsFtOH2iNpG
DoPd4l5I8Lsq4jmuzzvFVTSsBvyFkNKEFY0x61WSKaIibKHp4g9lGvECzDBdQtIP
Bz1mn+UFYYWYNOYjG2ws84pG3vZ5tbpcxdCxglOBZL1LqTE19T8p5K555mDnxqnt
d+BPuQdbcgKwI3449RHvOhxQDmeKC57GmIe6Q/npAX3pBr8NXJ3NW/rzno1PGMYT
7mHTE06WTr+XLy9JXdvckj6yw9toYkE4/uWxFCKquzFuSWZZTIGmfM+a0Mx6ajb7
1yNbr6Empp6HNaT+l/C2zEBUWfnpXFaVgPKf7ZSlRy80a+czElJLscugtMDJ7O7Q
MlhoKebw524c1Fwtu1zSUkexirBTUTRTV7UwRIb/2qqXy0BlgSTf/mlHSMFn1nCg
rDSe5rpnTIyb2YwhYtYXwqv5lzUh7tToeOGjLghbHh+ieGQPrqs=
=1/Gp
-----END PGP SIGNATURE-----
Merge tag 'v6.16-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New SoC the RK3562 (4xA53, Mali-G52) with one evaluation board.
New boards:
- Cobra and PP1516 from Theobroma-Systems (build around the PX30)
- Radxa Rock 5B+ (rk3588)
- Rockchip RK3399 industrial eval board
New peripherals:
- GMAC + SDMMC/SDIO on rk3528
- SAI + HDMI-audio on rk3576
Interesting general updates:
- move rk3528 i2c + uart aliases as requested
- rk3568 PCIe3 MSI to use GIC ITS
- update deprecated dwmac reset properties on some px30 boards
- updates for cypress usb hubs on some Theobroma boards
Binding taken with Greg's blessing
https://lore.kernel.org/all/2025051550-polish-prude-ed56@gregkh/
* tag 'v6.16-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (35 commits)
arm64: dts: rockchip: Improve LED config for NanoPi R5S
arm64: dts: rockchip: add px30-pp1516 base dtsi and board variants
dt-bindings: arm: rockchip: add PX30-PP1516 boards from Theobroma Systems
arm64: dts: rockchip: add px30-cobra base dtsi and board variants
dt-bindings: arm: rockchip: add PX30-Cobra boards from Theobroma Systems
arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneck
arm64: dts: rockchip: add basic mdio node to px30
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma
arm64: dts: rockchip: fix internal USB hub instability on RK3399 Puma
dt-bindings: usb: cypress,hx3: Add support for all variants
arm64: dts: rockchip: move rk3528 i2c+uart aliases to board files
arm64: dts: rockchip: drop wrong spdif clock from edp1 on rk3588
arm64: dts: rockchip: Add RK3562 evb2 devicetree
arm64: dts: rockchip: add core dtsi for RK3562 SoC
dt-bindings: arm: rockchip: Add rk3562 evb2 board
dt-bindings: soc: rockchip: Add rk3562 syscon compatibles
dt-bindings: rockchip: pmu: Add rk3562 compatible
arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
arm64: dts: rockchip: Add GMAC nodes for RK3528
...
Link: https://lore.kernel.org/r/3998939.iIbC2pHGDl@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices:
- Radxa Cubie A5E
- X96Q-Pro+
- Avaota-A1
Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1.
Note: the SoC has two different ethernet controllers.
Changes to existing SoCs:
- Enable GPU on H616 with all boards enabled
- Set maximum MMC frequency for the A100
Changes to existing boards:
- Add WiFi/BT header on PINE64 A64 boards
- Add hp-det-gpios for Anbernic RG35XX
- Add support for PHY LEDs on Bananapi (the original one)
Add new devices for existing SoCs:
- YuzukiHD Chameleon based on H6
- Liontron H-A133L based on A133 (compatible with A100)
Tree wide cleanups:
- Use preferred node names for cooling maps
- Align wifi node name with bindings
- Drop spurious 'clock-latency-ns' properties for H5 & H6
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmgmm8kOHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDCeKw//dU9nOV3IL027SSzBc/1acvGD7t+o3O9neNlt
4W02QAwTeANCCUM4OYIUCmNn71gFlcEOfVmLlJXAEFJCz6kPP8RSh+IL1LdSQydf
NJMFnnvpVScwUjDSOPAowuqR91OQIHm7nWJvVzo022c8zsQE1iNv7Aeg66Swf0ai
HRuwLveOjVRrVLe4mwwa5/LHTNSZLk1e5si441C86PHHf5+s3x4JnJzTMvYosZbM
3ekjGc6f9evx+7k7bAfQ9UrJ6avtoq5ars+Js+RFjMx0bW6dCLa1EvLa3V2JcEcR
tSI7dwiqLyD2q9tulxVG5kFLTNPdXK+BI9tO96xCbkJ/j0V9ubNToq23ltyuzOVJ
ha8n8e1kb1tOg7HR8B5eV1xN+ZSZL6NvvZoiyPPklML0hmT95Lwi0uVhfnNT0EC9
VjiBBBeP26U0y9005nAzblLUTeKv4pFaRHD7j+MVtDk6IsNwMxGo27KPrkpf6FMM
UgbXSiurdQIXToUuQL+DuGFZZwnu1MN008ZUV/hqEfzWpeH/GQxN+YMbEuuvaKJk
3r0nDM9Wbnjdvs/qhrDZRwKccQOBLMwkZN8JKWyKAoe1mVoFZa9VyyKWuT5qXOee
5E5rwxwFne8BpkDyfmCyHXKVjeGGiVky11roO9/9IchjgJe9j+4hLaCvr8mhTvl2
p4tiVxQ=
=4JrL
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSzAACgkQmmx57+YA
GNnCIA//R7syl7Mu+cJ88VxKhrInFf5F5vngrtrh+o9w5Jk50BY87WX0qT16Zgt6
/jHLLYkjXiv0FA0PJQmeZQKxhYQnGqRqzAgBG41Db6ulbot8cHDNCwbc2J+HPvXe
DibTOayckm23HJQyPXgTBhFC8GnjCOxzpt7mSP7+NlL2QcHGuNABP/Z0R8ra4Evr
rw7GYpmCCuc0O7LdhnGzUpy+QT3SRedq0MPhj59mFn4VYQUCFRnHiYfPUjMjPw4m
dfFAPE6PaZlgIfPLH0s5t8hwZCbOtLkuMUriZPw9iYLN+KXLHRrbprNlPqVH+LC3
VuCUXsokwjr/yeWJ9pzmuRi6kCg2MDooY1i0T2GHfoIr2Sb3cOc7lrjyczMp4ovn
snk370g2qZ9jYOgCOUlNSpI76/OF04/MTOm/IF8yAuWtr2Qkqa7sqwf0dgP1gcQc
FuDgRw/uh2dG51tPV8xYfFvNG0+rSJh7y7M2m76cNG6A/OmI1WJOoRT/WNqvqTxN
y7iZY7aKnML8pDQgoRFeferR5oUfEx4yAIFTA2130U+KtVDiq8/+3pv5DCyGx9/6
dXs0T2LndrDV9DRaSQZ45spHP8sMSFbWbBX3qvQEj9Q8j2QdTSNu4hSi4/P3jQ0U
W5azgGfeL2dH1m+RhJaqpZQTwZH1lVUfIcj2Dpdbk768xkD+UKM=
=/9N8
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner device tree changes for 6.16
Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices:
- Radxa Cubie A5E
- X96Q-Pro+
- Avaota-A1
Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1.
Note: the SoC has two different ethernet controllers.
Changes to existing SoCs:
- Enable GPU on H616 with all boards enabled
- Set maximum MMC frequency for the A100
Changes to existing boards:
- Add WiFi/BT header on PINE64 A64 boards
- Add hp-det-gpios for Anbernic RG35XX
- Add support for PHY LEDs on Bananapi (the original one)
Add new devices for existing SoCs:
- YuzukiHD Chameleon based on H6
- Liontron H-A133L based on A133 (compatible with A100)
Tree wide cleanups:
- Use preferred node names for cooling maps
- Align wifi node name with bindings
- Drop spurious 'clock-latency-ns' properties for H5 & H6
* tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (27 commits)
arm64: dts: allwinner: a100: add Liontron H-A133L board support
dt-bindings: arm: sunxi: Add Liontron H-A133L board name
dt-bindings: vendor-prefixes: Add Liontron name
ARM: dts: bananapi: add support for PHY LEDs
arm64: dts: allwinner: a100: set maximum MMC frequency
arm64: dts: allwinner: t527: add EMAC0 to Avaota-A1 board
arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board
arm64: dts: allwinner: a523: Add EMAC0 ethernet MAC
dt-bindings: sram: sunxi-sram: Add A523 compatible
arm64: dts: allwinner: a64: Add WiFi/BT header on SOPINE Baseboard
arm64: dts: allwinner: a64: Add WiFi/BT header on PINE A64
arm64: dts: allwinner: correct the model name for Radxa Cubie A5E
ARM: dts: allwinner: Align wifi node name with bindings
arm64: dts: allwinner: Align wifi node name with bindings
arm64: dts: allwinner: h616: enable Mali GPU for all boards
arm64: dts: allwinner: h616: Add Mali GPU node
arm64: dts: allwinner: h700: Add hp-det-gpios for Anbernic RG35XX
arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties
arm/arm64: dts: allwinner: Use preferred node names for cooling maps
arm64: dts: allwinner: h616: add YuzukiHD Chameleon support
...
Link: https://lore.kernel.org/r/aCaeZJ2t4S_xhgjp@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmgkXoEdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIU7DQ/5AVX4QZoSJunoS/Um
QtQku5tyAiQD/RupkUitkB0BPSV4XoipWM6f2MVlBnIblRe8esKVDo2AntiDte/E
mOQ0HwP6nFiRL90DdLGqQ0ySwD9pjnUPn7c8ZkEZw2X8hAhTgTCXAVgDJ5tRKAiz
3M5aFw1J3h4dPlSObuCUbQouTIYwvC7Gn80b92Ppo8Sbt2tcfyWGweTzBKtw+InK
Zo8p36Oz1w/Ful/pIO8YWlcQK8myD18KiCKAYR5tCfTGIjOOp+wpaFl/xIWFRcWL
1RPOS38l3SPUzEB6otfK5vIi9JxQDAm/AAsgbTBLcSQmEXpyn3M8ZjQP1KI/KMG9
68lhTHKbTaEeo16jr3aKeThecYdszNt4zmNlZ8vCDzr9o0gpC282VgH31Do8g6vu
b4fRkDn2x1y90GNAOCEPufLS9xwQboRw6Ngc4gHyZjuPvPKw+/SwpoCyulJgiCuC
p+R6ZCf5E+dmE5V762PJ+o0BWO09anP6vBVXd0vakK3NH+T964jkiVbaqgBz374v
o58ysq+e3URN7olJkY5QaKwTUE2N6XAUJn3zmtJYw2gYfzXZdBDPjRCmXBvtAHTw
AwLGeMOuf/NmphLhJecVHRmAMmJpnwFuxPjU3dd1sFGgAXeCw+hvGXei3wgwG+fU
D9kfbRofrV3Tl9YhHl57ocIanm8=
=lBee
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguStcACgkQmmx57+YA
GNl5Zg/9GewrqmsiYWjzNC2klAdaB4SL15eXQ0V5REg8S0Hc9EFJI5G20n2PF0sX
ciEDR+azrsZ6qXCiWA7ZmqCheQK6dPmojIX6zWgNONCqq8sUipCyK3uplIGLC2Nu
QjKHixQuD0fg73mlNwF7LaaFf0riY+B09A2HPuFlAYCt8bCaFuIOjMLWNbUyVPcI
sx5tUU1GYRRupqEwnoKrXNp0UJGLRRgscdMUKn5ZLE5sMUEoWIPppIS2/hWoUi48
LC0C9pn9Xm4FTbwVp05X7qooJn3lzjR2ZogqUqGwzn+qmLgulKMUepr0GVRzvOEh
0zT7HIwxiRYuLfI/EymPxwDrUUxPJNi0nQiJhJxM08iHwkmhEi86d417ZcdYPESt
JCSxXFzWMWatnQqA7f0ijBRN4SbNsH75jPkrEjOgu9mO9/OwQtiL+I56C5K2g+ge
JBIRKPC03vG47wHFREzCXFRmeGzkn0Jz03CqvGJnDnPGS8FvzkE/kSw7Gv9D8crU
flgqmYUezxtykE2zhgPB7Cl0lcjCbWGUDeZUXNjbH5ulyKG/+keAu72cdmuikABy
8A9L7YK+QTehHfzuFY1krj4RJwoxEQgBmx+ZlnJxniAo5VE4IenzamIAjZX2UZ97
oZr6EqcFT2WMh0Cr8p30B0lVSnowkclOlvZ5E525mLwCQ2Un0bE=
=KRaD
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.16, round 1
Highlights:
----------
- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
* tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
dt-bindings: vendor-prefixes: Add Ultratronik
arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
arm64: dts: st: add low-power timer nodes on stm32mp251
arm64: defconfig: enable STM32 LP timer clockevent driver
arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: Add OMM node on stm32mp251
ARM: dts: stm32: support STM32h747i-disco board
ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
ARM: dts: stm32: add pin map for UART8 controller on stm32h743
ARM: dts: stm32: add uart8 node for stm32h743 MCU
dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
ARM: stm32: add a new SoC - STM32H747
dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
ARM: dts: st: stm32: Align wifi node name with bindings
ARM: dts: stm32: add low power timer on STM32F746
...
Link: https://lore.kernel.org/r/2f101efb-6d58-48d8-983a-57e30a34827c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Snapdragon X Plus platform and related reference device is
introduced. Devicetree for the Xiaomi Redmi Note 8 is added.
Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains
1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and
buttons, while the IPQ9574 gains NSS clock controller and SPI NAND
support.
IPQ6018 SMEM is transitioned to be described directly in the
reserved-memory node.
Display and GPU are enabled in the QCM6490-based Fairphone FP5. On
QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and
Bluetooth is enabled. The USB Type-C orientation GPIO is added on the
QCS6490 Rb3Gen2 and the vision mezzanine is described.
The Fairphone FP5 gains touchscreen and USB Type-C display support, and
the QCM6490 IDP board gains a required listed of protected clocks.
The camera subsystem in SC7280 is described and UFS is transitioned to
use operating points.
On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the
UART pinctrl state is cleaned up.
The MSM8953 platform gains another UART and interconnects.
On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling
interrupts are added.
Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for
charging, fuel gauge, haptic, and LED, as well as the PMIC used for
display and touchscreen, which then is used to enable the touchscreen.
The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display
backlight control.
Display and GPU are enabled for the Nothing Phone (1).
QCS615 platform gains command DB definition.
The QCS8300 platform gains description of more QUP instances, CPUfreq,
PCIe SMMU and the SPMI controller.
On SAR2130P PCIe EP device nodes are added.
On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem
is enabled, and firmware-path are defined on ADSP and WCNSS.
The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP
enabled, and the vision mezzanine on both gets their CMA configuration
cleaned up. Xiaomi Pocophone F1 gains touchscreen support.
On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are
described.
On SM8450 the PCIe endpoint controller is described.
For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh
sleep stats.
SM8650 gians OSM L3 scaling and variety of OPP tables and missing
interconnect definitions. The thermal trip points for CPU cores and GPU
are raised in reliance on hardware throttling.
SM8650 is also transitioned to per-CPU interrupt partitions, in order to
properly describe the PMU interrupts. Missing Coresight ETE instances
are added.
On SM8750 the cluster idle states are corrected, then audio and compute
DSPs are introduced, together with the crypto and rng blocks. Modem
support is added and enabled on MTP and QRD devices.
On SC8280XP overlays are introduced for those running Linux at EL2 on
these devices. A few more temp-alarm instances are added for the PMICs.
On the X Elite platform GPU cooling and watchdog is introduced, together
with a number of smaller fixes. Dell XPS13 gains support for USB Type-C
display, the QCP gains WiFi/BT power sequence, and a few devices learns
about HBR3. The RTC support is enabled and regulators that are feeding
resources that should be always on is marked as such on a variety of
boards.
The Lenovo Thinkpad T14s DeviceTree is split in two, in order to
describe the LCD and OLED variants.
Missing properties for the crypto BAM is introduced on a variety of
platforms, taking care of a long standing error message in the kernel
log during boot.
DSI phy clock ids are transitioned to use identifiers from the PHY
header file and VBIF region size is corrected, across a large number of
platforms.
A couple of DWC3 quirks are added across a lot of platforms.
The arm32-for-6.15 pull request was accidentally merged into the
arm64-for-6.16 branch and this wasn't discovered until a significant
number of commits would have to be rebased. As such this is kept here as
well.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmghN+AVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FYTQP/1ZyOvGFKBIxRrlvag4Z8hsU2YxM
n97+i6AElnCE8YAzCC/Ig/zAxyOLuTlPcJeCSnZlpQr8I0uEKktkr1M76GdlOOTM
49XcsT/rnBxh0bRtJssl/Tbl85hQJAfbZ8rp1x0lCn9e2Ef4A2KlbAWmNbA9Rgai
QInLKF1owcpwDhMceWFfakMr7qG5CXRgwA6CWmszn/kpdfI7hhoNUGUidsY3mg//
FfkOInsnh3yetocpp3GmlHs7Mi7puYq0XaKaIAoruyL+MkGAk1+9DY/OFbbhMEmA
dr+1erRM7odJdbl8DCkriZ6RFVSTQ9NhDpmlnoFB02ugQlfy3n+3UK7iOwgQnnln
97B3hcipPIe9L51yV3Ud5lQYDMMvAU9arWuZgOTktLRpFw1ASWnL7P/o5BLYzdGs
NZ9Ebv8LKkuf1/g8SFcz96o7oW/qlKe2vV3jkcWSiFr7PyvsRqT/dFONUw2FppXN
UGvtwQ7jpnZJ5RqTAK9IjPpjdAK9QLrzcwJAH/7mqs5Wn3WGtEDOmPIcPzmFEvKr
3CwkxT31rPxdOpd+ZDnnTZzXcYMrQUQ5oahSKMZObzH2c6DtU0PjcCxNLShTCn1C
vAKUF9JZX71T+rtEmeThMxSr8yQ0HrkZH0Voq3/03lI1ap7oxypb9Fo+qoGxMh5l
7pTic5JsKO+t+kSU
=JzSX
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSLUACgkQmmx57+YA
GNnMAQ/+PT+s+BWkRtKVKLL+eRe7OVfPgRzo7BW678VF598iB2Ow9rY+stFbb0R0
ZfH3an33H1XjoQX7pvWqWCH+s4d6lF+cD//6yjyYXbYCUcNrGZr22vFuHRICzgK0
mo4w+0htSkcc2IuAwVDG7DmApXo88bUwErqGAj68GxkJFVB0tYjw3LjruxCb9+tI
LbOS6tPXw73XBN+/9h8wFwUh9C5Wu79SZ+DPmrnlfyw0DBTKfeALz8ts7LDe6H80
LxmcJgrBZrhcUxJlYWsJqYduTc5Si8mWdK7mEBThjNS6ufm86VyEzXoPpfilf8om
dTlsV8sYS5mDuUJLTj5nHBwf5Ol59mbHrxi5Tu3o8+QgvkbP+gTmgRx9975xeZGS
iTeHXOTzsoTeiccE0kYjbVGSongSvAuCuQcERKNSSuNFfF+i+NLgVBn9sXRVqjIt
FFOSN0p4uQ6gjn9qVkaqhZacsvl+nx1uqAfET1ZKQzHpV2fyJtlQ0WhuLhih6xwk
5Hyc1jl8jCXJ3ImmwybLmwje1sVk1ZtEwbpdq6SUepKjmthxucJbiOD5qMP7l0Vz
45eNT6R0k+GFsQ7wK8adg6rPi004e5R95FDxMuFt8EY0yMUnSdE01Pl4Bnyqq85V
etgyoeth/R/Tjlz5fnt1ET3hQbWfQAWBYpEkgSuT71tSUvBuL2Y=
=W507
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v6.16
The Snapdragon X Plus platform and related reference device is
introduced. Devicetree for the Xiaomi Redmi Note 8 is added.
Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains
1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and
buttons, while the IPQ9574 gains NSS clock controller and SPI NAND
support.
IPQ6018 SMEM is transitioned to be described directly in the
reserved-memory node.
Display and GPU are enabled in the QCM6490-based Fairphone FP5. On
QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and
Bluetooth is enabled. The USB Type-C orientation GPIO is added on the
QCS6490 Rb3Gen2 and the vision mezzanine is described.
The Fairphone FP5 gains touchscreen and USB Type-C display support, and
the QCM6490 IDP board gains a required listed of protected clocks.
The camera subsystem in SC7280 is described and UFS is transitioned to
use operating points.
On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the
UART pinctrl state is cleaned up.
The MSM8953 platform gains another UART and interconnects.
On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling
interrupts are added.
Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for
charging, fuel gauge, haptic, and LED, as well as the PMIC used for
display and touchscreen, which then is used to enable the touchscreen.
The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display
backlight control.
Display and GPU are enabled for the Nothing Phone (1).
QCS615 platform gains command DB definition.
The QCS8300 platform gains description of more QUP instances, CPUfreq,
PCIe SMMU and the SPMI controller.
On SAR2130P PCIe EP device nodes are added.
On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem
is enabled, and firmware-path are defined on ADSP and WCNSS.
The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP
enabled, and the vision mezzanine on both gets their CMA configuration
cleaned up. Xiaomi Pocophone F1 gains touchscreen support.
On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are
described.
On SM8450 the PCIe endpoint controller is described.
For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh
sleep stats.
SM8650 gians OSM L3 scaling and variety of OPP tables and missing
interconnect definitions. The thermal trip points for CPU cores and GPU
are raised in reliance on hardware throttling.
SM8650 is also transitioned to per-CPU interrupt partitions, in order to
properly describe the PMU interrupts. Missing Coresight ETE instances
are added.
On SM8750 the cluster idle states are corrected, then audio and compute
DSPs are introduced, together with the crypto and rng blocks. Modem
support is added and enabled on MTP and QRD devices.
On SC8280XP overlays are introduced for those running Linux at EL2 on
these devices. A few more temp-alarm instances are added for the PMICs.
On the X Elite platform GPU cooling and watchdog is introduced, together
with a number of smaller fixes. Dell XPS13 gains support for USB Type-C
display, the QCP gains WiFi/BT power sequence, and a few devices learns
about HBR3. The RTC support is enabled and regulators that are feeding
resources that should be always on is marked as such on a variety of
boards.
The Lenovo Thinkpad T14s DeviceTree is split in two, in order to
describe the LCD and OLED variants.
Missing properties for the crypto BAM is introduced on a variety of
platforms, taking care of a long standing error message in the kernel
log during boot.
DSI phy clock ids are transitioned to use identifiers from the PHY
header file and VBIF region size is corrected, across a large number of
platforms.
A couple of DWC3 quirks are added across a lot of platforms.
The arm32-for-6.15 pull request was accidentally merged into the
arm64-for-6.16 branch and this wasn't discovered until a significant
number of commits would have to be rebased. As such this is kept here as
well.
* tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (308 commits)
arm64: dts: qcom: sdm845-xiaomi-beryllium-ebbg: introduce touchscreen support
arm64: dts: qcom: sdm845-xiaomi-beryllium-tianma: introduce touchscreen support
arm64: dts: qcom: sdm845-xiaomi-beryllium-common: add touchscreen related nodes
arm64: dts: qcom: qcs8300: add the pcie smmu node
arm64: dts: qcom: x1e80100-*: Drop useless DP3 compatible override
arm64: dts: qcom: msm8953: Add interconnects
arm64: dts: qcom: msm8953: Add uart_5
arm64: dts: qcom: sm8350: Use q6asm defines for reg
arm64: dts: qcom: sm7325-nothing-spacewar: Use q6asm defines for reg
arm64: dts: qcom: sdm850*: Use q6asm defines for reg
arm64: dts: qcom: sdm845*: Use q6asm defines for reg
arm64: dts: qcom: sc7280: Use q6asm defines for reg
arm64: dts: qcom: sc7180-acer-aspire1: Use q6asm defines for reg
arm64: dts: qcom: qrb5165-rb5: Use q6asm defines for reg
arm64: dts: qcom: msm8996*: Use q6asm defines for reg
arm64: dts: qcom: msm8953: Use q6asm defines for reg
arm64: dts: qcom: msm8916-modem-qdsp6: Use q6asm defines for reg
arm64: dts: qcom: apq8096-db820c: Use q6asm defines for reg
arm64: dts: qcom: qcm6490-fairphone-fp5: Hook up DisplayPort over USB-C
arm64: dts: qcom: qcm6490-fairphone-fp5: Add OCP96011 audio switch
...
Link: https://lore.kernel.org/r/20250511235241.15192-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Only one fix:
Switch back to I2C for PMICs on Allwinner H6 devices. Apparently using
Allwinner's proprietary bus ended up causing issues when the PMIC was
sharing the bus with other devices.
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmgmnNcOHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDBKrQ//aNNkYfxU8OqM8fqTDgv51mBS6P6mQGP7WHQp
N8/P+xOdDEM4MqXfB+jQnOUtwZ27pdyRpshldnd4+2oHk75ZkTV8wAFfRogJQdQy
MEFcfhd1VVbCURxiF4Arxry8tBM6X+rIrxtBib8BMVpmy6BstEAfykPyCVQtxhRo
qrdYVHR862l7RsVTK/2qmJzC4DCOS8d1mKeoNfhnwdGJ59Stm4dFNRD7oeuLcHZI
oMIG2Fsd7aFPK1+zIAS+cKQo7xSfTlmTAwOhCuEnqclPy/R05oqmbCzOfPSxnjnr
ctsX7Q2UDE0pfmIDAonDC8CZ1M5RXtCmkias+d2y9A9P8WDYeyq8H/fo8Zd0HNd3
D+DeYV26YvIZIgCZaV0sxQb0BORN9fZjn3lQcNAptWW/0lFLde2zGFh1slO5zd1i
cum4mIEPCvcntkg9hD52WOqXCu2116SRsvRRNNExutyM88MMdT08sfa+bzd5hs+V
LMmcVREJpw0au3PlSSOzN1yZS8YzTOsPfW01OF3jmz/ji9gq6ROIhjavKWjFfPdM
NIb6jXQNuPOgFAyJvHBUP3qhNK5wo8b1fEkBxJ048R0UTi0BAqdapWjUQADei2GS
nwX/I1FuLfd6LFCHw6htCTBhglpX3fTYX4/RRBVFQ8sQsappHqj53fRDRciGKDNw
eab1NRc=
=QGmB
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguRQ8ACgkQmmx57+YA
GNnLYQ/9E+zivoTzNcPo1Fre5Gp0Z3GvdOshRQwqvk4yWpkmVw87LsT0nNPdLvjq
xispQJq/gmiVKCZx69wQx/bNYNnLXsNBtNUSioM5XKXtS9Fz80qPOQYnHJzApiOM
v6vFmdjtYM0mOE2Ykki0egEZWMAMFsI2ODUooBs/npEf/yw1YR/oRHAtT0E+F+q6
3qWdKB61/6I/iQzLjSENL9Brpw1N6x9Mu114G8fAkOBYiFHzo/jBukTVoczF9Jgq
SL1Y8KNw6exKcZ2W9KJr5W2Hqp+2Z17FBSR8XHwuYPEJXtXTbw7BgPwhbo/JdSaF
ERv9vq16qspLthS0s7Yvvvb8Xbl3JROlD3O07XppKrOeiZb0LuCbkcURf2gJMd4d
A4PRfU3yxtIcIg445hmRNKW8oWmulHLENA/ldnC9EAZAholmBEJ2AfFn9Kh3BuTa
zEy9obYsy1btiR9Opu+4ZVYARf/z7t0mX7oLNfh2Ef9whYfzNtURmw828AkHR+v+
nEdRMmfuRgTalBPQqd5mw6CNRg7btNBOLk4n8oBC4c23eL5pV0QJCwDVqvRtNWkG
Q6loGBxZRsfPuWBneaM42nMeNSZfapZf/hA+ZHn2SeDJnAXCA3qxJXEOWu55waLc
75UmIuIy2w+8d5CiuhCS44wTAj27+dm1Ns1yeBiyeXAKf3max0M=
=sdy+
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes
Allwinner fixes for 6.15
Only one fix:
Switch back to I2C for PMICs on Allwinner H6 devices. Apparently using
Allwinner's proprietary bus ended up causing issues when the PMIC was
sharing the bus with other devices.
* tag 'sunxi-fixes-for-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
Revert "arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection"
Link: https://lore.kernel.org/r/aCaeLgjZllV7bauX@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
I've used several email addresses and a previous name to contribute.
Consolidate all of these to my primary email and update my name.
Link: https://lkml.kernel.org/r/20250517223237.15647-2-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Two cleanups which were missed on mailing lists - align GPIO node names
with DT bindings for Mediatek mt7622 and Nvidia Tegra210-p2894.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmgjIRIQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD132YD/95kvOhmdQmd1qvc+bVSgLThHr2FCvX0VT7
B8Yk8XRalngADyG4Qda0m4XA9lZQ1jiG2i0fWBb2aEXqMDgve4jvq1J9BoNxIloY
eR+ATlRnmIDBiAvGozvPhp/WIPCm17RDscCl8XvJCiEXrRfKUQuVljtj/aOLbeWZ
NKjRPPdXQlKjaBUSUv3geW2z68uPRKEXsrKf5/v8jGAFUoWF7y7eascGuUz/ZQZr
hB11emIOteQ824vsE0rkE5V4a2Szaro50+xryvGw9Ja0YaoXwyog+wEiRgvySYnc
YyTfKjccUYgyIdTjBnIECiTEwlBiy6InPzBfVNx8ezlVFiuPTzt7Yv0v/acKx/D7
OXAs1yEEWYSu5NoHbhHxdGaHbtVScbHwPdS1PV7WPpBD0IBdCorSJKzKF+hNHdjz
Javm/bD5B8ichKJKpPPOWmPiY/8h7TQFUsuzd+zDY4CZQEnHEdNCeC//RZ/AOdIm
KYrcD0JL/NliaDh2i3wDs1AN6rV45Uhv6mBwjFSJfZBhXPqB8ns7wD08PIeyuNoq
Pv6NllWrNoHKlyz+pXYgDIzM7a6iDfCAjydO6gkS8EgE/tYKTaJKDyfvs7NPM5MU
VONtP8DZoGfm7u45JrHMLwvsR4HRaz2IjouAA2C/k6z4SXsICWAODXWjjXX0fPtv
NYg3gFLLKw==
=vSix
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguCdcACgkQmmx57+YA
GNkaHBAAtJ24IruvIM7TLO1z7yHnWvaGeCzks1AR8yP3Hhl8HppwsQ9UKI0GOiki
iIiYlc4RNJCg79HjA9375UenmzHyC62dcD7fCHZxfWKoNQm/+KTA8WbH2iELZm6A
cBYr+G+AqMHKrNC/JFlVtxULy1HQY+/8ktKbg1YG8vpnBiGTAmZuDk5lgjwB/5qI
0Y8GK/3mUY5AWs7oXgPcBJmkD8mn9f/iYH8YhDfrBLMY6hGelEBFdezvoyBQhE1o
C+hZ06A9adS+GUlOHNRh83F3FbaRqmKDixxn7WGaXOxq5/e8OPc50zEdZPvNtZPY
DhGGiPMexG8+qVCJC+rSsmZedhHHwEjWQlTj3WxJ4RgbhfjhZRHbaMXcD83S6uVG
YF9Og1PiL9T9irw1yLZYNFZTSILr4a7I5oXOS/mlgufU37sW6RZDq1XHZLGEB435
MU2ubBC8oZcswwKMBfekk5+Ah7cGlW/DZrZnj5FqYuMFQWaAgWc53t1YLE70cZtU
litnjKeol9uSKUc2QgISth8MXSrSll+YqAv5A/YdRjcF6uLDWZPJ/Bo9tsgXtSj+
uikuW/0IBLztu3NMe1OaYI9mgMISRH4bn6ClgTfevm1IVIkFZ6hVWCkF9Mi9DyOl
rP4jg9KvwQ3S2HXtSI9QJjKLwc6Gt5CsGq5FMT94PaByjovqH3s=
=QSN1
-----END PGP SIGNATURE-----
Merge tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.16
Two cleanups which were missed on mailing lists - align GPIO node names
with DT bindings for Mediatek mt7622 and Nvidia Tegra210-p2894.
* tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
arm64: tegra: tegra210-p2894: Align GPIO hog node name with preferred style
arm64: dts: mediatek: mt7622: Align GPIO hog name with bindings
Link: https://lore.kernel.org/r/20250513104216.25803-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Generic Fixups/Cleanups:
* am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot
SoC Specific features and Fixes:
AM62Ax:
* C7x and R5F support added
* Bug fix for emmc clock to point to default
* CPUFreq thermal throttling on thermal alert
AM62P5:
* Add RNG Node (common to J722s)
* Bug fix for emmc clock to point to default (common to J722S)
AM625:
* Wakeup R5 node
* Bug fix for emmc clock to point to default
* PRUSS-M support
* New GPU bindings
AM64:
* Switch to 64-bit address space for PCIe0
* Add PCIe control nodes for main_conf region
* Reserve timer nodes used by MCU F/w.
AM65:
* MMC: Add missing delay timing values for SDR and legacy modes
* Add compatible for AM65x syscon and PCIe control properties
(dtbs_check fixes)
J7200:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.
J721E:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1.
J721S2:
* GPU node for Imagination Tech Rouge BXS GPU.
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.
J722s/AM67A:
* Switch serdes status to be enabled by board file than at SoC level.
* Switch to 64-bit address space for PCIe0.
J784S4/J742S2/AM69:
* Add ASPCIE0 and enable output for PCIe1
* Fix length of serdes_ln_ctrl.
* Switch to 64-bit address space for PCIe0,1.
Board Specific:
AM62Ax:
* SK: co-processors C7x, R5, PWM support added
* phycore-som: co-processors C7x, R5
AM62P5:
* Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support.
* SK: Add remote processor support, PWM
AM625:
* Add BeagleBoard.org PocketBeagle-2 support
* phycore-som: Enable R5F support
* Verdin: Add eeprom compatible fallback
* SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays
(dtbs_check fixes)
* BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes)
* phyboard-lyra: Add cooling maps for fan
* emmc bug fixes: add non-removable flag for eMMC.
AM65:
* EVM: Add missing power supply description ofr Rocktech panel
(dtbs_check fixes)
J721E:
* EVM: Enable OSPI1
* EVM/SK: Dt nodes description for mandatory power suplpies for panel and
sensors (dtbs_check fixes)
J721S2/AM68:
* Add phyBOARD-Izar-AM68x
* am68-SK: Fix regulator hierarchy
J722s/AM67A:
* EVM: Add mux controls for CSI2, power regulator nodes and add overlays for
quad IMX219 and TEVI OV5640.
* BeagleY-AI: Add bootph for main_gpio1
J784S4/J742S2/AM69:
* usxgmii expansion board: Drop un-necessary pinctrl-names
* evm: Add overlay for USB0 Type-A option
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmgiBIoACgkQ3bWEnRc2
JJ33HA//V738htoKu7xT1fUZg51GGTPH/lEOTuApKUW+9rXZefuvov5BQsUcSRDM
uZgAD1wMVmgp9AFXS7O2KK4lGL8h5SnCpQwXUHO3QrD17uMbLSutTe19P3+S9OHk
AGKfLbz6WVUIN8WT3S2zcPoKDp8PQgs6rysBr88iw0nnMgTdVRi8hXNt1jJqWlh3
DWiavXH6vVoHWtXG/ptgef2+PNYD75NPwAgmV5klDUhyTb6Sb3D4bf5FdFs/vdGz
yA0t9a4Bl59UCn7u2S1gOEdmYYDELNQsAnWDytySYn0UjGw7CWdaZrLSZdvWPf5O
o/qimF2frR4cWNtgV3il5SXkXV6v+ZPm+wh9u1dN3CR6f7xDBZh7UpudxOUdPx6q
F8iv54hw53RT4wM23KokPA+I2sP8xXxrZoY+fWPzuJXDJWsjumlzNHXqx4aEWq2F
EJubyL5XtWHZuRHSoxxyqUBHSOQhTt/Kf5AsRD4QJO/HOUbDUahKqKXuv/mGYmwB
Vdqx+P9UxLdnWoI5pil6naZHrvqiHDTVJhwfSgaJwHVgqtm/Qb2o1MB430+fHMn4
LenCB1Qtx5J92LbCSAJlY/eguRlvwt2UDzBSAEKod8QuWJqqTRw42T/eJBwXayJf
BS2M6mCXjYPAy1/a0xrMY9Z+f1ZvmUGBcJOpvMhZRaf8VR5BsKo=
=CjR6
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguBV0ACgkQmmx57+YA
GNkhABAAw1l0lJ4YuwgNXlLOw912uEleiHLSYTakpK65xscnXcmY6O+CP3Hugoe1
daVb0RDoYusD/MyQXTz8KIu9Ji55ki078d7JSs2DfN1nlO+DjlY63Vw0zaAtRMgq
iSOR/pDjsejsC73QckpsHzD0hvRpW4rHhxlWzy0YlsMXvrY92Tx0EwFtuQfdQO1z
E89l0JkiFYk5ZIi2UUMC67ZgMUNEvNVsJ5biyov+4LXCfzNkPwTUAMZvPQxdSTCr
IavMtX0upOz9HghWUKnmBVyOQmGA/UMHHH0jZx/McPCu57DPci/u8QYWkat3jfCi
QGoBrVc4ZqBCO/rmhSZtRjdwKQ+3FK5HGtYa6M9iHJ/qWCQGqlroK5+BIMAJtyHb
ryhC3Fhq1SYoucgpI/ggI0bg3Mufwpwf3l65U50eV6/IKNp6FfwKb+6Wu3JfTF8h
E6JsfWWUrlNUQrE9NbQwtL2+aDnSXu/glJxwS1wqu1w6LI1Z0WpyYM0u6WISNAHL
Y7iCiZVBaOGVRHejTUSJbScec3oYvIeW0q9MvkepV7yKo0AML7vuIvgy2EPmK7MJ
6uKcluhT49qbh98MvlSXU1QZsjDUxne4DO9Bej8NpbqlF0tt900RdkOHc/rqZFFk
uO8Ie4sydNl0ZfRcioL0YcioSoX0IUg90ebyTROrC0vjYP2T/bU=
=w9D6
-----END PGP SIGNATURE-----
Merge tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.16
Generic Fixups/Cleanups:
* am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot
SoC Specific features and Fixes:
AM62Ax:
* C7x and R5F support added
* Bug fix for emmc clock to point to default
* CPUFreq thermal throttling on thermal alert
AM62P5:
* Add RNG Node (common to J722s)
* Bug fix for emmc clock to point to default (common to J722S)
AM625:
* Wakeup R5 node
* Bug fix for emmc clock to point to default
* PRUSS-M support
* New GPU bindings
AM64:
* Switch to 64-bit address space for PCIe0
* Add PCIe control nodes for main_conf region
* Reserve timer nodes used by MCU F/w.
AM65:
* MMC: Add missing delay timing values for SDR and legacy modes
* Add compatible for AM65x syscon and PCIe control properties
(dtbs_check fixes)
J7200:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.
J721E:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1.
J721S2:
* GPU node for Imagination Tech Rouge BXS GPU.
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.
J722s/AM67A:
* Switch serdes status to be enabled by board file than at SoC level.
* Switch to 64-bit address space for PCIe0.
J784S4/J742S2/AM69:
* Add ASPCIE0 and enable output for PCIe1
* Fix length of serdes_ln_ctrl.
* Switch to 64-bit address space for PCIe0,1.
Board Specific:
AM62Ax:
* SK: co-processors C7x, R5, PWM support added
* phycore-som: co-processors C7x, R5
AM62P5:
* Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support.
* SK: Add remote processor support, PWM
AM625:
* Add BeagleBoard.org PocketBeagle-2 support
* phycore-som: Enable R5F support
* Verdin: Add eeprom compatible fallback
* SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays
(dtbs_check fixes)
* BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes)
* phyboard-lyra: Add cooling maps for fan
* emmc bug fixes: add non-removable flag for eMMC.
AM65:
* EVM: Add missing power supply description ofr Rocktech panel
(dtbs_check fixes)
J721E:
* EVM: Enable OSPI1
* EVM/SK: Dt nodes description for mandatory power suplpies for panel and
sensors (dtbs_check fixes)
J721S2/AM68:
* Add phyBOARD-Izar-AM68x
* am68-SK: Fix regulator hierarchy
J722s/AM67A:
* EVM: Add mux controls for CSI2, power regulator nodes and add overlays for
quad IMX219 and TEVI OV5640.
* BeagleY-AI: Add bootph for main_gpio1
J784S4/J742S2/AM69:
* usxgmii expansion board: Drop un-necessary pinctrl-names
* evm: Add overlay for USB0 Type-A option
* tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (86 commits)
arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
arm64: dts: ti: j722s-evm: Add MUX to control CSI2RX
arm64: dts: ti: j722s-evm: Add DT nodes for power regulators
arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 for C7x DSP
arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP
arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors
arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors
arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps
arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert
arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E
arm64: dts: ti: k3-j721s2: Add GPU node
arm64: dts: ti: k3-am62: New GPU binding details
arm64: dts: ti: k3-am62-main: Add PRUSS-M node
arm64: dts: ti: k3-am64: Reserve timers used by MCU FW
arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP
arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP
arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors
arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors
arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors
...
Link: https://lore.kernel.org/r/20250512144807.yn64klchtmjjl6ac@protrude
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Blaize BLZP1600 uses the custom silicon provided from
VeriSilicon to add GPIO support.
This interface is used to control signals on many other
peripherals, such as Ethernet, USB, SD and eMMC.
Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
Link: https://lore.kernel.org/r/20250512133302.151621-1-nikolaos.pasaloukos@blaize.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The non-mmio pinctrl node is not supposed to be inside the soc simple-bus
as dtc points out:
../arch/arm64/boot/dts/rockchip/rk3562.dtsi:1115.20-1181.5: Warning (simple_bus_reg): /soc/pinctrl: missing or empty reg/ranges property
Move the pinctrl node outside and adapt the indentation.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-7-heiko@sntech.de
The rk3562 pcie node currently uses the apb register as its unit address
which is the second reg area defined in the binding.
As can be seen by the dtc warnings like
../arch/arm64/boot/dts/rockchip/rk3562.dtsi:624.26-675.5: Warning (simple_bus_reg): /soc/pcie@ff500000: simple-bus unit address format error, expected "fe000000"
using the first reg area as the unit address seems to be preferred.
This is the dbi area per the binding, so adapt the unit address accordingly
and move the nodes to their new position.
With the move also move the reg + reg-names below the compatible, as is the
preferred position.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-6-heiko@sntech.de
The non-mmio pinctrl node is not supposed to be inside the soc simple-bus
as dtc points out:
../arch/arm64/boot/dts/rockchip/rk3528.dtsi:870.20-936.5: Warning (simple_bus_reg): /soc/pinctrl: missing or empty reg/ranges property
Move the pinctrl node outside and adapt the indentation.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-5-heiko@sntech.de
The rk3576 pcie nodes currently use the apb register as their unit address
which is the second reg area defined in the binding.
As can be seen by the dtc warnings like
../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1346.24-1398.5: Warning (simple_bus_reg): /soc/pcie@2a200000: simple-bus unit address format error, expected "22000000"
../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1400.24-1452.5: Warning (simple_bus_reg): /soc/pcie@2a210000: simple-bus unit address format error, expected "22400000"
using the first reg area as the unit address seems to be preferred.
This is the dbi area per the binding, so adapt the unit address accordingly
and move the nodes to their new position.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202505150745.PQT9TLYX-lkp@intel.com/
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-2-heiko@sntech.de
The assigned-clocks and assigned-clock-rates properties were moved from
the scmi_clk node onto cpu nodes in commit
87810bda8a ("arm64: dts: rockchip: Fix SCMI assigned clocks on rk3588s")
During review of v1 of that patch set, the following comment was made:
why aren't you using OPP tables to define CPU frequencies.
Assigned-clocks looks like a temporary hack because you haven't
done proper OPP tables.
Some time later, proper OPP tables for rk3588 were added in commit
276856db91 ("arm64: dts: rockchip: Add OPP data for CPU cores on RK3588")
So this 'temporary hack' is no longer needed.
Dropping it fixes the following dtb validation issues:
cpu@0: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
cpu@400: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
cpu@600: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
Link: https://lore.kernel.org/linux-rockchip/CAL_JsqL_EogoKOQ1xwU75=rJSC4o7yV3Jej4vadtacX2Pt3-hw@mail.gmail.com/
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://lore.kernel.org/r/20250519101909.62754-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the power-domains for the RK3576 SFC nodes according to the
TRM part 1. This fixes potential SErrors when accessing the SFC
registers without other peripherals (e.g. eMMC) doing a prior
power-domain enable. For example this is easy to trigger on the
Rock 4D, which enables the SFC0 interface, but does not enable
the eMMC interface at the moment.
Cc: stable@vger.kernel.org
Fixes: 3629975712 ("arm64: dts: rockchip: Add SFC nodes for rk3576")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250520-rk3576-fix-fspi-pmdomain-v1-1-f07c6e62dadd@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As clearly seen on other non-MediaTek platforms, this is known to
eventually produce regressions in the future, as drivers may break
ABI and stop working with older firmware versions.
Although the firmware-name property was used in multiple MediaTek
devicetrees for the System Companion Processor (SCP) node, avoid
doing the same on MT8390 to lessen eventual ABI breakages that may
happen with a driver update to change the firmware retrieval logic
for the SCP.
This reverts commit 2f0066dae6.
Link: https://lore.kernel.org/r/20250520111002.282841-1-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Address various dt-binding warnings for most of the MDP3 nodes by
adding and removing interrupts and power domains where required.
Also, remove the mediatek,mt8195-mdp3-rdma fallback compatible
from the main MDP3 RDMA node as the two have never really been
fully compatible.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250520104024.3706723-1-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Rename the node 'mt6359rtc' to 'rtc', as required by the binding.
Fix the following dtb-check error:
mediatek/mt8395-radxa-nio-12l.dtb: pmic: 'mt6359rtc' do not match
any of the regexes: 'pinctrl-[0-9]+'
Fixes: 3b7d143be4 ("arm64: dts: mt6359: add PMIC MT6359 related nodes")
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250514-mt8395-dtb-errors-v2-3-d67b9077c59a@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
The Mediatek Genio 350-EVK board has on the DSI0 connector a StarTek
KD070FHFID015 display panel that uses a Goodix GT9271 I2C capacitive
touch controller.
The mt8365-evk devicetree already have the display panel support but
lacks the touchscreen support, so add it.
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Link: https://lore.kernel.org/r/20250515-mt8365-evk-enable-touchscreen-v1-1-7ba3c87b2a71@collabora.com
[Angelo: Reordered regulator nodes and interurpts-extended property]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
The binding now require the '#reset-cells' property but the
devicetree has not been updated which trigger dtb-check errors.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Link: https://lore.kernel.org/r/20250516-dtb-check-mt8188-v2-2-fb60bef1b8e1@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Configure and enable SPI nodes on Bananapi R4 board.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-13-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Add Fan and cooling maps for Bananapi-R4 board.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-12-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
MT7988 contains buildin mt753x switch which needs calibration data from
efuse.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-9-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
In order to use uart0 or spi1 there is only 1 possible pin definition
so move them to soc dtsi to reuse them in other boards and avoiding
conflict if defined twice.
Suggested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-7-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Add SPI controllers for mt7988.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-6-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Enable XS-Phy on Bananapi R4 for pcie2.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250422132438.15735-9-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
First usb and third pcie controller on mt7988 need a xs-phy to work
properly.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250422132438.15735-8-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Sinovoip has released other variants of Bananapi-R4 board.
The known changes affecting only the LAN SFP+ slot which is replaced
by a 2.5G phy with optional PoE.
Just move the common parts to a new dtsi and keep differences (only
i2c for lan-sfp) in dts.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogiaocchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250422132438.15735-3-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
comparing with CRD and other dts for a more complete support of the 7X
only retimers, gpios, regulators, dp outputs
Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Jos Dehaes <jos.dehaes@gmail.com>
Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250417-slim7x-retimer-v2-1-dbe2dd511137@oldschoolsolutions.biz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable the PCIe controller and PHY nodes corresponding to RDP466.
The IPQ5424 RDP466 does not have a wake gpio because it does not
support low power mode. It only supports a perst gpio.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250416122538.2953658-3-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The FastRPC context banks are DMA-coherent on sc7280 platform. Mark them
as such.
This allows LLM inferencing on the CDSP using Qualcomm AI Engine Direct
SDK on the qcs6490 platform.
Signed-off-by: Xilin Wu <sophon@radxa.com>
Link: https://lore.kernel.org/r/20250416-sc7280-fastrpc-dma-v1-1-60ca91116b1e@radxa.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data
rates used in lane equalization procedure.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20250328-preset_v6-v9-1-22cfa0490518@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The clocks are out of order with the bindings' expectations.
Reorder them to resolve the errors.
Fixes: a6a9d10e79 ("arm64: dts: qcom: qcs615: add UFS node")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-12-b763d958545f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Because SA8775P comes with two disjoint CPU clusters, we have to follow
a similar topology description like the one in sm8750.dtsi, so:
system_pd
cluster0_pd
cpu_pd0
...
cluster1_pd
cpu_pd4
...
Do that & wire it up to APPS RSC to make the bindings checker happy.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-11-b763d958545f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The PX line powers some hardware related to sensors. Assume the board
doesn't reinvent what MTP has established and hook up LVS2 @ 1.8V as
such.
This fixes the 'is required' type of bindings validator errors.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-10-b763d958545f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Set the supply as required by bindings, to silence the warning:
'vdd-supply' is a required property
The value is inferred from MTP schematics, but it shouldn't change
between boards due to specific electrical characteristics.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-8-b763d958545f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Set the supply as required by bindings, to silence the warning:
'vdd-supply' is a required property
The value is inferred from MTP schematics, but it shouldn't change
between boards due to specific electrical characteristics.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-6-b763d958545f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The node has #clock-cells = <0>, as it only provides a single clock
output.
This leads to a turbo sneaky bug, where the dt checker shows that we
have additional clocks in the array:
clock-controller@c8c0000: clocks: [[3, 0], [39, 178], [156, 1],
[156, 0], [157, 1], [157, 0], [158], [0], [0], [0], [39, 184]]
is too long
..which happens due to dtc interpreting <&mdss_hdmi_phy 0> as
<&mdss_hdmi_phy>, <0> after taking cells into account.
Remove the superfluous argument to both silence the warning and fix
the index-based lookup of subsequent entries in "clocks".
Fixes: 2150c87db8 ("arm64: dts: qcom: msm8998: add HDMI nodes")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-4-b763d958545f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
SDM845 comes in a couple firmware flavors, some of which don't support
PSCI in OSI mode. That prevents the power domain exepcted by the RSC
node from providing useful information on system power collapse.
Use the platform-specific compatible to allow not passing one.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-3-b763d958545f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
SC7180 comes in a couple firmware flavors, some of which don't support
PSCI in OSI mode. That prevents the power domain exepcted by the RSC
node from providing useful information on system power collapse.
Use the platform-specific compatible to allow not passing one.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-2-b763d958545f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Append the MHI range to the pcie nodes. Append the MHI register range to
IPQ9574. This is an optional range used by the dwc controller driver to
print debug stats via the debugfs file 'link_transition_count'.
Convert reg-names to vertical list.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250317100029.881286-3-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add support for the onboard WCN3950 BT/WiFi chip. Corresponding firmware
has been merged to linux-firmware and should be available in the next
release.
Bluetooth: hci0: setting up wcn399x
Bluetooth: hci0: QCA Product ID :0x0000000f
Bluetooth: hci0: QCA SOC Version :0x40070120
Bluetooth: hci0: QCA ROM Version :0x00000102
Bluetooth: hci0: QCA Patch Version:0x00000001
Bluetooth: hci0: QCA controller version 0x01200102
Bluetooth: hci0: QCA Downloading qca/cmbtfw12.tlv
Bluetooth: hci0: QCA Downloading qca/cmnv12.bin
Bluetooth: hci0: QCA setup on UART is completed
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250207-rb1-bt-v4-6-d810fc8c94a9@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
While adding interconnect support for the QCM2290 platform some of them
got the c&p error, rogue MASTER_APPSS_PROC for the config_noc
interconnect. Turn that into SLAVE_QUP_0 as expected.
Fixes: 5b970ff019 ("arm64: dts: qcom: qcm2290: Hook up interconnects")
Reported-by: Konrad Dybcio <konradybcio@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250207-rb1-bt-v4-4-d810fc8c94a9@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jens reported that the sanity checks added to the new ps883x USB retimer
driver breaks USB and display on the HP X14. Turns out the X14 only has
a retimer on one of the ports, but this initially went unnoticed due to
the missing sanity check (and error handling) in the retimer driver.
Drop the non-existing retimer from the devicetree to enable the second
USB port and the display subsystem.
Note that this also matches the ACPI tables.
Fixes: 6f18b8d414 ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14")
Cc: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
Tested-by: Juerg Haefliger <juerg.haefliger@canonical.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20250328084154.16759-1-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Lenovo ThinkPad T14s, the headset is connected via a HiFi mux to
support CTIA and OMTP headsets. This switch is used to minimise pop and
click during headset type switching.
Enable the mux controls required to power this switch along with wiring up
gpio that control the headset switching.
Without this, headset audio will be very noisy and might see headset
detection errors.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Christopher Obbard <christopher.obbard@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250327100633.11530-7-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The NanoPi R5S has 4 GPIO LEDs, a RED one for SYStem power and 3 green
LEDs meant to indicate that a cable is connected to either of the
2.5GbE LAN ports or the 1GbE WAN port.
In the NanoPi R5S schematic (2204; page 19) as well as on the PCB and on
the case, SYS is used and not POWER. So replace 'power' with 'sys'.
But keep the 'power_led' label/phandle even though the kernel doesn't
use it, but it may be used outside of it.
The SYStem LED already had "heartbeat" as its default-trigger.
Set the default-trigger to "netdev" for the NICs so they will show when
LAN1/LAN2/WAN is connected and set their default-state to "off".
Also assign labels as close as possible to the labels on the case, while
still being descriptive enough in their own right.
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://lore.kernel.org/r/20250513170056.96259-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
PP1516 are Touchscreen devices built around the PX30 SoC and companion
devices to PX30-Cobra, again with multiple display options.
The devices feature an EMMC, OTG port and a 720x1280 display with a
touchscreen and camera
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-7-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cobra are Touchscreen devices built around the PX30 SoC using
a variety of display options.
The devices feature an EMMC, network port, usb host + OTG ports and
a 720x1280 display with a touchscreen.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-5-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Using snps,reset-* properties to handle the ethernet-phy resets is
deprecated and instead a real phy node should be used.
Move the Ringneck phy-reset properties to such a node
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Using snps,reset-* properties for handling the phy-reset is deprecated
and instead a real phy node should be defined that then contains the
reset-gpios handling.
To facilitate this, add the core mdio node under the px30's gmac, similar
to how the other Rockchip socs already do this.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The u2phy0_host port is the part of the USB PHY0 (namely the
HOST0_DP/DM lanes) which routes directly to the USB2.0 HOST
controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG
controller (dwc3), which we do use.
The HOST0_DP/DM lanes aren't routed on RK3399 Puma so let's simply
disable the USB2.0 controllers.
USB3 OTG has been known to be unstable on RK3399 Puma Haikou for a
while, one of the recurring issues being that only USB2 is detected and
not USB3 in host mode. Reading the justification above and seeing that
we are keeping u2phy0_host in the Haikou carrierboard DTS probably may
have bothered you since it should be changed to u2phy0_otg. The issue is
that if it's switched to that, USB OTG on Haikou is entirely broken. I
have checked the routing in the Gerber file, the lanes are going to the
expected ball pins (that is, NOT HOST0_DP/DM).
u2phy0_host is for sure the wrong part of the PHY to use, but it's the
only one that works at the moment for that board so keep it until we
figure out what exactly is broken.
No intended functional change.
[1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf
Chapter 2 USB2.0 PHY
Fixes: 2c66fc34e9 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-5-4a76a474a010@thaumatec.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The u2phy1_host port is the part of the USB PHY1 (namely the
HOST1_DP/DM lanes) which routes directly to the USB2.0 HOST
controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG
controller (dwc3), which we do use.
The HOST1_DP/DM lanes aren't routed on RK3399 Puma so let's simply
disable the USB2.0 controllers and associated part in USB2.0 PHY.
No intended functional change.
[1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf
Chapter 2 USB2.0 PHY
Fixes: 2c66fc34e9 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-4-4a76a474a010@thaumatec.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently, the onboard Cypress CYUSB3304 USB hub is not defined in
the device tree, and hub reset pin is provided as vcc5v0_host
regulator to usb phy. This causes instability issues, as a result
of improper reset duration.
The fixed regulator device requests the GPIO during probe in its
inactive state (except if regulator-boot-on property is set, in
which case it is requested in the active state). Considering gpio
is GPIO_ACTIVE_LOW for Puma, it means it’s driving it high. Then
the regulator gets enabled (because regulator-always-on property),
which drives it to its active state, meaning driving it low.
The Cypress CYUSB3304 USB hub actually requires the reset to be
asserted for at least 5 ms, which we cannot guarantee right now
since there's no delay in the current config, meaning the hub may
sometimes work or not. We could add delay as offered by
fixed-regulator but let's rather fix this by using the proper way
to model onboard USB hubs.
Define hub_2_0 and hub_3_0 nodes, as the onboard Cypress hub
consist of two 'logical' hubs, for USB2.0 and USB3.0.
Use the 'reset-gpios' property of hub to assign reset pin instead
of using regulator. Rename the vcc5v0_host regulator to
cy3304_reset to be more meaningful. Pin is configured to
output-high by default, which sets the hub in reset state
during pin controller initialization. This allows to avoid double
enumeration of devices in case the bootloader has setup the USB
hub before the kernel.
The vdd-supply and vdd2-supply properties in hub nodes are
added to provide correct dt-bindings, although power supplies are
always enabled based on HW design.
Fixes: 2c66fc34e9 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Cc: stable@vger.kernel.org # 6.6
Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-3-4a76a474a010@thaumatec.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Even though they will be the same for all boards, i2c and uart aliases
are supposed to live in the individual board files, to not create
aliases for disabled nodes.
So move the newly added aliases for rk3528 over to the Radxa E20C board,
which is the only rk3528 board right now.
Fixes: d3a05f490d ("arm64: dts: rockchip: Add I2C controllers for RK3528")
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Yao Zi <ziyao@disroot.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250510220106.2108414-1-heiko@sntech.de
Introduce a device tree for the HP EliteBook Ultra G1q 14" AI laptop. It
seems to be using the same baseboard as the HP OmniBook X 14 so just use
that for now.
Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com>
Link: https://lore.kernel.org/r/20250429144957.2088284-4-juerg.haefliger@canonical.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Only two little a520s share the same L2, every a720 has their own L2
cache.
Fixes: d235037799 ("arm64: dts: qcom: add initial SM8650 dtsi")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250405105529.309711-1-mitltlatltl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The Qualcomm X Elite Devkit has 2 USB-A ports, both connected to the USB
multiport controller, each one via a separate NXP PTN3222 eUSB2-to-USB2
redriver to the eUSB2 PHY for High-Speed support, with a dedicated QMP
PHY for SuperSpeed support.
Describe each redriver and then enable each pair of PHYs and the
USB controller itself, in order to enable support for the 2 USB-A ports.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250324-x1e001de-devkit-dts-enable-usb-a-ports-v1-1-81153b2d1edf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Commit d37e2646c8 ("arm64: dts: qcom: x1e80100-pmics: Enable all SMB2360
separately") disables all SMB2360s and let the board DTS explicitly enable
them. The HP OmniBook DTS is from before this change and is missing the
explicit enabling. Add that to get all USB root ports.
Fixes: 6f18b8d414 ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14")
Cc: stable@vger.kernel.org # 6.14
Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20250319160509.1812805-1-juerg.haefliger@canonical.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable support for download mode to collect RAM dumps in case of a
system crash, allowing post mortem analysis.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250512-ipq5018-syscon-v1-2-eb1ad2414c3c@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add phy and controller nodes for a 2-lane Gen2 and
a 1-lane Gen2 PCIe bus. IPQ5018 has 8 MSI SPI interrupts and
one global interrupt.
NOTE: the PCIe controller supports gen3, yet the phy is limited to gen2.
Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
Signed-off-by: Sricharan R <quic_srichara@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://lore.kernel.org/r/20250514-ipq5018-pcie-v10-1-5b42a8eff7ea@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
There is a typo in sm8350.dts where the node label
mmeory@85200000 should be memory@85200000.
This patch corrects the typo for clarity and consistency.
Fixes: b7e8f433a6 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
Link: https://lore.kernel.org/r/20250514114656.2307828-1-alok.a.tiwari@oracle.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Both ports seem to work, just like on other X1E laptops.
Tested with a Type-C-to-HDMI2.0 dock (translating into up to 2 DP lanes
worth of bandwidth).
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250514-topic-romu_dp-v1-1-6242d6acb5e5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The H-A133L board is an industrial development board made by Liontron.
It contains a number of dedicated JST connectors, to connect external
peripherals. It features:
- Allwinner A133 SoC (4 * Arm Cortex-A53 cores at up to 1.6 GHz)
- 1 GiB, 2 GiB or 4 GiB of LPDDR4 DRAM
- between 16 and 128 GiB eMMC flash
- AXP707 PMIC (compatible to AXP803)
- 100 Mbit/s RJ45 Ethernet socket, using an JLSemi JL1101 PHY
- XR829 WIFI+Bluetooth chip
- 2 * USB 2.0 USB-A ports, plus three sets of USB pins on connectors
(connected via a USB hub connected to USB1 on the SoC)
- microSD card slot
- 3.5mm A/V port
- 12V power supply
- connectors for an LVDS or MIPI-DSI panel
Add the devicetree describing the board's peripherals and their
connections.
Despite being a devboard, the manufacturer does not publish a schematic
(I asked), so the PMIC rail assignments were bases on BSP dumps,
educated guesses and some experimentation. Dropping the always-on
property from any of the rails carrying it will make the board hang as
soon as the kernel turns off unused regulators.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250505164729.18175-4-andre.przywara@arm.com
[wens@csie.org: fix property in &usbphy; fix comment typo in &usb_otg]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
make dtbs:
arch/arm64/boot/dts/renesas/r8a779g0.dtsi:1269.24-1283.5: Warning (spi_bus_bridge): /soc/spi@e6ea0000: incorrect #address-cells for SPI bus
also defined at arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts:471.9-486.3
arch/arm64/boot/dts/renesas/r8a779g0.dtsi:1269.24-1283.5: Warning (spi_bus_bridge): /soc/spi@e6ea0000: incorrect #size-cells for SPI bus
also defined at arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts:471.9-486.3
arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'
The Sparrow Hawk uses the MSIOF module in I2S mode instead of SPI mode,
triggering a conflict between the SPI bus bindings and dtc:
- Serial engines that can be SPI controllers must use "spi" as their
node names,
- Dtc assumes nodes named "spi" are always SPI controllers.
Fix this by disabling this specific warning for this board.
Fixes: ca764d5321 ("arm64: dts: renesas: sparrow-hawk: Add MSIOF Sound support")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/20250506192033.77338015@canb.auug.org.au
Suggested-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/fbad3581f297d5b95a3b2813bbae7dba25a523fd.1747039399.git.geert+renesas@glider.be
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The two alarm LEDs of on the uDPU board are stopped working since
commit 78efa53e71 ("leds: Init leds class earlier").
The LEDs are driven by the GPIO{15,16} pins of the North Bridge
GPIO controller. These pins are part of the 'spi_quad' pin group
for which the 'spi' function is selected via the default pinctrl
state of the 'spi' node. This is wrong however, since in order to
allow controlling the LEDs, the pins should use the 'gpio' function.
Before the commit mentined above, the 'spi' function is selected
first by the pinctrl core before probing the spi driver, but then
it gets overridden to 'gpio' implicitly via the
devm_gpiod_get_index_optional() call from the 'leds-gpio' driver.
After the commit, the LED subsystem gets initialized before the
SPI subsystem, so the function of the pin group remains 'spi'
which in turn prevents controlling of the LEDs.
Despite the change of the initialization order, the root cause is
that the pinctrl state definition is wrong since its initial commit
0d45062cfc ("arm64: dts: marvell: Add device tree for uDPU board"),
To fix the problem, override the function in the 'spi_quad_pins'
node to 'gpio' and move the pinctrl state definition from the
'spi' node into the 'leds' node.
Cc: stable@vger.kernel.org # needs adjustment for < 6.1
Fixes: 0d45062cfc ("arm64: dts: marvell: Add device tree for uDPU board")
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
During the low power modes the generic ARM timer is deactivated, so the
the tick broadcast is used, based on LPTIMER3 which is clocked by LSE on
STMicroelectronics boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add low-power timer (LPTimer) support on STM32MP25 SoC.
The full feature set is implemented in LPTIM1/2/3/4. LPTIM5 supports a
smaller set of features (no capture/compare) channel. Still, LPTIM5 can
be used as single PWM, counter, trigger or timer.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250429125133.1574167-7-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add the required nodes for sound playback via a connected external
display (DisplayPort over USB-C).
In user space just the following route needs to be set (e.g. using
ALSA UCM):
amixer -c0 cset name='DISPLAY_PORT_RX Audio Mixer MultiMedia1' 1
Afterwards one can play audio on the MultiMedia1 sound device, e.g.:
aplay -D plughw:0,0 test.wav
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250507-fp5-dp-sound-v4-5-4098e918a29e@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Default pinctrl configurations for all QUP (Qualcomm Universal Peripheral)
Serial Engines (SEs) are missing in the SoC device tree. These
configurations are required by client teams when enabling any SEs as I2C,
SPI, or Serial protocols.
Add default pin configurations for Serial Engines (SEs) for all supported
protocols, including I2C, SPI, and UART, to the sa8775p device tree. This
change facilitates slave device driver clients to enable usecase with
minimal modifications.
Remove duplicate pin configurations from target-specific file as same pin
configuration is included in the SoC device tree.
Acked-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
Link: https://lore.kernel.org/r/20250509090443.4107378-1-quic_vdadhani@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add DT entries for the sm8550 iris decoder.
Since the firmware is required to be signed, only enable
on Qualcomm development boards where the firmware is
publicly distributed.
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250509-topic-sm8x50-upstream-iris-8550-dt-v4-1-22ced9179da3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add syscon node for the PMU Interrupt Generation registers.
Additionally update the exynos-pmu node to provide a phandle
to pmu-intr-gen syscon.
These registers are required for CPU hotplug to be functional.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-4-9f64a2657316@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
The FVP Rev C model includes CoreSight ETE and TRBE support. These
features can be enabled by specifying parameters when launching the
model:
| -C cluster0.has_ete: 1
| -C cluster1.has_ete: 1
| -C cluster0.has_trbe: 1
| -C cluster1.has_trbe: 1
This change adds device tree nodes for the ETE and TRBE. They are
disabled by default to prevent kernel warnings from failed driver
probes, as the model does not enable the features unless explicitly
specified as mentioned above.
Signed-off-by: Leo Yan <leo.yan@arm.com>
Message-Id: <20250512151149.13111-1-leo.yan@arm.com>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Drop the clock-frequency property from the timer nodes, since it must be
configured by the boot/secure firmware.
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Message-Id: <20250512101132.1743920-1-sudeep.holla@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reserve 64MB of memory at the end of the first bank of DRAM on FVP model.
This is mainly for FF-A firmware use, as required by various firmware
configurations using the Firmware Framework for Arm (FF-A). This prevents
the kernel from overwriting the firmware region.
This is also useful when running other firmware configurations(non FF-A
based) that rely on usage of 64MB at the end of first DRAM bank.
Necessary for proper coexistence of firmware(FF-A partitions) and the OS.
Message-Id: <20250509154640.836093-3-sudeep.holla@arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Add CPU idle state definitions to the FVP Rev C device tree to enable
support for CPU lower power modes. This allows the system to properly
enter low power states during idle. It is disabled by default as it is
know to impact performance on the models.
Note that the power_state parameter(arm,psci-suspend-param) doesn't use
the Extended StateID format for compatibility reasons on FVP.
Tested on the FVP Rev C model with PSCI support enabled firmware.
Tested-by: Leo Yan <leo.yan@arm.com>
Message-Id: <20250509154640.836093-2-sudeep.holla@arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Introduce a system-level timer node in the FVP device tree to act as
a broadcast timer when CPUs are in context losing idle states where
the local timer stops on entering such low power states.
This change complements recent CPU idle state additions.
Tested-by: Leo Yan <leo.yan@arm.com>
Message-Id: <20250509154640.836093-1-sudeep.holla@arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
- New board support: TQMa8XxS, TQMa95xxSA, TQMa93xx, MBa91xxCA,
i.MX943 EVK, Nitrogen8M Plus ENC Carrier, Toradex SMARC i.MX8MP,
Libra-i.MX 8M Plus FPSC board
- A couple of imx8mp-tqma8mpql-mba8mp-ras314 board updates that support
Raspberry Pi Camera V2 and LVDS using device tree overlay
- A series from Adam Ford that updates i.MX8M Beacon boards for RTC
capacitive load, HDMI audio, Ethernet PHY, etc.
- A set of changes from Daniel Baluta that enables i.MX8MP DSP node
for rproc usage
- A few changes from Francesco Dolcini that add EEPROM compatible
fallback for imx8mp-verdin board, add fan PWM configuation for
imx8mp-toradex-smarc board
- A series from Frank Li to enable PCIe EP support all i.MX8 devices
using device tree overlay
- A change from Laurentiu Mihalcea to enable Sound Open Firmware (SOF)
support on imx95-19x19-evk board
- A few changes from Markus Niebel to disable MDIO Open Drain for
imx93-tqma9352 devices
- A couple of changes from Max Krummenacher to enable PCIe and SATA
support for i.MX8 Apalis and Colibri boards
- A series from Primoz Fiser to enable various devices/functions for
i.MX93 phycore boards
- A patch set from Xu Yang to add USB2.0 support for i.MX95 EVK boards
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmghzEsUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7o7gf+K6yNLsEH7fJ/L1faCYfElURJXg+f
X3nfCJwlC7rHAa7yFTb8U2Fu/1Tl4Xm8EtBr8RYIiPq3i+K80jRk/Ns9g/YJPIAT
XrPFVXI9OFWKrYazZVcMvxIDSDS6oB+HjugKb4iJGqktDDvvC+hVc1dzjvyTua39
N0sU3vOUDMPVfmzUFuedfH181M8MLe2gK3dM8t+5c8asVSogP6XElZG+nLF/2djm
/ZuBTUePrMLLnVWTSNzbmYZcFxMoK34Bl87yoin47S1zALL9gfxS/VMXFXiJsQ8Q
c0be/siJQlwSCzmkvrDzuU7Nw5mEboNHM1e7bDEMfdtrZfkA3b7z0bTIVQ==
=8sq6
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgh56YACgkQYKtH/8kJ
Uic7eg//VbLKZM1GQH52y0LRQCpklQRG4l3PjiOJyMAsFEf0GTTEPgNiRNiSv5WS
kXlsojsS0QulOZdRb2v84fOFmffaG7pq0o4dgN4+iWSbGUvWLb+PM46CMi39DeOD
lqgRlAVdKkOLxvDnIAEq7ce6/C4EIoIYul4D9CXLF7Jnf/NnGpB5lv8M+Sh1nv5D
xurEzUlbNuSBbxkw0mgoeiqXaGO3sFeILEV6F67np1Z6QvgeJ6nNDrX5Dd7FlwwV
eqMWpXMwGHLFok0RYWlBCpFO//hrjQi4T9y+weKEnzI1TRIiDWxH1kUWdNMpGQ5l
EcbpT42zaQamnqgbC25K+dqpSyZLLWSXZb/DkbaFvDY++riXRIEU9qOrWxBkQ73V
AWjldmzI8h1mKJKPkvHeo8gY4lmm9aaQSlzELyC8zYo8HJkcsyTQCG31uc/50S0z
765SoGd4eFTyC1aqwd01sJTqIJpi4nTAObWdCf7ptjaBFrQjliUgjTwbRY0Y8IFr
erk86QJJw9ti2RdVz4ygKjiwpin7ROBvgzNkjh8Ud/DKYhKX6BAMXKcz38MOYoV/
jg5V2EJt2U02XzdP2C8pSe1TNlaibMDgvR+KSs/8hlIvokhX/HNm01ET2y/EONbi
7M0s7sYN4Ii8X39bG5BOh/wRCZo9sLfsdHA2buOWwlQ5NgvyHWM=
=A7Fy
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree change for 6.16:
- New board support: TQMa8XxS, TQMa95xxSA, TQMa93xx, MBa91xxCA,
i.MX943 EVK, Nitrogen8M Plus ENC Carrier, Toradex SMARC i.MX8MP,
Libra-i.MX 8M Plus FPSC board
- A couple of imx8mp-tqma8mpql-mba8mp-ras314 board updates that support
Raspberry Pi Camera V2 and LVDS using device tree overlay
- A series from Adam Ford that updates i.MX8M Beacon boards for RTC
capacitive load, HDMI audio, Ethernet PHY, etc.
- A set of changes from Daniel Baluta that enables i.MX8MP DSP node
for rproc usage
- A few changes from Francesco Dolcini that add EEPROM compatible
fallback for imx8mp-verdin board, add fan PWM configuation for
imx8mp-toradex-smarc board
- A series from Frank Li to enable PCIe EP support all i.MX8 devices
using device tree overlay
- A change from Laurentiu Mihalcea to enable Sound Open Firmware (SOF)
support on imx95-19x19-evk board
- A few changes from Markus Niebel to disable MDIO Open Drain for
imx93-tqma9352 devices
- A couple of changes from Max Krummenacher to enable PCIe and SATA
support for i.MX8 Apalis and Colibri boards
- A series from Primoz Fiser to enable various devices/functions for
i.MX93 phycore boards
- A patch set from Xu Yang to add USB2.0 support for i.MX95 EVK boards
* tag 'imx-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (71 commits)
arm64: dts: freescale: Add PHYTEC phyBOARD-Nash-i.MX93 support
arm64: dts: freescale: imx8mp-toradex-smarc: use generic gpio node name
arm64: dts: freescale: imx8mp-toradex-smarc: add gpio expander
arm64: dts: freescale: imx8mp-toradex-smarc: add embedded controller
arm64: dts: freescale: imx8mp-toradex-smarc: add fan PWM configuration
arm64: dts: imx93-tqma9352-mba91xxca: disable Open Drain for MDIO
arm64: dt: imx95: Add TQMa95xxSA
arm64: dts: imx: Align wifi node name with bindings
arm64: dts: freescale: add initial device tree for TQMa8XxS
arm64: dts: imx8mp-tqma8mpql-mba8mp-ras314: Add Raspberry Pi Camera V2 overlay
arm64: dts: imx8mp-tqma8mpql-mba8mp-ras314: Add LVDS device tree overlay
arm64: dts: freescale: Add minimal dts support for imx943 evk
arm64: dts: freescale: Add basic dtsi for imx943
arm64: dts: imx8-colibri: Add PCIe support
arm64: dts: freescale: imx93-phyboard-segin: Order node alphabetically
arm64: dts: freescale: imx93-phyboard-segin: Add EQOS Ethernet
arm64: dts: freescale: imx93-phyboard-segin: Add I2S audio
arm64: dts: freescale: imx93-phyboard-segin: Add USB support
arm64: dts: freescale: imx93-phyboard-segin: Add CAN support
arm64: dts: freescale: imx93-phyboard-segin: Add RTC support
...
Link: https://lore.kernel.org/r/20250512103858.50501-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the Focaltech FT8719 touchscreen controller used in the Poco F1
(EBBG) panel variant.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joel Selvaraj <foss@joelselvaraj.com>
Link: https://lore.kernel.org/r/20250506-pocof1-touchscreen-support-v4-4-bfb53da52945@joelselvaraj.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable the Novatek NT36672A touchscreen controller used in the Poco F1
(Tianma) panel variant.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joel Selvaraj <foss@joelselvaraj.com>
Link: https://lore.kernel.org/r/20250506-pocof1-touchscreen-support-v4-3-bfb53da52945@joelselvaraj.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Enable qupv3_id_1 and gpi_dma1 as they are required for configuring
touchscreen. Also add pinctrl configurations needed for touchscreen.
These are common for both the tianma and ebbg touchscreen variant.
In the subsequent patches, we will enable support for the Novatek NT36672a
touchscreen and FocalTech FT8719 touchscreen that are used in the Poco F1
Tianma and EBBG panel variant respectively. This is done in preparation
for that.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joel Selvaraj <foss@joelselvaraj.com>
Link: https://lore.kernel.org/r/20250506-pocof1-touchscreen-support-v4-2-bfb53da52945@joelselvaraj.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Back when display support was added initially to CRD, and we used to have
two separate compatibles for eDP and DP, it was supposed to override the
DP compatible with the eDP one in the board specific devicetree. Since
then, the DP driver has been reworked to figure out the eDP/DP at runtime
while only DP compatible remained in the end.
Even though the override does nothing basically, drop it to avoid
further confusion. Drop it from all X Elite based platforms.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250509-x1e80100-dts-drop-useless-dp-compatible-override-v2-1-126db05cb70a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
As described, the analogix-dp controller on rk3588 only supports 2 clocks
and the edp0 node handles that correctly.
The edp1 node on the other hand seems to have a dangling 3rd clock called
spdif, that probably only exists in the vendor-tree.
As that is not handled at all, remove it for now so that we adhere to the
binding.
Fixes: a481bb0b1a ("arm64: dts: rockchip: Add eDP1 dt node for rk3588")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250509152329.2004073-1-heiko@sntech.de
RK3562 is a SoC from Rockchip, which embedded with quad
ARM Cortex-A53.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Link: https://lore.kernel.org/r/20250509102308.761424-5-kever.yang@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the nodes for the bimc, pcnoc, snoc and snoc_mm. And wire up the
interconnects where applicable.
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: Prepare patch for upstream submission]
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250420-msm8953-interconnect-v2-2-828715dcb674@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add the node and pinctrl for uart_5 found on the MSM8953 SoC.
Signed-off-by: Felix Kaechele <felix@kaechele.ca>
[luca: Prepare patch for upstream submission]
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250406-msm8953-uart_5-v1-1-7e4841674137@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-11-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-10-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-9-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-8-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-7-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-6-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-5-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-4-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-3-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-2-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-1-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Extend the USB graph to connect the OCP96011 switch, the PTN36502
redriver, the USB controllers and the MDSS, so that DisplayPort over
USB-C is working.
Connect some parts of the graph directly in the SoC dtsi since those
parts are wired up like this in the SoC directly.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-fp5-pmic-glink-dp-v3-4-cc9c2aeb42fb@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add a node for the OCP96011 on the board which is used to handle USB-C
analog audio switch and handles the SBU mux for DisplayPort-over-USB-C.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250425-fp5-pmic-glink-dp-v3-3-cc9c2aeb42fb@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add a node for the "Type-C USB 3.1 Gen 1 and DisplayPort v1.2 combo
redriver" found on this device.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250425-fp5-pmic-glink-dp-v3-2-cc9c2aeb42fb@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
While in the past the 'reg' properties were often written using decimal
'0' for #address-cells = <2> & #size-cells = <2>, nowadays the style is
to use hexadecimal '0x0' instead.
Align this dtsi file to the new style to make it consistent, and don't
use mixed 0x0 and 0 anymore.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250324-sm6350-videocc-v2-1-cc22386433f4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
There's devices that don't have a DMIC connected to va-macro, so stop
setting the pinctrl in sc7280.dtsi, but move it to the devices that
actually are using it.
No change in functionality is expected, just some boards with disabled
va-macro are losing the pinctrl (herobrine-r1, villager-r0, zombie*).
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250404-sc7280-va-dmic01-v1-1-2862ddd20c48@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Now that we have ACD support for GPU, add additional OPPs up to
Turbo L3 which are supported across all existing SKUs.
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Tested-by: Anthony Ruhier <aruhier@mailbox.org>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/649354/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Update GPU node to include acd level values.
Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Tested-by: Anthony Ruhier <aruhier@mailbox.org>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/649352/
Signed-off-by: Rob Clark <robdclark@chromium.org>
The Radxa E20C has two GbE ports, LAN and WAN. The LAN port is provided
using a GMAC controller and a YT8531C PHY and the WAN port is provided
by an RTL8111H PCIe Ethernet controller.
Enable support for the LAN port on Radxa E20C.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250509202402.260038-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rockchip RK3528 has two Ethernet controllers based on Synopsys DWC
Ethernet QoS IP.
Add device tree nodes for the two Ethernet controllers in RK3528.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250509202402.260038-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable IOMMU support for the internal DMA controller of the QSPI
controller, add aliases for the I2C controllers on Tegra234 to match
hardware block names as well as the UART-D alias on Jetson TX1, and
enable PWM fans on Jetson TX1 and TX2.
Clean up serial port device tree nodes, add missing DMA properties,
enable the GPU on Jetson TX1 and Jetson TX2. Use an extended number of
address- and size-cells on Tegra186 to mirror what is done on other chip
generations.
Enable CEC on developer kit devices.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmgebs0ACgkQ3SOs138+
s6FaBA//fL1e+4jWhQ2NMm2HORgadgJjie+tDGZxgeDtG59fy61rlp9BYK9wCWrx
cLjwFPwDDGJ48xkZYzUw3PudgflBxLrZwC2WqLEsRDFo1O3drhvHvLYPD0v+BMu7
W8+0LhHKlqjRzJM3rR9NC2ScC5bv56uu8X295iiRxYQBGTWQzuLiog+XCTuE/pF7
3IrMqS+f8rY/GybAJhF9/K4aN4QVzd0KIclC0OGccQoE6YK+vYK12avKyfg3NIeo
GgfkC38j7D2pyCl9D4UWkAR44Hs2ON74Fmq8ejrYVNlZfzw48Z5onYqGFshkA0q+
SV+aXU0higipjW/YvRtf6thZVALeurtj44hJIi+FnUDjnEt+WdM/IeHqIlOzf4Xq
nzkr+ZBEsqMGf2nVP42MZU3hsZ/+5NYEm+ZdqOzFWm8yjoi2y9oacqI0Ck2Kzopk
S1Ap3jBZY1G7nUp1GZKC9mUyCf1JIU6EdrsFrwW9bpxhe6RjhIkNL9njqMPjFCm1
FtVfkZKVpzbzFy3Qm4Sny3/C4jcmnxaIwyGBobf6AyOpa3n/8c+V2C5tTtVSSPtb
Wfo80DTmdri+pt85q5YzydS0E3S7aIn5ibCjTvf/qaEO2SK5RMnD+teTiDBN5g8n
2PaYNKCYEE61znVWoaYTv+K8Hkk5HTdsdCkB9oAjt7XnZUSZGbc=
=SdCj
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgfGDEACgkQYKtH/8kJ
Uies4RAAz1KroZR/AbVCtN2H4GRSnJRriiCJwWvFcuw2eHn1VHx2nMf6sle04uy1
j2KJVPa9ebgyD4pxjpJ2iVa6397u1oYUm3URclUDsEKgCetwQ3XAzZV7fkDYwnU8
nLZ1p27/Rdb7utJHE9+ozeUo67c0ySWPOYzpLoSdzwQSfTygYLIj3ylkNY71TKZr
zN3upu7JAzubMrqtVMYq/g4mlF67qZ7h0GGw8m+KMqaX8pWgSRXWk4za2xC3ez5t
7Y/QDiO//irR8D7LlDRA3ZQzpfhIU6MOkujETDpeqvChnFtOe/6KE+FTnuZspZRA
n29+GFQqNW9v8CdMU9evStq7venwv2Bylc2Ou1Ic6yVUZd18J2DpI2oswLQ0oYbP
QpxkrcwjeyNBxvcfXa35rUIZ1GOQRCjNyllqfianV02ZsuazcRYONDmUHqsdFUqZ
Hy4W5wNl6puAPENsq87qlD+e/jvCaUx2azyOGtLjuqR9ex4FWAzvFUTvp79WCBou
j0qfMqvRdx3uvtVCGJUs0q77quSE5UMU0WDctSjXNERU3j8oFr6hyKC7CNVyquZt
VZsLA61wicDg2AsneiRfLzlr5JjF6kJ9Q8hw6QixsBt25uk+824rZ5y2ubyUwcLV
thPTP6XoYz7Ky+qxPjsb022t0YI1cVZ7vh52DjletClpMYQe4xM=
=nUi2
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.16-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.16-rc1
Enable IOMMU support for the internal DMA controller of the QSPI
controller, add aliases for the I2C controllers on Tegra234 to match
hardware block names as well as the UART-D alias on Jetson TX1, and
enable PWM fans on Jetson TX1 and TX2.
Clean up serial port device tree nodes, add missing DMA properties,
enable the GPU on Jetson TX1 and Jetson TX2. Use an extended number of
address- and size-cells on Tegra186 to mirror what is done on other chip
generations.
Enable CEC on developer kit devices.
* tag 'tegra-for-6.16-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Wire up CEC to devkits
arm64: tegra: Add CEC controller on Tegra210
arm64: tegra: Add fallback CEC compatibles
arm64: tegra: Add uartd serial alias for Jetson TX1 module
arm64: tegra: Bump #address-cells and #size-cells on Tegra186
arm64: tegra: p2180: Explicitly enable GPU
arm64: tegra: p3310: Explicitly enable GPU
arm64: tegra: Add DMA properties for Tegra186 and Tegra194 UARTs
arm64: tegra: Drop remaining serial clock-names and reset-names
arm64: tegra: Enable PWM fan on the Jetson TX2 Devkit
arm64: tegra: Enable PWM fan on the Jetson TX1 Devkit
arm64: tegra: Add I2C aliases for Tegra234
arm64: tegra: Configure QSPI clocks and add DMA
Link: https://lore.kernel.org/r/20250509212604.2849901-3-treding@nvidia.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- One more i.MX8MP nominal drive mode DT fix from Ahmad Fatoum to use
800MHz NoC OPP
- A imx8mp-var-som DT change from Himanshu Bhavani to fix SD card
timeout caused by LDO5
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmgeoVAACgkQUFdYWoew
fM7Ghgf6AgpSMZdzAmotrbhb7SRt38WRT9VJY8wfPTc8JSr4CB39EfjzzoJNyE7K
pNJyS5psljbKFj8UovMOIgrkpvvTevNGJATPXxDnuCLIngTM47uH4MpXTxy1a3MV
L1T4DfTljB1U6mDalrhjjwWwHfBR8cGb53Vv/A1OSn0jFCrvRnS6QEPorq5A/QaA
Gco9WeDh481HeN74n/H1vmNwtl2rlYNF0+c4HkWhb97DO7e3u+t2vWwe0WdF6NyL
1ZVNEaYNNWVYtdSRAz/AYcKS5cID1rfF3Iz6i3CDzN487VtwS7ogea7VSZTPn1l7
AxrvaZ/FYsdOmz12SDCYHaFR1znx+w==
=qSBA
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgfGA4ACgkQYKtH/8kJ
UifjBg//QslEUfifNF0vUtDtHcXfX4dHdo59+guso9j8OEz4geoyvgDQ7ztxbcOF
mrZhaEOcUgNc3Komso92XBZ6dnd7uvuFnCO3uyscA50RWzhY3fbg0wLFifXA4wqj
LeSTztTXZeGpIV5peqcGyXLqogR/4T6Y7blisn4vB75zDDcRiayDTy/VNx48lpVq
5auNg3wPghoGS5BSOzAeveP0oTUDXK2Tr98EhxJWGRs35cMwTsGmaYXKZU/SSALG
ARFQWka3ziuU8dcaBa9mMwOxGcrgfDdrcEKAJC+FyN6Za4+KTO771phS3u9KQebV
kbA64hYyCtqQy/7nAmq4FLJAlM3kP2tShs+FRG1JyhvG+rrU7WGoWQiqxa3r0MNR
648c1XxFwfB55OF/ScPxRv6ct7MBmE5mjlnEdZNeHo9A4YAV64P7AaiLTcbWasxs
dj0H6tDIE2vix028g8EnWswXnJRfeit6kF6GaUJZRsDBL5NAbh4sV23nRtSa+S3F
rjAnDrjQcrk9+rAuEHA8zsRFuI0OQQl94xD9ai8JpIlKLjqZmMskPnFlKFi3HeTh
kpjvT/WmTiqWGPMrm4xC/2UydJg6glmd0cm/e6bRc5nLA4mv4KqaOWzBDnSlTJQh
kifenqC6/c++hEYafQ+TDSia6f4zhGVw1AQgvZk4/ExOKX2E4n0=
=1v2Z
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-6.15-2' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 6.15, 2nd round:
- One more i.MX8MP nominal drive mode DT fix from Ahmad Fatoum to use
800MHz NoC OPP
- A imx8mp-var-som DT change from Himanshu Bhavani to fix SD card
timeout caused by LDO5
* tag 'imx-fixes-6.15-2' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8mp-var-som: Fix LDO5 shutdown causing SD card timeout
arm64: dts: imx8mp: use 800MHz NoC OPP for nominal drive mode
Link: https://lore.kernel.org/r/aB6h/woeyG1bSo12@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New peripherals: RNG+PCIe+SATA on rk3576; eDP on rk3588;
DMA+I2C+PWM on rk3528; DSI on rk3588
- SPI-flash binding got a supply-property, so a number of boards add
this supply.
- RK3588 wrongly declared the shared memory with SCMI in the peripheral
space - moved to the correct reserved-memory structure now.
- The rest is peripheral enablement accross many boards - like hdmi
output for a big number of boards, regulators, eeprom, etc.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmgb1wYQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgS6oB/wPyZaVADlf5ErSCQJU9ObV0zA0o5z9n9eO
yPKg7NIgE7OKpUiPFnTBr5YatCO1Bvxndvsxu4K0m9mCcc/S/bgW3ghf9d+X2+Ig
/9jl36Le89ve9MUi5UYP0s0AzD7Sn/LuBUN9W5Uy5JmQNLN6DJx9MMRyxbb+4FTX
Xos2s+TSQEjCva2R6tOfM9vWZCZxExMBzsbrrmKyKzwiS6+tjxu0ZNbysifA3gsb
KBAgHpcK6io9So1jq4+r+haQMFcj9Pb36CVJPERBCVSQsyMCthMpLGa6punZOfeS
DO0wPMAgPxzr9umzYxgnvEq8HHqhFz8sYoVEYFSMUGx0J68WrFfY
=+ZqB
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgea/UACgkQYKtH/8kJ
UiclvQ/9HiqVxPT9N4mZKc264YYA8MuC7z2R0/8PgvK2qnu93HleXHxqwGQGVbq8
e/siAXF5ROsgNqUYIFtcEp4Ym2oMBztyoY1qiBDIpxZOVGZ3vHe5hnRxMvZ1HBJ+
jjygwRIxeFP5PvguiNhapoJD/F1zQibk6wQY9Tcbr4vOb7WqZt5pUMVnEu90IlIl
hPIYDFm6FjvvQQ1i7IL7J4AUB9mffQq52WrQuBS96oU10R1Tltlu5jg6U8XC5lrm
4XCm/v+7NTsoZyK0y29VhXcpNkFxXJx9mhYp2+nmDH1MjbVXU9/H6A0i0UakLvuC
PtT5z1/SSFxqAVXwCp4l8EOCpJ6Jb2Ggkuntu2F40T/gJoHyUXvIWWXgibPNYQ5g
qpp2N8NDJxI84fl72zt+U1JRsYIUehWONJRCzBDwUeO8tKBSC/i5av9pba0oSrjy
p8XCaPSjDx4/CiAoZL4ug2OgP3/v+L2p48kqWfTXSEb5zDZnop4umuEaCVorjIJ2
WdIEtqaiYfo5MuFSHGm7vKwxnlD53oG/GklNbtjnw+2uBkLK3xYP1cbwqh7eYMZX
0iaglN0N/e48twbephwtc5r3yIU2vYEQ64fBdXNaN8kBze+AiFK4o2UBGxt/Ju7v
Lpd1s4iSUSgb2Vm/RTLJR3W1Cz3X0aB+Cw9C2XFsGmRsYec+JpA=
=yXtJ
-----END PGP SIGNATURE-----
Merge tag 'v6.16-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
- New boards: rk3588-evb2, rk3588-tiger-haikou-video-demo-overlay
- New peripherals: RNG+PCIe+SATA on rk3576; eDP on rk3588;
DMA+I2C+PWM on rk3528; DSI on rk3588
- SPI-flash binding got a supply-property, so a number of boards add
this supply.
- RK3588 wrongly declared the shared memory with SCMI in the peripheral
space - moved to the correct reserved-memory structure now.
- The rest is peripheral enablement accross many boards - like hdmi
output for a big number of boards, regulators, eeprom, etc.
* tag 'v6.16-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (52 commits)
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-rock3c
arm64: dts: rockchip: Enable regulators for Radxa E20C
arm64: dts: rockchip: Add pwm nodes for RK3528
arm64: dts: rockchip: Add onboard EEPROM for Radxa E20C
arm64: dts: rockchip: Add I2C controllers for RK3528
arm64: dts: rockchip: add RK3576 RNG node
arm64: dts: rockchip: Switch to undeprecated qcom,calibration-variant on RK3399
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-quartz64-b
arm64: dts: rockchip: Add phy-supply to gmac0 on NanoPi R5S
arm64: dts: rockchip: fix usb-c port functionality on rk3588-nanopc-t6
arm64: dts: rockchip: Enable bluetooth of AP6611s on OrangePI5 Max/Ultra
arm64: dts: rockchip: add SATA nodes to RK3576
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3588-rock-5b
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-pinetab2
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3399-rockpro64
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3328-rock64
arm64: dts: rockchip: Add vcc supply to spi flash on rk3399-roc-pc
arm64: dts: rockchip: enable pcie on Sige5
arm64: dts: rockchip: Add HDMI support for roc-rk3576-pc
arm64: dts: rockchip: Enable HDMI0 audio output for Indiedroid Nova
...
Link: https://lore.kernel.org/r/2307187.iZASKD2KPV@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 6.16, please pull the following:
- Stanimir adds and enables the PCIe root complex Device Tree nodes present on the
Raspberry Pi 5
- Rob updates the BCM2712 L2 cache node names to use a more comforming
name
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmgY7C0ACgkQh9CWnEQH
BwTvpxAAjAWMHd8lDmxLaqEEbnrxwkFVaohY4dre3YY10LLfGGGboGxSQ9zhdeh5
FZxRo3wSlPSJZnQuFDcO9+ww7YQy+0qXsf09/EhWqx9y/Pqt3TqeKD8IXGOMrwNC
lF7znyZGXsYDC3Cg8t0fFn3lLZKp50Crl4PEVqVqX0nrPZJFe4VnMx1yO/Tq724B
ZFBd2EoA1csA3FKRLP8TNpeKdyITwLZIllQZAuVHaj7vPDw7GYNFAS38L6chNUPH
ogSZGKRS9B0u9rVkXfiZZsl3PheK4duCVfn2Kc3oLi5OorRIzFbujJMyvHs0N7zW
V65MkU6iANg0SuL9NdBndCxQtAik+qojG0L33+nUif8+4wgcV/8ude99rl24Zlce
sJz7xnygQafP5MnVF2QeUl5DLVKUMOoErfBsOAr3UQMpu5FQk4HnW1yuSRyC/S08
/BQv7mxwy67ildEtGZ5qPdGk17ni4VtWbIEozE/kXKSJa2WzDneDe4LwVB296h9Q
WVDQLWnMCFxAOG1G3NKLpLU0x92pHTPraMu21kEqmedsPCt8tlKeto31f9g325jp
eRLJqWP/zhdhAi5OmP6tfHrQIuILkMrpg5kiJh9gn8SWnwevy1r0rwV1BFV9Vik9
T7Ei3j7J8tI2ifknm2ST3usp3n7IbxFba2gbiSMeehk9tyMF30E=
=mbv6
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgeaRUACgkQYKtH/8kJ
UietQw//a+2EzRI6Qr+ufF1EbQaqUvEjAyfBl1msG/ODDdMMgH6Oph61JUdHJtXB
EUHi6kBSTHQuzpE/hB0rqXQp67cvPdQALTVd1D6Wt09h7e2rfB817dtbJZQA5VG7
uQRVPxwxJS8Zh6hsu1kHRIK8zGKqoK0dNV8/SDpgGU4M/xdhlU2ub+8VoJREwY1a
NdPBncBqZhd4v+6dflDSL17QbERzG8LvUEatWI+IhKH2a68Sj1iO4+okgXiYSIe8
5saNzZfNrn156CDYu2vV9NNKyar+2xcSubZvEUJt4AcaZScXLTst31yPi+wKolNr
ZUCy+IHSLXk4sKwHLantjth5cyR4GiJyrz3Qx224e01GreCU/H628mBlnsHWXan7
tTPE/cNnbm/y3JjyQ1iIt/ft11NWf+5wfafi23mhmwyP9rmRt2hilfqZ/W5ok+ft
ILHffI7AE9bkT0fe8gLwoKUcgmZtazvVkiuph0JHxRHhJSiVl2SxrbJgB7ABYclK
iwtYaG2TKg9o6oZdDpjjBMM9KEJBvbfKlSUZ808sPePg9nql/vIg3yceqxr42Bct
1DA0J1U6bWnQfD8tXWkNdhzu9E6MrI2RDQrMEIjivg1ztSuXKHBxh4ekaTMCLnMD
kolX9xv6N36PbyYT7h5kTHZzEmuqnMQ3XsHODbYD/FVBw4iNnac=
=QRDp
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-6.16/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 6.16, please pull the following:
- Stanimir adds and enables the PCIe root complex Device Tree nodes present on the
Raspberry Pi 5
- Rob updates the BCM2712 L2 cache node names to use a more comforming
name
* tag 'arm-soc/for-6.16/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: bcm2712: Use "l2-cache" for L2 cache node names
arm64: dts: broadcom: bcm2712-rpi-5-b: Enable PCIe DT nodes
arm64: dts: broadcom: bcm2712: Add PCIe DT nodes
Link: https://lore.kernel.org/r/20250505165810.1948927-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 6.16, please pull the following:
- Arthur adds a pinctrl node for BCM21664 and updates BCM23550 to use
it, he also drops the DTS file for the BCM59056 PMU chip and leaving
that board level DTS files
- Stefan documents and adds support for the Raspberry Pi 2 2nd revision.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmgY7ccACgkQh9CWnEQH
BwRiwRAAgISBGDAbQcbr5UJJxBZ4+Bg/sGqtsLmcIurflcqRxv2IeRT+L/6ASP2B
W7hRoczQPlAuBVU1twPuT9O65Uxfg1fhvvkrBfaImgujLhcaHc8LGte74Fh0CkrM
WvrwbuRT1hy26zhJBAddEjP/NCslzsLdBu5KG89sLKy9ruBIWFPOD4W15pZD4ER2
zigthhrfHT/kyRVhSdL268Up9+PD3QeAyrXPWLGkonSjmJFrVYmQ7enAzZHs9VQw
EAu5bhmHzSFEdPrOb0YtJpT/QE3027XZkq11kE47+IF5LMcJ3LlG4ev/XEUbufoK
/lhmPRwhekz8Du5+H37R+rwzpBDBRUFwGgGAm8zMB6GDMWVZGi1JJbS93mBx+4Yv
EC71hXXq6Xqn6dllYPu/PF+pCWkamRvKjhJNq49ecCAkRqX2885QMdcC9M5V85eN
jTi9S2KQhRntv0PznW4A1Zw74BIyWXGoien5VdEE77CgbAIWRbmX+fpQHqNLzVyp
MNHq8dfgj3NJ7sTGwmsTYGqnRR6JhFahCTJK87wmfzX235ukzV6Ou7xgdLoxTxpO
TO+UjJwVz2cPJt6rFZ/y2M8AOvebIkkU8XaRWIspsRGdnLST2EpE+7oLrTFNSVtX
Xk81Qbi0csirSMfDIQMzC+AxESWAVOEvh04oNa8GFlBYb2vDOD0=
=UBkl
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgeaM0ACgkQYKtH/8kJ
UidKnw/8DsE2qqcGGWI3LuBJRUw6SfQRWgfMPMJa5vXTmo/VX2zQOe5ZXzhNSRMw
cbP9xaNci8rwqL5ibR+TWeJvnfsgSWtkrFJbyxGTT80n5Hrcr4fdtYHc9Qczlxqd
O7utKBlYiaP9dRH3Z5qIqYwhMZ6CNs52glXNXrDxzgcCjDExtvhNg/cZh636lfgM
BCeARMSzEp/8XI0Qdlje6mhxbf5P7ywPOVn1eqsqTkSMKlT++BLcS6+JWVREOhD9
pxeM7lPRZx4rohqN0sfxwL+W4Jv9pENuTs7aGlObHiSLl74XrznE+HmYDQkkqEaB
BP4oEk1vshFi4uQa4z3jI3y7xaqe3tz53MMjHSwknFHgVDFhSpRjEIh3skIzzAXM
/QkIfwqiKFvsTe9Y3yvFbE3DrYb5abB56JfU5edt97oEQ/R3yEyKw02HuiAOJpLp
ONl0doY4C88iwavWTR/GxKs7JorRO7JVGcibL2laPOenZHNTLjLxZKOgQMe7Z3mb
Z/mukSx8+dtlcgbaJ9PJ4rrVRSxPKyGNfPtx3kppFP8cLMWts1ipntlvHqC4T1Gi
hzglUp42eax/OWTmtmiC7WI1cNgZwZeE51+wQ8Iw6bCacNCLAvlBtSvpvLKpHD//
Ni3SuP6UKkJBBmWmvEKV4AHy1N5PKdJdmZexa29bE6zTlGKHoTU=
=Z7eF
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-6.16/devicetree' of https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM-based SoC Device Tree changes
for 6.16, please pull the following:
- Arthur adds a pinctrl node for BCM21664 and updates BCM23550 to use
it, he also drops the DTS file for the BCM59056 PMU chip and leaving
that board level DTS files
- Stefan documents and adds support for the Raspberry Pi 2 2nd revision.
* tag 'arm-soc/for-6.16/devicetree' of https://github.com/Broadcom/stblinux:
arm64: dts: bcm: Add reference to RPi 2 (2nd rev)
ARM: dts: bcm: Add support for Raspberry Pi 2 (2nd rev)
dt-bindings: arm: bcm2835: Add Raspberry Pi 2 (2nd rev)
ARM: dts: Drop DTS for BCM59056 PMU
ARM: dts: bcm2166x: Add bcm2166x-pinctrl DTSI
ARM: dts: bcm2166x-common: Add pinctrl node
Link: https://lore.kernel.org/r/20250505165810.1948927-1-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add CANFD support for the RZ/G3E SoC and the RZ/G3E SMARC Carrier-II
EVK development board,
- Add support for Ethernet port A, 9-pin D-sub serial, and USB on the
RZN1D-DB and RZN1D-EB development and expansion boards,
- Add sound support for the Retronix Sparrow Hawk board,
- Add General PWM Timer (GPT) support for the RZ/G2L and RZ/V2L SoCs
and SMARC EVK boards,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaB4GlwAKCRCKwlD9ZEnx
cLOfAQCFoWcQhJYFmb35RQLZ3s7XmlFQlsWG9dT+ouaHwimRugEAp6jE8W2ic1yy
HShotgcw4UN9e4jNq/UjmY9GJwK9KgY=
=GZb/
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgeaJsACgkQYKtH/8kJ
Uid/mw/+KLUcaECZLXOP9KpymKAQ3Cmww7q/n9L/+UGzUsfblX9KCEBLZvKFjdPq
482yD5ZoJKHNUsnOUw4mTfGMg9u5G4L1zmzK6DTTQhQqGOTT83U8fl9SkK/pZhbE
hyofbzTEuZs1f8X2mILQyAc4r3LRACOspmc1eV7CE00y5fa7t1HMiWVWjK4GkaMj
WNa9fUuxxURmX8aEO3g359dm7+1vW/+BijCcu3XuNKqug1YRRaN+1qcrIbsSdjF4
ZVhnB3VF1M5rGbqMQ7clayZ6v46qqjCVgXARNEORganaE4t3zQUxVPiP9DU2QcOB
ePvyHmWlxeEe/FmUZKlRGOh0nx/np6CmrK7Oz8xW0fPv1slvLL8da20BMCf1A7gr
/RHMx+F1myvScUKa7kVmKRsi7FalXhJX2cIJVLKHS5ljP2Q0dZkTgikgcqa3CCXm
mY+OtQNu5APIKHPROMC8gy7q+WYYiFh2oFcsZsONHVLVq6/PEKsQC8geLsNnDtQr
n4OiPaiqRkNjl1ey/+DzIxcuOYiRCZdPpwDRw0HfjRKM50RE4VfFnaCvf24H+YZF
3OQHIOgsKRfGqbrr3N2eiMdk8j8Cn79DwAafbqr9xoRmN1Dl1C85RL4d2aw3Z89p
ssK86I9IHhy5jrfPAnJynlr5ZUFgNrA+9vEq+PExjurUn+yN2k8=
=yRxl
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.16-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.16 (take two)
- Add CANFD support for the RZ/G3E SoC and the RZ/G3E SMARC Carrier-II
EVK development board,
- Add support for Ethernet port A, 9-pin D-sub serial, and USB on the
RZN1D-DB and RZN1D-EB development and expansion boards,
- Add sound support for the Retronix Sparrow Hawk board,
- Add General PWM Timer (GPT) support for the RZ/G2L and RZ/V2L SoCs
and SMARC EVK boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.16-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: renesas: r9a06g032-rzn1d400-eb: Enable USB host port
ARM: dts: renesas: r9a06g032-rzn1d400-db: Add pinmux for the CPLD
arm64: dts: renesas: white-hawk-single: Improve Ethernet TSN description
ARM: dts: renesas: r9a06g032-rzn1d400-db: Enable USB device port
ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe 9-pin D-sub serial port
arm64: dts: renesas: beacon-renesom: Align wifi node name with bindings
arm64: dts: renesas: rzg2l-smarc: Enable GPT on carrier board
arm64: dts: renesas: r9a07g054: Add GPT support
arm64: dts: renesas: r9a07g044: Add GPT support
arm64: dts: renesas: sparrow-hawk: Add MSIOF Sound support
ARM: dts: renesas: r9a06g032-rzn1d400-eb: Add GMAC1 port
arm64: dts: renesas: r9a09g047e57-smarc: Enable CAN Transceiver
arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFD
arm64: dts: renesas: r9a09g047: Add CANFD node
Link: https://lore.kernel.org/r/cover.1746798755.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add SDHI, ICU, I2C, PMIC, and GPU support on the RZ/G3E SoC and the
RZ/G3E SoM and SMARC Carrier-II EVK development board,
- Add internal SDHI regulator support on the RZ/V2H(P) SoC,
- Add UFS tuning parameters in E-FUSE on the R-Car S4-8 ES1.2 SoC,
- Add support for Ethernet ports C and D, I2C, keys, and SDHI on the
RZ/N1D SoC and the RZN1D-DB and RZN1D-EB development and expansion
boards,
- Add initial support for the RZ/V2N (R9A09G056) and the RZ/V2N EVK
board,
- Add support for the Retronix Sparrow Hawk board, which is based on
R-Car V4H ES3.0,
- Add ISP core support on R-Car V3U, V4H, and V4M,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaAtk+QAKCRCKwlD9ZEnx
cPhbAQDUvBdFFN8qHsr6dFmEnUw+iQSqW0l+Rtc9E3Lw/lB2qAD+PB34sVcOnuOi
hBP0ty3219WF8KYaAx1jOfJqA0doFQ8=
=whxP
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgeaDQACgkQYKtH/8kJ
Uic5aRAAhQno/+CnzHBwHimXMGFEBm5ozQTEeaF+Uv+O5yMV1aPk9+S2aAwrjNlY
e1B8SFXFAT5uZ7o3QEoJBpDcQYc2dfQtR1Q9r46zo3x3cXS9DSAO/rzm1hjzuXJm
CuGw98MTV6Mn1iX+GGjpVrwFGf57uAUEKm+Fzoz6OtHMRyPJb1sIPWoLEpGLKzMs
7yO/Dp9KObb8hNW8l0KD4/7wQBTdOELdSrp6VMhEcfw8cR7E0+IHloyqQT1ujROL
cdyuWyeSwVokP3VzJUBWpxeX2T7RH+FhqGfC0hrLmdkpL/uqHCwXWlhNZxcZwJZw
9tVA2WGg3ORt7LhTj/BUHtInpBrJPGaWHv6WZm/TMj9sw58lb9JHL+CeiwW7cCYW
AN5gzVRXO7mJD8XneeZVtSLkRqaG1uWZIdVhjfNZeGPBxOoC68Dq0jcAFWmeWReW
ZzRvK59/9b5pPXQKM2gUMN8FSvio2ihukbgJ2+zj4f6ijI6hYXWUaMWUrzrlkhr1
/d+hWWAcWitekVc2NGJuo1jz335Cmoy1TZn9xZMRVfR7l/SBK/mRl24+eS2IZUkC
hAUsdO+XxTcjYQboT6gJB5kRjjw0GggNyTffBswvTf0Y+y54KqK2y94V59n+VaaY
KjkA7sEEx8HhsP0Jecizo7utaxKXIZW/CDLOopS1W8L4ufso5Vw=
=aTIg
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.16
- Add SDHI, ICU, I2C, PMIC, and GPU support on the RZ/G3E SoC and the
RZ/G3E SoM and SMARC Carrier-II EVK development board,
- Add internal SDHI regulator support on the RZ/V2H(P) SoC,
- Add UFS tuning parameters in E-FUSE on the R-Car S4-8 ES1.2 SoC,
- Add support for Ethernet ports C and D, I2C, keys, and SDHI on the
RZ/N1D SoC and the RZN1D-DB and RZN1D-EB development and expansion
boards,
- Add initial support for the RZ/V2N (R9A09G056) and the RZ/V2N EVK
board,
- Add support for the Retronix Sparrow Hawk board, which is based on
R-Car V4H ES3.0,
- Add ISP core support on R-Car V3U, V4H, and V4M,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (29 commits)
arm64: dts: renesas: r8a779h0: Add ISP core function block
arm64: dts: renesas: r8a779g0: Add ISP core function block
arm64: dts: renesas: r8a779a0: Add ISP core function block
arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support
arm64: dts: renesas: rzg3e-smarc-som: Enable Mali-G52
arm64: dts: renesas: r9a09g047: Add Mali-G52 GPU node
arm64: dts: renesas: rzg3e-smarc-som: Add RAA215300 pmic support
arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol
ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe SD card port
ARM: dts: renesas: r9a06g032: Describe SDHCI controllers
arm64: dts: renesas: Add initial device tree for RZ/V2N EVK
arm64: dts: renesas: Add initial SoC DTSI for RZ/V2N
dt-bindings: pinctrl: renesas: Document RZ/V2N SoC
dt-bindings: clock: renesas: Document RZ/V2N SoC CPG
dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC
dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK
ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe keys
ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe I2C bus
ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe I2C bus
ARM: dts: renesas: r9a06g032: Describe I2C controllers
...
Link: https://lore.kernel.org/r/cover.1745582596.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix a couple of node name warnings from the schema checks:
arch/arm64/boot/dts/amazon/alpine-v2-evp.dt.yaml: io-fabric: $nodename:0: 'io-fabric' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
arch/arm64/boot/dts/amazon/alpine-v3-evp.dt.yaml: io-fabric: $nodename:0: 'io-fabric' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250409210255.1541298-1-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add ROCK 5B+, which is an improved version of the ROCK 5B with the
following changes:
* Memory LPDDR4X -> LPDDR5
* HDMI input connector size
* eMMC socket -> onboard
* M.2 E-Key is replaced by onboard RTL8852BE WLAN/BT
* M.2 M-Key 1x4 lanes is replaced by 2x2 lanes
* Added M.2 B-Key for USB connected WWAN modules (untested)
* Add second camera port (not yet supported in upstream Linux)
* Add dedicated USB-C port for device power (no impact in DT;
the existing port has not been changed and the new port is
handled by CH224D standalone chip)
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-4-677033cc1ac2@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Radxa released some more boards, which are based on the original
Rock 5B. Move its board description into an include file to avoid
unnecessary duplication.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-1-677033cc1ac2@kernel.org
Link: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-2-677033cc1ac2@kernel.org
[The original submission was split into two elements, renaming the file
and then moving some nodes around. This was done to make review easier
due to the diff being smaller. This commit is a squash of both of them
to facilitate bisectability and was also intended by the original author]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With the hdmi_sound node added to the base RK3576 SoC tree, we can now
enable it on the Sige5 SBC.
Do this, and also enable the corresponding SAI6 audio controller node.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250506-rk3576-sai-v4-4-a8b5f5733ceb@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The ArmSoM Sige5 board features an Everest ES8388 codec to provide
analog stereo audio output, as well as analog audio input. The codec
hangs off the i2c2 bus and responds to address 0x10. It is connected to
the SAI1 audio controller of the RK3576, with one SDO (output) lane and
one SDI (input) lane.
The codec has two sets of outputs. One set, LOUT1/ROUT1, is connected
through a set of 22uF non-polarised coupling capacitors to a 3-position
connector that appears to be a clone of the JST BM03B-SURS-TF header,
and is capable of mating with a JST 03SUR-32S (or JST 03SUR-36L if you
prefer lemon-lime) or compatible clone connector. The right headphone
output is the one closest to the Type-C DC input connector, the left
headphone output is the one in the middle, and the third position, the
one closest to the USB3 Type-A host connector, is puzzingly labelled as
"HP_GND" in the schematic but is in fact connected to the codecs RIN1
input through a 1uF non-plarised coupling capacitor.
LOUT2 and ROUT2 are routed to 1mm test pads T36 and T37 respectively.
These are located on the bottom of the board, and do not go through any
coupling capacitor. For use as line out, the ES8388 datasheet recommends
adding 1uF coupling capacitor if one wishes to use it as a line-level
output.
There is also a pair of inputs for a stereo microphone, going from two
1mm testpads T34 and T35, which are decoupled with a 100pF capacitor and
pulled to 3.3v and ground respectively. These inputs then go through 1uF
capacitors each and end up in the LINPUT2 and RINPUT2 pins of the
ES8388 codec.
The codec's power inputs are routed to receive 3.3V for both its analog
and digital inputs, though from different supplies.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250506-rk3576-sai-v4-3-a8b5f5733ceb@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK3576 SoC now has upstream support for HDMI.
Add an HDMI audio node, which uses SAI6 as its audio controller
according to downstream.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250506-rk3576-sai-v4-2-a8b5f5733ceb@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK3576 SoC has 10 SAI controllers in total. Five of them are in the
video output power domains, and are used for digital audio output along
with the video signal of those, e.g. HDMI audio.
The other five, SAI0 through SAI4, are exposed externally. SAI0 and SAI1
are capable of 8-channel audio, whereas SAI2, SAI3 and SAI4 are limited
to two channels. These five are in the audio power domain.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250506-rk3576-sai-v4-1-a8b5f5733ceb@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
RK3528 features two SDIO controllers and one SD/MMC controller, describe
them in devicetree. Since their sample and drive clocks are located in
the VO and VPU GRFs, corresponding syscons are added to make these
clocks available.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250508234829.27111-3-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This tag contains two small commits since rc1:
- Add a .mailmap entry requested by Asahi Lina to better filter her
emails
- Mark the power domains for the touchbar support introduced with 6.15
as always on since the driver cannot initialize the touchbar from
scratch after the domains are powered off (e.g. during suspend).
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQS3vz815OHsEaWy0u9EEX0kKnUe6QUCaAj9TQAKCRBEEX0kKnUe
6UqPAP9Qjep3S12BKIReeAmjICirSP+Psp+n9G7mGMucEvw99QEAiSqYJ632k3rb
fYOgTvf0GNF5TNCwfhmqIqu/fNOKfA8=
=21TP
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgeJwgACgkQYKtH/8kJ
UicHYg//bnjMWhuwJYovQzboqJqHLXlgCpdsSl7PnIdUeOu6SlUjFLAmRBYcmdGH
tErKv1MbiC1k9qyZH0f4M6kaPQ2NVrYjZZ5q77/E+m0XV9Y8JMk/EZqpOW5xwoUC
fTJ7VNu/8J/9iXK7GJKjG5PVdqa9l4Tpid8BNRU6iX4vEMsOfMIRTBldTAOG2olu
rrusybMng/MUfTTGKzM9iZBgbLSJWQaQMraLzF0/SAGCuiCZqAtCdILToHr9vCXR
cs9PiV5hhgDqH15E/jKZhApgT4p+NE4UcxVPtwsmWvJLUSFPybO0I+lBkY23uJ8k
Kxggis4/qiEET7mMpvcorjF0rfEEJcM/ib0+OURBAH5Vbi85N43HeRwlSzNdqxKm
Z968cWyePq8M/XIDpkZCujPqar1jUFsmDIjTwRFtN04Xn83vSC5OEkRpKpNWj0gA
/AwgZ7BSM/hv9z/p9Aixi7MXcf5nq4qrXJ0nvzfp6nwkYwbbcbqwKks8LViNKtpq
mgpS/T7cvWx156+7S1WmGfoqnfPRrOdSMod0PIiFj2EE7iIb1elMEy1jHX52LmTy
JeTqktQ4MxgfDy4/EdAv+f1D4fL04n+zKYEoW42DCYq7/BYP3Ua645ZtFo5LA2QC
UxwcQxjq0mJlnPHI4MGq9+DUemEt6IldxZOM+Y3qVdOPsXHNZ30=
=j+tN
-----END PGP SIGNATURE-----
Merge tag 'asahi-soc-fixes-6.15' of https://github.com/AsahiLinux/linux into arm/fixes
Apple SoC fixes for 6.15
This tag contains two small commits since rc1:
- Add a .mailmap entry requested by Asahi Lina to better filter her
emails
- Mark the power domains for the touchbar support introduced with 6.15
as always on since the driver cannot initialize the touchbar from
scratch after the domains are powered off (e.g. during suspend).
* tag 'asahi-soc-fixes-6.15' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: touchbar: Mark ps_dispdfr_be as always-on
mailmap: Update email for Asahi Lina
Link: https://lore.kernel.org/r/20250423145047.3098-1-sven@svenpeter.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
a number of smaller fixes: Turing RK1 fan can spin down again, fixed pins,
pinmuxing and clocks and some devicetree-correctnes improvements.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmgXxVwQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgVHzB/wJZ0ztk8moYIK/6OVk7lPxkfIPuD59frHt
EAz7COX8WqLni3q18FfqkjlONkXXbnRY//9cuw6ReLaFDJw3l5LcNtv1xLzxFi84
Z2O/mzeotTnoJN5PRhQXKn+aqU+zb4GRaJQvUAXKVgwJJSpOLS49j68108Pd8ckv
miv/X9iaLM6eZNjfixSaZjAlbE72npSATNi+HmKLWg/KceiZgSAoyV5Ar1pZqnDh
slgMScCfUu80sYRzYit9jGBDQWlP8iBSch/9RF9j00TDG8EkZ2Q+VYbu4wX/LzFB
78R1X4ZWj3b+0J8vYwGZc8Aa/oC5yI969SSS+WypL0N8XJojKkDV
=+au0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgeJfMACgkQYKtH/8kJ
UidWyA//VWKbAAuYfiRVt8e+Quml7v/ISmWvGlrnGxgfJd6pXlOihEaeMFxKwU/h
uUl6xvsuRuIEPNq6hgVuKG6BFI8rc3LKK/mnsD2CkEphgBuXPfJd2YI6gBpyZiZ8
MRbUZcZHctDwlcUL8Q+Po6nrLrffV2sehw6LwRVWNAfXQ3qOnuZix8k5lHtbslvY
k3OWANpdDyb/BEA8cT0x4Izl4uC1ltEzm/Xi3Mv54Jx+ioFkUZ75PHFiD1BKjWNH
Eugv1rAVaHw7VBmweDB8Y2SYJR5ZMhERLRWoo+s2ALXYNXcKeMxGTMxu6gZj9Z7p
YYFe+4QWCLXqExPEp54Nd5wyvFfsf7PxsMfx2LkcnDuCSe63x7XQkbF0xiuRhOHB
PpqfSfgfI2s8PENBlIZGDzxwWgJHMurve+mf4hIyoLg0QiHmo50Lh24cNkErpXwO
KNkIDyIHcdJruDUSGglX2QEb6DF8RbuhZ+pSY+Dn1fNtCYSw8dneF9IdKgPS/+sE
c77+2u5Otby8cDLcPPwyJzzFdRIPZp7Etw8AnebnEzoSMEgTO3OFZp4RcA8PY1m0
94T/c81IqsCbOTI51XQ3pObBWZRYPX2jl8aupIO3XbOqsM73gbFMmeVIlt+2vuyi
dQSIowB72v9oHVLKjvBq13CbTvhCVijam0z+WrYtf+6K0KxW1Sg=
=+lfn
-----END PGP SIGNATURE-----
Merge tag 'v6.15-rockchip-dtsfixes1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Removal of operating-points above what the rk3588j soc is rated for, and
a number of smaller fixes: Turing RK1 fan can spin down again, fixed pins,
pinmuxing and clocks and some devicetree-correctnes improvements.
* tag 'v6.15-rockchip-dtsfixes1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: fix Sige5 RTC interrupt pin
arm64: dts: rockchip: Assign RT5616 MCLK rate on rk3588-friendlyelec-cm3588
arm64: dts: rockchip: Align wifi node name with bindings in CB2
arm64: dts: rockchip: Fix mmc-pwrseq clock name on rock-pi-4
arm64: dts: rockchip: Use "regulator-fixed" for btreg on px30-engicam for vcc3v3-btreg
arm64: dts: rockchip: Add pinmuxing for eMMC on QNAP TS433
arm64: dts: rockchip: Remove overdrive-mode OPPs from RK3588J SoC dtsi
arm64: dts: rockchip: Allow Turing RK1 cooling fan to spin down
Link: https://lore.kernel.org/r/2923598.88bMQJbFj6@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add initial support for PHYTEC phyBOARD-Nash-i.MX93 board [1] based on
the PHYTEC phyCORE-i.MX93 SoM (System-on-Module) [2].
Supported board features:
* ADC
* CAN
* Ethernet
* EEPROM
* RTC
* RS-232/RS-485
* SD-card
* TPM 2.0
* USB
For more details see the product pages for the development kit and the
SoM:
[1] https://www.phytec.eu/en/produkte/development-kits/phyboard-nash/
[2] https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix SD card timeout issue caused by LDO5 regulator getting disabled
after boot.
The kernel log shows LDO5 being disabled, which leads to a timeout
on USDHC2:
[ 33.760561] LDO5: disabling
[ 81.119861] mmc1: Timeout waiting for hardware interrupt.
To prevent this, set regulator-boot-on and regulator-always-on for
LDO5. Also add the vqmmc regulator to properly support 1.8V/3.3V
signaling for USDHC2 using a GPIO-controlled regulator.
Fixes: 6c2a1f4f71 ("arm64: dts: imx8mp-var-som-symphony: Add Variscite Symphony board and VAR-SOM-MX8MP SoM")
Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Acked-by: Tarang Raval <tarang.raval@siliconsignals.io>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use generic node name for the SoM GPIO expander, following the
Devicetree Specification generic node names recommendation.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add gpio expander node to the device tree and the related nodes.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the embedded controller node to the device tree, this is required
for reset and power-off functionalities.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Configure correctly the FAN pwm output (inverted).
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Using the MDIO pins with Open Drain causes spec violations of the
signals. Revert the changes.
This is similar to commit 14e66e4b13 ("Revert "arm64: dts:
imx93-tqma9352-mba93xxca: enable Open Drain for MDIO"")
Fixes: e5bc07026f ("arm64: add initial device tree for TQMa93xx/MBa91xxCA")
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add initial support for TQMa95xxSA module compatible to SMARC-2.
There is a common device tree for all variants with e.g. reduced CPU count.
It supports LPUART7 for console, CAN, PCIe I2C, SPI, USB3.0, USB2.0, Audio,
SDHC1/2 and QSPI as storage.
[1] https://www.tq-group.com/en/products/tq-embedded/arm-architecture/tqma95xxsa/
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit 3c3606793f ("dt-bindings: wireless: bcm4329-fmac: Use
wireless-controller.yaml schema"), bindings expect 'wifi' as node name:
imx8mm-var-som-symphony.dtb: bcrmf@1: $nodename:0: 'bcrmf@1' does not match '^wifi(@.*)?$'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds support for TQMa8XQPS and TQMa8XDPS modules on MB-SMARC-2 board.
As the only difference is the mounted SoC, both module and baseboard
files are shared.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This overlay configures IMX219 MIPI-CSI-2 camera attached to ISP1.
Also add additional overlay both using LVDS display and camera.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds an overlay for the supported LVDS display tianma tm070jvhg33.
The LVDS interface is the same as for MBa8MPxL so the already existing
overlay can be reused on this platform.
Signed-off-by: Martin Schmiedel <Martin.Schmiedel@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the minimal board dts support for i.MX943 EVK. Only the console uart,
SD & eMMC are enabled for linux basic boot.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the minimal dtsi support for i.MX943. i.MX943 is the first SoC of
i.MX94 Family, create a common dtsi for the whole i.MX94 family, and the
specific dtsi part for i.MX943.
The clock, power domain and perf index need to be used by the device nodes
for resource reference, add them along with the dtsi support.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
TechNexion TEVI OV5640 camera is a 5MP camera that can be used with
J722S EVM through the 22-pin CSI-RX connector. Add a reference overlay
for quad TEVI OV5640 modules on J722S EVM.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250509091911.2442934-5-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
RPi v2 Camera (IMX219) is an 8MP camera that can be used with J722S EVM
through the 22-pin CSI-RX connector. Add a reference overlay for quad
IMX219 RPI camera v2 modules on J722S EVM
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250509091911.2442934-4-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
J722S EVM has the CSI2RX routed to a MIPI CSI connector and to 22-pin RPi
camera connector through an analog mux with GPIO control, model mux so
that an overlay can control the mux state according to connected cameras.
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250509091911.2442934-3-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Add device tree nodes for two regulators on the J722S-EVM. VSYS_3V3 is the
output of LM5141-Q1, and it serves as an input to TPS22990 which produces
VSYS_3V3_EXP [1]. VSYS_3V3_EXP serves as vin-supply to CSI RPI Connectors.
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
[1]: https://www.ti.com/lit/zip/sprr495
Link: https://lore.kernel.org/r/20250509091911.2442934-2-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The main rti4 watchdog timer is used by the C7x DSP, so reserve the
timer in the linux device tree.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250507070008.1231611-4-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
For every remote processor, set up dedicated memory regions and
associate the required mailbox channels. Allocate two memory areas
per remote core: one 1MB region for vring shared buffers, and
another for external memory used by the remote processor for its
resource table and trace buffer.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250507070008.1231611-3-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
For every remote processor, set up dedicated memory regions and
associate the required mailbox channels. Allocate two memory areas
per remote core: one 1MB region for vring shared buffers, and
another for external memory used by the remote processor for its
resource table and trace buffer.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250507070008.1231611-2-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
Rename 'main0_thermal_trip0' to a more descriptive name that
includes 'fan', as the current name is too generic for a fan control
trip point.
Move the fan to a new cooling map to avoid overwriting the passive
trip point used for CPU frequency throttling when this overlay is
enabled. Also, add the fan to the existing cooling map.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250506114134.3514899-2-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
Enable throttling down the CPU frequency when an alert temperature
threshold (lower than the critical threshold) is reached.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250506114134.3514899-1-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
The needed drivers to support PCIe for i.MX 8QXP have been
added.
Configure PCIe for the Colibri iMX8X SoM.
The pcieb block is connected to the on module Wi-Fi/BT module.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move pinctrl_uart1 to keep nodes in alphabetical order. No functional
changes.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the carrier-board Micrel KSZ8081 Ethernet PHY. This is a
10/100Mbit PHY connected to the EQOS interface and shares MDIO bus with
the Ethernet PHY located on the SoM (FEC interface).
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for I2S audio found on phyBOARD-Segin-i.MX93. Audio codec
TLV320AIC3007 is connected to SAI1 interface as a DAI master. MCLK is
provided from the SAI's internal audio PLL (19.2 MHz).
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for both USB controllers. Set first controller in OTG mode
(USB micro-AB connector X8) and the second one in host mode (USB type A
connector X7) by default.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for CAN networking on phyBOARD-Segin-i.MX93 via the flexcan1
interface. The CAN PHY chip SN65HVD234D used on the board is compatible
with the TCAN1043 driver using the generic "can-transceiver-phy" and is
capable of up to 1Mbps data rate.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for RTC connected via I2C on phyBOARD-Segin-i.MX93. Set
default RTC by configuring the aliases.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Implement fix for i.MX 93 silicon errata ERR052021.
ERR052021 uSDHC: Sometimes uSDHC does not work under VDD_SOC low
drive mode and nominal mode
Description:
uSDHC PADs have one integration issue.
When CMD/DATA lines direction change from output to input, uSDHC
controller begin sampling, the integration issue will make input
enable signal from uSDHC propagated to the PAD with a long delay,
thus the new input value on the pad comes to uSDHC lately. The
uSDHC sampled the old input value and the sampling result is wrong.
Workaround:
Set uSDHC CMD/DATA PADs iomux register SION bit to 1, then PADs will
propagate input to uSDHC with no delay, so correct value is sampled.
This issue will wrongly trigger the start bit when sample the USDHC
command response, cause the USDHC trigger command CRC/index/endbit
error, which will finally impact the tuning pass window, especially
will impact the standard tuning logic, and can't find a correct delay
cell to get the best timing.
Based on commit bb89601282 ("arm64: dts: imx93-11x11-evk: set SION for
cmd and data pad of USDHC").
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Until now, all usdhc2 (SD-card) pinctrl labels pointed to one pinctrl
group "usdhc2grp" which was overwritten twice by the 100 and 200 MHz
modes. Fix this by using unique pinctrl names.
Additionally, adjust MX93_PAD_SD2_CLK__USDHC2_CLK pad drive-strength
according to values obtained by measurements from the PHYTEC hardware
department to improve signal integrity.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add disable-wp flag (write-protect) to usdhc2 node (SD-card) to get rid
of the following kernel boot warning:
host does not support reading read-only switch, assuming write-enable
Micro SD cards can't be physically write-protected like full-sized
cards anyways.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
