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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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arm64: dts: imx8mp-var-som-symphony: Add Variscite Symphony board and VAR-SOM-MX8MP SoM
Adds the DTSI file for the Variscite VAR-SOM-MX8MP System on Module which is delivered with the Variscite Symphony Evaluation Kit. Initial support includes: - Serial console - eMMC - SD card Signed-off-by: Tarang Raval <tarang.raval@siliconsignals.io> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Tarang Raval
Shawn Guo
parent
1a15e6751e
commit
6c2a1f4f71
@ -181,6 +181,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb
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11
arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
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11
arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
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@ -0,0 +1,11 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2024 Variscite Ltd.
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*/
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#include "imx8mp-var-som.dtsi"
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/ {
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model = "Variscite VAR-SOM-MX8M-PLUS on Symphony-Board";
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compatible = "variscite,var-som-mx8mp-symphony", "variscite,var-som-mx8mp", "fsl,imx8mp";
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};
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359
arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi
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359
arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi
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@ -0,0 +1,359 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2024 Variscite Ltd.
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*
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* Author: Tarang Raval <tarang.raval@siliconsignals.io>
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*/
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/dts-v1/;
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/usb/pd.h>
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#include "imx8mp.dtsi"
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/ {
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model = "Variscite VAR-SOM-MX8M Plus module";
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chosen {
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stdout-path = &uart2;
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};
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gpio-leds {
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compatible = "gpio-leds";
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led-0 {
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function = LED_FUNCTION_POWER;
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gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x0 0x40000000 0 0xc0000000>,
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<0x1 0x00000000 0 0xc0000000>;
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};
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reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
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compatible = "regulator-fixed";
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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off-on-delay-us = <12000>;
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};
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};
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&A53_0 {
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cpu-supply = <&buck2>;
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};
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&A53_1 {
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cpu-supply = <&buck2>;
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};
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&A53_2 {
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cpu-supply = <&buck2>;
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};
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&A53_3 {
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cpu-supply = <&buck2>;
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic@25 {
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compatible = "nxp,pca9450c";
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reg = <0x25>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio5>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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buck1: BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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buck2: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <2187500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-run-voltage = <950000>;
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nxp,dvs-standby-voltage = <850000>;
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};
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buck4: BUCK4 {
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regulator-name = "BUCK4";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5: BUCK5 {
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regulator-name = "BUCK5";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6: BUCK6 {
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regulator-name = "BUCK6";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <3400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1: LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <1600000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2: LDO2 {
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regulator-name = "LDO2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3: LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4: LDO4 {
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regulator-name = "LDO4";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo5: LDO5 {
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regulator-name = "LDO5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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};
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};
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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/* GPIO expander */
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pca9534: gpio@20 {
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compatible = "nxp,pca9534";
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reg = <0x20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pca9534>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
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wakeup-source;
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usb3-sata-sel-hog {
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gpio-hog;
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gpios = <4 0>;
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output-low;
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line-name = "usb3_sata_sel";
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};
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};
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};
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/* Console */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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/* SD-card */
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_usdhc2_vmmc>;
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bus-width = <4>;
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status = "okay";
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};
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/* eMMC */
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SD1_DATA4__I2C1_SCL 0x400001c2
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MX8MP_IOMUXC_SD1_DATA5__I2C1_SDA 0x400001c2
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
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MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
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>;
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};
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pinctrl_pca9534: pca9534grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0xc0
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>;
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};
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pinctrl_pmic: pmicgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04 0x1c0
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40
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MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40
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>;
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};
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pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x1c4
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MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x10
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MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0xc0
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
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MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
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MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
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MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
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MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
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MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
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MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
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MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
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MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
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MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
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MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
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MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
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MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
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MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
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MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
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MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
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MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
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MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
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MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
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MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
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MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
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MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
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MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
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MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
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MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
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MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
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fsl,pins = <
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MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
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MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
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MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
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MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
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MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
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MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
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MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
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MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
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MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
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MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
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MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
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fsl,pins = <
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MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
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MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
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MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
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MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
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MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
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MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
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MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
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MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
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MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
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MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
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MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
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>;
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6
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>;
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};
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};
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