Commit Graph

10684 Commits

Author SHA1 Message Date
Joel Selvaraj
efbd359915 arm64: dts: qcom: sdm845-xiaomi-beryllium: change firmware path and use mbn format
The "qcom/sdm845/" path conflicts with db845c's firmware that are
present in the linux-firmware package. Xiaomi uses their own signed
firmware for Poco F1 and can't use the db845c's firmware. So let's
use "qcom/sdm845/beryllium/" to distinguish Poco F1's firmware files.

For easier handling and packaging, the mdt+bXX files are squashed
using Bjorn Andersson's pil-squasher tool from this link:
https://github.com/andersson/pil-squasher

Signed-off-by: Joel Selvaraj <jo@jsfamily.in>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/BY5PR02MB700966DEE6F6044EBEB5B892D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19 12:38:14 -05:00
Krzysztof Kozlowski
fc0e7dd6d2 arm64: dts: qcom: do not use underscore in BCM node name
Align BCM voter node with DT schema by using hyphen instead of
underscore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411085935.130072-3-krzysztof.kozlowski@linaro.org
2022-04-19 12:25:19 -05:00
Vladimir Zapolskiy
fccf8e31ac arm64: dts: qcom: sm8450: Add thermal zones
Add thermal zones handled by tsens sensors. The definitions and the trip
points were taken from the downstream dts. For the CPU core thermal
sensors, the trip points were changed to follow the example of other
Qualcomm platforms.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410234458.1739279-3-dmitry.baryshkov@linaro.org
2022-04-19 12:17:00 -05:00
Vladimir Zapolskiy
48995e8633 arm64: dts: qcom: sm8450: Add thermal sensor controllers
The change adds description of two thermal sensor controllers found
on SM8450.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410234458.1739279-2-dmitry.baryshkov@linaro.org
2022-04-19 12:16:59 -05:00
Michael Srba
1ed29355df arm64: dts: qcom: msm8998: reserve potentially inaccessible clocks
With the gcc driver now being more complete and describing clocks which
might not always be write-accessible to the OS, conservatively specify
all such clocks as protected in the SoC dts.
The board dts - or even user-supplied dts - can override this property
to reflect the actual configuration.

Signed-off-by: Michael Srba <michael.srba@seznam.cz>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411072156.24451-6-michael.srba@seznam.cz
2022-04-19 12:07:24 -05:00
Krzysztof Kozlowski
65b96377bf arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
which is also easier to read.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220306111125.116455-10-krzysztof.kozlowski@canonical.com
2022-04-19 12:06:54 +02:00
Geert Uytterhoeven
8ba8560d4f arm64: dts: renesas: r8a779f0: Add GPIO nodes
Add device nodes for the General Purpose Input/Output (GPIO) blocks on
the Renesas R-Car S4-8 (R8A779F0) SoC.

Note that GPIO blocks 4-7 are not added, as they can only be accessed
from the Control Domain.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7fb68561026fa8bb5d9baf0596560c5c719a38cc.1649086225.git.geert+renesas@glider.be
2022-04-19 10:27:36 +02:00
Tim Harvey
7899eb6cb1 arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support
The Gateworks GW7400 is an ARM based single board computer (SBC)
featuring:
 - i.MX8M Plus SoC
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller (GSC)
 - QOS GbE
 - Microchip GbE Switch
 - Multiple multi-protocol RS232/RS485/RS422 Serial ports
 - USB 3.0 Front panel connector
 - onboard 802.11ac WiFi / BT
 - 3x miniPCIe socket with PCIe and USB 2.0
 - 1x M.2 B/A-E socket with PCIe, USB 3.0 and dual nano-SIM sockets
 - off-board connectors for: MIPI DSI, MIPI CSI, SPI, GPIO, I2C
 - Wide range DC power input
 - Passive PoE
 - 802.3at PoE

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18 20:41:52 +08:00
Tommaso Merciai
b5f955c099 arm64: dts: imx8mm-evk: add pwm1/backlight support
Add pwm1/backlight support nodes for imx8mm_evk board.
Align with u-boot dts

References:
 - https://patchwork.ozlabs.org/project/uboot/patch/20220326111911.13720-9-tommaso.merciai@amarulasolutions.com/

Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18 20:11:34 +08:00
Michael Walle
e7fc48e6c7 arm64: dts: imx8mn: add 8MNANOD3L-EVK device tree
Add a device tree for the 8MNANOD3L-EVK eval board which features an
IMX8MN SoC. It is similar to the 8MNANODLPD4-EVK eval board except it
has an IMX8MN UltraLite SoC and DDR3L memory. It esp. differs in the
PMIC configuration because the SoC has a smaller package and thus the
ARM core voltage is combined with the SoC voltage and the DDR voltage
is 1.35V for the DDR3L memory.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18 20:06:26 +08:00
Tim Harvey
d9a9a7cf32 arm64: dts: imx8m{m,n}-venice-*: add missing uart-has-rtscts property to UARTs
Add the missing 'uart-has-rtscts' property to UART's that have hardware
flow control capability.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18 16:31:43 +08:00
Ming Qian
0d9968d984 arm64: dts: freescale: imx8q: add imx vpu codec entries
Add the Video Processing Unit node for IMX8Q SoC.

Signed-off-by: Ming Qian <ming.qian@nxp.com>
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18 16:10:10 +08:00
Adam Ford
746a72411c arm64: dts: imx8mp: Enable HS400-ES
The SDHC controller in the imx8mp has the same controller
as the imx8mm which supports HS400-ES. Change the compatible
fallback to imx8mm to enable it, but keep the imx7d-usdhc
to prevent breaking backwards compatibility.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18 16:08:05 +08:00
Adam Ford
472f20b4f2 arm64: dts: imx8mn: Enable HS400-ES
The SDHC controller in the imx8mn has the same controller
as the imx8mm which supports HS400-ES. Change the compatible
fallback to imx8mm to enable it, but keep the imx7d-usdhc
to prevent breaking backwards compatibility.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18 16:07:43 +08:00
Arnd Bergmann
1808b184a3
Merge branch 'v5.18/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/fixes
* 'v5.18/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: meson-sm1-bananapi-m5: fix wrong GPIO pin labeling for CON1
  arm64: dts: remove cpu compatible "arm,armv8" for s4
  arm64: dts: meson: remove CPU opps below 1GHz for SM1 boards
  arm64: dts: meson: remove CPU opps below 1GHz for G12B boards

Link: https://lore.kernel.org/r/1132bd6e-cd29-6e58-1fae-38e074545b25@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-14 23:01:22 +02:00
Arnd Bergmann
803fa58dfa i.MX fixes for 5.18:
- Increase DOMAIN_MAX_CLKS in imx8m-blk-ctrl driver to fix an ISI hang
   on i.MX8MN.
 - Fix spi-tx-bus-width on imx8mq-tqma8mq board.
 - Fix an SGTL5000 detection issue by moving MCLK pinctrl into SGTL5000
   codec node.
 - Fix spi2 pin configuration on imx8mm-venice board.
 - Fix SCU clock controller's compatible property for i.MX8QM.
 - Fix SAI device compatible for i.MX8MN.
 - A couple of fixes from Rob to address issues in boolean properties
   and touchscreen property sizes.
 - Fix OTG controller over-current configuration for imx8mm-venice-gw
   boards.
 - Fix NULL but dereferenced coccicheck error in imx-weim driver.
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Merge tag 'imx-fixes-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.18:

- Increase DOMAIN_MAX_CLKS in imx8m-blk-ctrl driver to fix an ISI hang
  on i.MX8MN.
- Fix spi-tx-bus-width on imx8mq-tqma8mq board.
- Fix an SGTL5000 detection issue by moving MCLK pinctrl into SGTL5000
  codec node.
- Fix spi2 pin configuration on imx8mm-venice board.
- Fix SCU clock controller's compatible property for i.MX8QM.
- Fix SAI device compatible for i.MX8MN.
- A couple of fixes from Rob to address issues in boolean properties
  and touchscreen property sizes.
- Fix OTG controller over-current configuration for imx8mm-venice-gw
  boards.
- Fix NULL but dereferenced coccicheck error in imx-weim driver.

* tag 'imx-fixes-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx: Fix imx8*-var-som touchscreen property sizes
  ARM: dts: imx: Fix boolean properties with values
  ARM: dts: imx8mm-venice-gw{71xx,72xx,73xx}: fix OTG controller OC mode
  arm64: dts: imx8mn: Fix SAI nodes
  arm64: dts: imx8mq-tqma8mq: change the spi-nor tx
  ARM: dts: imx6qdl-apalis: Fix sgtl5000 detection issue
  soc: imx: imx8m-blk-ctrl: Fix IMX8MN_DISPBLK_PD_ISI hang
  arm64: dts: imx8qm: Correct SCU clock controller's compatible property
  arm64: dts: imx8mm-venice: fix spi2 pin configuration
  bus: imx-weim: fix NULL but dereferenced coccicheck error

Link: https://lore.kernel.org/r/20220411024301.GH129381@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-14 22:59:53 +02:00
Rob Herring
4f3d7e5a0b
arm64: dts: qcom/sdm845-shift-axolotl: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.

It may have been intended that 0 values are false, but there is no change
in behavior with this patch.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Link: https://lore.kernel.org/r/20220407225254.2178644-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-14 22:52:17 +02:00
Mike Leach
e7676a00bc arm64: dts: juno: add CTI entries to device tree
Add Coresight Cross Trigger Interface(CTI) entries to the device tree
for all the Juno variants.

Link: https://lore.kernel.org/r/20220413214925.30359-1-mike.leach@linaro.org
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-04-14 09:02:57 +01:00
Sudeep Holla
8dd3cdeaf3 arm64: dts: juno: Fix SCMI power domain IDs for ETF and CS funnel
The SCMI power domain ID for all the coresight components is 8 while
the previous/older SCPI domain was 0. When adding SCMI variant, couple
of instances retained SCPI domain ID by mistake.

Fix the same by using the correct SCMI power domain ID of 8.

Link: https://lore.kernel.org/r/20220413093547.1699535-1-sudeep.holla@arm.com
Fixes: 96bb095486 ("arm64: dts: juno: Add separate SCMI variants")
Cc: Robin Murphy <robin.murphy@arm.com>
Reported-by: Mike Leach <Mike.Leach@arm.com>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-04-14 09:00:38 +01:00
Biju Das
6494e4f905 arm64: dts: renesas: rzg2ul-smarc-som: Enable Ethernet on SMARC platform
Enable Ethernet{0,1} interfaces on RZ/G2UL SMARC EVK.

Ethernet0 pins are muxed with CAN0, CAN1, SSI1 and RSPI1 pins and Ethernet0
device selection is based on the SW1[3] switch position.

Set SW1[3] to position OFF for selecting CAN0, CAN1, SSI1 and RSPI1.
Set SW1[3] to position ON for selecting Ethernet0.

This patch disables Ethernet0 on RZ/G2UL SMARC platform by default.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-8-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
ed8efe50b7 arm64: dts: renesas: rzg2ul-smarc-som: Enable eMMC on SMARC platform
RZ/G2UL SoM has both 64GB eMMC and microSD connected to SDHI0.

Both these interfaces are mutually exclusive and the SD0 device
selection is based on SW1[2] on SoM module.

Set SW1[2] to position OFF for selecting eMMC
Set SW1[2] to position ON for selecting microSD

This patch enables eMMC on RZ/G2UL SMARC platform by default.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
a74a0bf3f3 arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform
Enable the microSD card slot connected to SDHI1 on the RZ/G2UL SMARC
platform by removing the sdhi1 override which disabled it, and by adding
the necessary pinmux required for SDHI1.

This patch also adds gpios property to vccq_sdhi1 regulator.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
13ea8b3584 arm64: dts: renesas: r9a07g043: Add GbEthernet nodes
Add Gigabit Ethernet{0,1} nodes to SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
20e63d3948 arm64: dts: renesas: r9a07g043: Add SDHI nodes
Add SDHI{0, 1} nodes to RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
4e44055440 arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins
Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting
the pinctrl-0 and pinctrl-names properties for scif0 node so that
we now actually make use of these properties for scif0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
2d10555298 arm64: dts: renesas: r9a07g043: Fillup the pinctrl stub node
Fillup the pinctrl(GPIO) stub node in RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
895199bc4e arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVK
Add basic support for RZ/G2UL SMARC EVK (based on R9A07G043U11):
- memory
- External input clock
- CPG
- DMA
- SCIF

It shares the same carrier board with RZ/G2L, but the pin mapping is
different. Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220412161314.13800-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
cf40c9689e arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC
Add initial DTSI for RZ/G2UL SoC.

Both RZ/G2L and RZ/G2UL uses the same SMARC EVK. Therefore they share
the common dtsi (rz-smarc.dtsi) file. Place holders are added in
device nodes to avoid compilation errors for the devices which have
not been enabled yet on RZ/G2UL SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220412161314.13800-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
f40846e7c9 arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi
On RZ/G2{L,LC} SoM module, gpio for power selection is connected to
P39_1 whereas on RZ/G2UL it is connected to P6_1. So move gpios property
of vccq_sdhi1 regulator from common dtsi to soc specific dtsi.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401175427.19078-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:54:32 +02:00
Biju Das
061ba41c74 arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board.  This patch adds pinmux and spi1 nodes to the carrier
board dtsi file and drops deleting pinctl* properties from DTS file.

RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401145702.17954-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
79e903fbf4 arm64: dts: renesas: ulcb: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common ULCB board DTS file.

Based on a patch in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/61a63e819d4296760ca7ae83ef5226a2c4d7bd93.1648548339.git.geert+renesas@glider.be
2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
1ee6674bbe arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common Salvator-X(S) board DTS file.

Based on a patch in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cfc6af8a4c42febcc405b7356c38448eec8e29b0.1648548339.git.geert+renesas@glider.be
2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
5f300a7f39 arm64: dts: renesas: ebisu: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common Ebisu board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b14c769f62211b67d90dbd2f127357756e6cb4fa.1648548339.git.geert+renesas@glider.be
2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
a1de91f0ac arm64: dts: renesas: draak: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the
common Draak board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0f3d3018ecfcdce1bce67708708a6d3a98368b10.1648548339.git.geert+renesas@glider.be
2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
f191fba769 arm64: dts: renesas: rcar-gen3: Add RPC device nodes
Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the
various R-Car Gen3 SoCs that do not have support for them yet in their
device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3).

Based on patches in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/3231749c7b63df1a2134daabe66446a3e0e5515b.1648548339.git.geert+renesas@glider.be
2022-04-13 13:53:42 +02:00
Wolfram Sang
ccc0dd722e arm64: dts: renesas: rcar-gen4: Add interrupt properties to watchdog nodes
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:43:04 +02:00
Wolfram Sang
7ac8afba22 arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodes
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:43:04 +02:00
Wolfram Sang
2bc0aa18ee arm64: dts: renesas: rcar-gen3: Add interrupt properties to watchdog nodes
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:43:04 +02:00
Lorenzo Bianconi
4263f77a51 net: ethernet: mtk_eth_soc: use standard property for cci-control-port
Rely on standard cci-control-port property to identify CCI port
reference.
Update mt7622 dts binding.

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-13 12:09:35 +01:00
Krzysztof Kozlowski
812b0b61ee arm64: dts: qcom: add RPM clock controller fallback compatible
The bindings require a fallback compatible to RPM clock controller.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-4-krzysztof.kozlowski@linaro.org
2022-04-12 22:13:57 -05:00
Krzysztof Kozlowski
0e324e9f49 arm64: dts: qcom: msm8994: remove SMD qcom,local-pid property
The Qualcomm SMD does not use qcom,local-pid property.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-3-krzysztof.kozlowski@linaro.org
2022-04-12 22:13:36 -05:00
Krzysztof Kozlowski
b3d26821d9 arm64: dts: qcom: msm8953: do not use underscore in node name
Align RPM requests node with DT schema by using hyphen instead of
underscore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-2-krzysztof.kozlowski@linaro.org
2022-04-12 22:13:25 -05:00
Luca Weiss
22437c436c arm64: dts: qcom: sm7225-fairphone-fp4: Enable wifi
Configure regulators used by the wifi hardware and enable it.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325101841.172304-2-luca.weiss@fairphone.com
2022-04-12 22:10:13 -05:00
Luca Weiss
48cc9bb1d3 arm64: dts: qcom: sm6350: Add wifi node
Add a node describing the wifi hardware found on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325101841.172304-1-luca.weiss@fairphone.com
2022-04-12 22:10:11 -05:00
Konrad Dybcio
d8023f3a8e arm64: dts: qcom: msm8994: Add mmc aliases
Set the aliases for both SDHCI controllers.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-16-konrad.dybcio@somainline.org
2022-04-12 22:09:17 -05:00
Konrad Dybcio
e0be93fb38 arm64: dts: qcom: msm8994: Add watchdog timer node
Add and configure the watchdog node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-15-konrad.dybcio@somainline.org
2022-04-12 22:09:01 -05:00
Konrad Dybcio
1ae438d26b arm64: dts: qcom: msm8994: Fix BLSP[12]_DMA channels count
MSM8994 actually features 24 DMA channels for each BLSP,
fix it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-14-konrad.dybcio@somainline.org
2022-04-12 22:09:00 -05:00
Konrad Dybcio
9d511d0a79 arm64: dts: qcom: msm8994: Add OCMEM node
Add OCMEM node to allow for GPU SRAM access.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-13-konrad.dybcio@somainline.org
2022-04-12 22:08:58 -05:00
Konrad Dybcio
410e1619d5 arm64: dts: qcom: msm8994-kitakami: Update regulator configuration
Remove regulator-always-on property where not necessary and mark regulators
that are not supposed to be voted active on boot with regulator-boot-on.
While at it, reorder the load properties to make it look more decent.

Reorder PMICs to fix a probe defer caused by messy dependencies and Linux's
inability to handle them (at least for now).

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-12-konrad.dybcio@somainline.org
2022-04-12 22:08:56 -05:00
Konrad Dybcio
7d9379bf1e arm64: dts: qcom: msm8994-kitakami: Disable a mistakengly enabled I2C host
I2C4 turns out not to be used on Kitakami after all and it only blocks a
GPIO used by camera hardware.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-11-konrad.dybcio@somainline.org
2022-04-12 22:08:54 -05:00
Konrad Dybcio
9e398b4c4e arm64: dts: qcom: msm8992-libra: Fix up the framebuffer
Make sure the necessary clocks are kept on after clk_cleanup (until MDSS
is properly handled by its own driver) and touch up the fb address to
prevent some weird shifting. It's still not perfect, but at least the
kernel log doesn't start a third deep into your screen..

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Folded in change of framebuffer base address, from Konrad]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-10-konrad.dybcio@somainline.org
2022-04-12 22:08:33 -05:00
Konrad Dybcio
049c46f31a arm64: dts: qcom: msm8994: Fix the cont_splash_mem address
The default memory map places cont_splash_mem at 3401000, which was
overlooked.. Fix it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-9-konrad.dybcio@somainline.org
2022-04-12 22:07:26 -05:00
Konrad Dybcio
b0b5687a2c arm64: dts: qcom: msm8992: Use the correct MMCC compatible
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-8-konrad.dybcio@somainline.org
2022-04-12 22:07:24 -05:00
Konrad Dybcio
355ea704c8 arm64: dts: qcom: msm8992: Use the correct GCC compatible
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-7-konrad.dybcio@somainline.org
2022-04-12 22:07:21 -05:00
Konrad Dybcio
e9b0eb5420 arm64: dts: qcom: msm8994: Add MMCC node
Describe the Multimedia Clock Controller block in the DT.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-6-konrad.dybcio@somainline.org
2022-04-12 22:07:18 -05:00
Konrad Dybcio
2d0f45f760 arm64: dts: qcom: msm8992-libra: Remove superfluous status = "okay"
The framebuffer is already enabled by default.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-5-konrad.dybcio@somainline.org
2022-04-12 22:07:17 -05:00
Konrad Dybcio
ed288ae94a arm64: dts: qcom: msm8992-libra: Temporarily restrict CPU count to 1
The phone seems to randomly crash when more than 1 CPU is enabled, which
is probably related to lack of some driver.

Restrict the device to only use a single core until this is solved.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-4-konrad.dybcio@somainline.org
2022-04-12 22:07:16 -05:00
Konrad Dybcio
13cff03303 arm64: dts: qcom: msm8992-libra: Add CPU regulators
Specify CPU regulator voltages for both VDD_APC rails.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-3-konrad.dybcio@somainline.org
2022-04-12 22:07:12 -05:00
Konrad Dybcio
5827e28304 arm64: dts: qcom: msm8994: Fix sleep clock name
The sleep clock name expected by GCC is actually "sleep" and not
"sleep_clk". Fix the clock-names value for it to make sure it is
provided.

Fixes: 9204da57cd65 ("arm64: dts: qcom: msm8994: Provide missing "xo_board" and "sleep_clk" to GCC")

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-2-konrad.dybcio@somainline.org
2022-04-12 22:07:04 -05:00
Akhil P Oommen
3bfef00d76 arm64: dts: qcom: sc7280: Support gpu speedbin
Add speedbin fuse and additional OPPs for gpu to support sc7280 SKUs.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226005021.v2.5.I4c2cb95f06f0c37038c80cc1ad20563fdf0618e2@changeid
2022-04-12 21:54:08 -05:00
Kathiravan T
f607dd767f arm64: dts: qcom: ipq8074: fix the sleep clock frequency
Sleep clock frequency should be 32768Hz. Lets fix it.

Cc: stable@vger.kernel.org
Fixes: 41dac73e24 ("arm64: dts: Add ipq8074 SoC and HK01 board support")
Link: https://lore.kernel.org/all/e2a447f8-6024-0369-f698-2027b6edcf9e@codeaurora.org/
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644581655-11568-1-git-send-email-quic_kathirav@quicinc.com
2022-04-12 21:35:10 -05:00
Dmitry Baryshkov
be63332992 arm64: dts: qcom: sm8250: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 7c1dffd471 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-5-dmitry.baryshkov@linaro.org
2022-04-12 21:34:13 -05:00
Dmitry Baryshkov
0316da6bbc arm64: dts: qcom: sdm845: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 08c2a076d1 ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-4-dmitry.baryshkov@linaro.org
2022-04-12 21:34:11 -05:00
Dmitry Baryshkov
63ddd8a54d arm64: dts: qcom: sdm660: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: ab29028439 ("arm64: dts: qcom: sdm660: Add required nodes for DSI1")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-3-dmitry.baryshkov@linaro.org
2022-04-12 21:34:10 -05:00
Dmitry Baryshkov
2a11b3bfc5 arm64: dts: qcom: sdm630: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: b52555d590 ("arm64: dts: qcom: sdm630: Add MDSS nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-2-dmitry.baryshkov@linaro.org
2022-04-12 21:34:07 -05:00
Dmitry Baryshkov
7b36ab2673 arm64: dts: qcom: msm8996: Drop flags for mdss irqs
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 12d5403757 ("arm64: dts: qcom: msm8996: Add DSI0 nodes")
Fixes: 3a4547c1fc ("arm64: qcom: msm8996.dtsi: Add Display nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-1-dmitry.baryshkov@linaro.org
2022-04-12 21:34:06 -05:00
Dmitry Baryshkov
37ebe34fc0 arm64: dts: qcom: sm8450-hdk: add pcie nodes
Add device tree nodes for PCIe0/PCIe1 controllers and corresponding
PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-8-dmitry.baryshkov@linaro.org
2022-04-12 21:24:56 -05:00
Dmitry Baryshkov
bce9887e0f arm64: dts: qcom: sm8450-qrd: enable PCIe0 host
Enable PCIe0 host on SM8450 QRD device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-7-dmitry.baryshkov@linaro.org
2022-04-12 21:24:15 -05:00
Dmitry Baryshkov
3795221250 arm64: dts: qcom: sm8450-qrd: enable PCIe0 PHY device
Enable PCIe0 PHY on the SM8450 QRD device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-6-dmitry.baryshkov@linaro.org
2022-04-12 21:24:14 -05:00
Dmitry Baryshkov
bc6588bc25 arm64: dts: qcom: sm8450: add PCIe1 root device
Add device tree node for the second PCIe host found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-5-dmitry.baryshkov@linaro.org
2022-04-12 21:24:13 -05:00
Dmitry Baryshkov
334d91d241 arm64: dts: qcom: sm8450: add PCIe1 PHY node
Add device tree node for the second PCIe PHY device found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-4-dmitry.baryshkov@linaro.org
2022-04-12 21:24:12 -05:00
Dmitry Baryshkov
7b09b1b473 arm64: dts: qcom: sm8450: add PCIe0 RC device
Add device tree node for the first PCIe host found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-3-dmitry.baryshkov@linaro.org
2022-04-12 21:24:11 -05:00
Dmitry Baryshkov
d41a72c24c arm64: dts: qcom: sm8450: add PCIe0 PHY node
Add device tree node for the first PCIe PHY device found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-2-dmitry.baryshkov@linaro.org
2022-04-12 21:24:10 -05:00
Taniya Das
9499240d15 arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers
Add the low pass audio clock controller device nodes.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220202053207.14256-1-tdas@codeaurora.org
2022-04-12 21:19:31 -05:00
Kuldeep Singh
095a7137ba arm64: dts: qcom: msm8996: User generic node name for DMA
Qcom BAM DT spec expects generic DMA controller node name as
"dma-controller" to enable validations.

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410175056.79330-4-singh.kuldeep87k@gmail.com
2022-04-12 19:36:01 -05:00
Stephan Gerhold
372c1c3dd7 arm64: dts: qcom: msm8916-huawei-g7: Add sound card
The huawei-g7 uses the msm8916-wcd-digital/analog audio codecs similar
to apq8016-sbc, so we can mostly copy paste it from there to make audio
work correctly. The main difference is the hphl-jack-type-normally-open
property, which is needed to avoid inverted audio jack detection.

Note that at least on my device the jack detection is not fully
reliable: sometimes headphones are detected as headsets (with
microphone). However, this is not a big problem for typical usage.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410195113.13646-3-stephan@gerhold.net
2022-04-12 14:28:22 -05:00
Stephan Gerhold
d317344d6e arm64: dts: qcom: msm8916-huawei-g7: Clarify installation instructions
The comment with installation instructions in the huawei-g7 device tree
is a bit misleading and does not describe the recommended installation
steps very well. The bootloader is actually not patched; to avoid all
trouble with the vendor bootloader it is easier to bypass it completely
by jumping to a custom bootloader (e.g. based on the open-source LK
released by Qualcomm).

To avoid confusion, simplify the comment to state only the problem
and then refer to the wiki article which contains detailed suggested
installation instructions. This will also make it easier to keep it
up to date with new developments in the future.

Fixes: 55056b2291 ("arm64: dts: qcom: msm8916: Add device tree for Huawei Ascend G7")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410195113.13646-2-stephan@gerhold.net
2022-04-12 14:28:20 -05:00
Konrad Dybcio
551b614e23 arm64: dts: qcom: sm8250-edo: Add dual CS35L41 amps
Add nodes for dual Cirrus Logic CS35L41 audio amps connected via I2C.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222014806.22446-1-konrad.dybcio@somainline.org
2022-04-12 14:22:05 -05:00
Shaik Sajida Bhanu
959cb51307 arm64: dts: qcom: sc7280: Add reset entries for SDCC controllers
Add gcc hardware reset entries for eMMC and SD card.

Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1649759528-15125-3-git-send-email-quic_c_sbhanu@quicinc.com
2022-04-12 13:53:38 -05:00
Douglas Anderson
5a026558d2 arm64: dts: qcom: sc7280-herobrine: Audio codec wants 1.8V, not 1.62V
The L2C rail on herobrine boards is intended to go to the audio
codec. Let's override the 1.62V specified in the qcard.dtsi file to be
1.8V.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411141332.v2.1.I9f06fec63b978699fe62591fec9e5ac31bb3a69d@changeid
2022-04-12 09:21:17 -05:00
Bhupesh Sharma
7011db96f6 arm64: dts: qcom: ipq6018: Fix qmp usb3 phy node
Fix the following 'make dtbs_check' warning(s) by
using phy@ instead of lanes@ and by moving '#clock-cells' to
sub-node:

arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: ssphy@78000:
 'lane@78200' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
[bjorn: s/clock-names/clock-cells/ per Shawn's feedback]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-7-bhupesh.sharma@linaro.org
2022-04-12 09:21:17 -05:00
Bhupesh Sharma
c769a3521d arm64: dts: qcom: sm8450: Fix qmp ufs phy node (use phy@ instead of lanes@)
Fix the 'make dtbs_check' warning:

arch/arm64/boot/dts/qcom/sm8450-qrd.dt.yaml: phy@1d87000:
 'lanes@1d87400' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-6-bhupesh.sharma@linaro.org
2022-04-12 09:21:17 -05:00
Bhupesh Sharma
56205c56ea arm64: dts: qcom: sc7280: Fix qmp phy node (use phy@ instead of lanes@)
Fix the 'make dtbs_check' warning:

arch/arm64/boot/dts/qcom/sc7280-idp.dt.yaml: phy@1c0e000:
  'lanes@1c0e200' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-5-bhupesh.sharma@linaro.org
2022-04-12 09:21:17 -05:00
Bhupesh Sharma
cde8b4d070 arm64: dts: qcom: msm8996-xiaomi: Drop max-microamp and vddp-ref-clk properties from QMP PHY
The following properties are not supported and causing dtbs_check
warnings.

    - vdda-phy-max-microamp
    - vdda-pll-max-microamp
    - vddp-ref-clk-max-microamp
    - vddp-ref-clk-always-on

arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dt.yaml: phy@627000:
   'vdda-phy-max-microamp', 'vddp-ref-clk-always-on', 'vddp-ref-clk-max-microamp'
    do not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Drop them from QMP PHY nodes for 'msm8996-xiaomi' dts.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-4-bhupesh.sharma@linaro.org
2022-04-12 09:21:17 -05:00
Stephan Gerhold
c38406aa46 arm64: dts: qcom: msm8916: Add BAM-DMUX for WWAN network interfaces
The BAM Data Multiplexer provides access to the network data channels
of modems integrated into many older Qualcomm SoCs, including MSM8916.

Add the nodes for the BAM DMA engine and BAM-DMUX to enable using WWAN
on smartphones/tablets based on MSM8916. This should work out of the box
with open-source WWAN userspace such as ModemManager.

The nodes are disabled by default to avoid loading unnecessary drivers
on devices that cannot use BAM-DMUX (e.g. DragonBoard 410c). However,
strictly speaking the nodes could be enabled by default since both the
bam_dma and bam_dmux driver will simply do nothing if the modem does
not announce any BAM-DMUX channels.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228225400.146555-3-stephan@gerhold.net
2022-04-12 09:21:17 -05:00
Dmitry Baryshkov
64d3cb73b3 arm64: dts: qcom: add pm8450 support
Add PM8450 PMIC device tree include file. It is going to be used by
SM8450-based devices.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-8-dmitry.baryshkov@linaro.org
2022-04-12 09:21:17 -05:00
Dmitry Baryshkov
7dc11169a0 arm64: dts: qcom: pmr735a: stop depending on thermal_zones label
Most of SoC device trees do not provide the thermal_zones label. Thus
stop depending on it and use the full path to the thermal zones nodes.

Fixes: 7a3544e5d4 ("arm64: dts: qcom: pmr735a: Add temp-alarm support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-6-dmitry.baryshkov@linaro.org
2022-04-12 09:21:17 -05:00
Dmitry Baryshkov
d67ddd17de arm64: dts: qcom: pm8350c: stop depending on thermal_zones label
Most of SoC device trees do not provide the thermal_zones label. Thus
stop depending on it and use the full path to the thermal zones nodes.

Fixes: 3795fe7d49 ("arm64: dts: qcom: pm8350c: Add temp-alarm support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-5-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
6f3426b3de arm64: dts: qcom: pmr735b: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-4-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
5c1399299d arm64: dts: qcom: pm8350b: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-3-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
7a79b95f42 arm64: dts: qcom: pm8350: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226205035.1826360-2-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Baruch Siach
a2d2c809cf arm64: dts: qcom: ipq6018: Add mdio bus description
The IPQ60xx has the same MDIO bug block as IPQ4019. Add IO range and
clock resources description.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/ef01a79ccc6ef86dc3a10d0fa3331794d49e9859.1646031524.git.baruch@tkos.co.il
2022-04-12 09:21:16 -05:00
Jami Kettunen
726111e687 arm64: dts: qcom: msm8998-oneplus-common: Add NFC
The OnePlus 5/5T both have an NXP PN553 which is supported by the
nxp-nci-i2c driver in mainline. It detects/reads NFC tags using
"nfctool" and with the NearD test scripts data can also be written
to be received by another device.

Signed-off-by: Jami Kettunen <jami.kettunen@somainline.org>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220225215642.3916-1-jami.kettunen@somainline.org
2022-04-12 09:21:16 -05:00
Sankeerth Billakanti
e036b77be7 arm64: dts: qcom: sc7280: rename edp_out label to mdss_edp_out
Rename the edp_out label in the sc7280 platform to mdss_edp_out
so that the nodes related to mdss are all grouped together in
the board specific files.

Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647452154-16361-2-git-send-email-quic_sbillaka@quicinc.com
2022-04-12 09:21:16 -05:00
Vinod Koul
c5cb42cc84 arm64: dts: qcom: sa8155p-adp: Enable ethernet node
Enable the ethernet node, add the phy node and pinctrl for ethernet.

[bhsharma: Correct ethernet/rgmii related pinmuxs, specify multi-queues and
 plug in the PHY interrupt for WOL]

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325163537.1579969-3-bhupesh.sharma@linaro.org
2022-04-12 09:21:16 -05:00
Vinod Koul
05f333b746 arm64: dts: qcom: sm8150: add ethernet node
SM8150 SoC supports ethqos ethernet controller so add the node for it

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
[bhsharma: Correct ethernet interrupt numbers and add power-domain]
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325163537.1579969-2-bhupesh.sharma@linaro.org
2022-04-12 09:21:16 -05:00
Luca Weiss
606efee957 arm64: dts: qcom: sm7225-fairphone-fp4: Enable UFS
Configure and enable the nodes for UFS that are used for internal
storage on FP4.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220321133318.99406-7-luca.weiss@fairphone.com
2022-04-12 09:21:16 -05:00
Luca Weiss
5a814af5fc arm64: dts: qcom: sm6350: Add UFS nodes
Add the necessary nodes for UFS and its PHY.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220321133318.99406-6-luca.weiss@fairphone.com
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
0e0a8e35d7 arm64: dts: qcom: sdm845: correct dynamic power coefficients
Following sm8150/sm8250 update sdm845 capacity-dmips-mhz and
dynamic-power-coefficient based on the measurements [1], [2].

The energy model dynamic-power-coefficient values were calculated with
    DPC = µW / MHz / V^2
for each OPP, and averaged across all OPPs within each cluster for the
final coefficient. Voltages were obtained from the qcom-cpufreq-hw
driver that reads voltages from the OSM LUT programmed into the SoC.

Normalized DMIPS/MHz capacity scale values for each CPU were calculated
from CoreMarks/MHz (CoreMark iterations per second per MHz), which
serves the same purpose. For each CPU, the final capacity-dmips-mhz
value is the C/MHz value of its maximum frequency normalized to
SCHED_CAPACITY_SCALE (1024) for the fastest CPU in the system.

For more details on measurement process see the commit message for the
commit 6aabed5526 ("arm64: dts: qcom: sm8250: Add CPU capacities and
energy model").

[1] https://github.com/kdrag0n/freqbench
[2] https://github.com/kdrag0n/freqbench/tree/master/results/sdm845/main

Cc: Danny Lin <danny@kdrag0n.dev>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220315141104.730235-1-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Bhupesh Sharma
6127d8e4cd arm64: dts: qcom: sm8150: Add PDC as the interrupt parent for tlmm
Several wakeup gpios supported by the Top Level Mode Multiplexer (TLMM)
block on sm8150 can be used as interrupt sources and these interrupts
are routed to the PDC interrupt controller.

So, specify PDC as the interrupt parent for the TLMM block.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226184028.111566-5-bhupesh.sharma@linaro.org
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
91d70eb708 arm64: dts: qcom: sm8450: add fastrpc nodes
Add fastrpc device tree nodes for aDSP, cDSP and SLPI.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410205901.1672089-3-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
b36e493cec arm64: dts: qcom: sm8450-hdk: Enable remoteproc instances
Enable the audio, compute, sensor and modem remoteproc and specify
firmware path for these on the Qualcomm SM8450 HDK.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410205901.1672089-2-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
66d7cadb7a arm64: dts: qcom: msm8996: remove snps,dw-pcie compatibles
On MSM8996 PCI controller bindings are not compatible with snps,dw-pcie
binding. The platform doesn't provide second (global) IRQ, it requires
additional glue code. To prevent it from probing against the dw-pcie
driver, remove corresponding compatible.

Fixes: ed965ef892 ("arm64: dts: qcom: msm8996: add support to pcie")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411115808.1976500-2-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
b4f3996c75 arm64: dts: qcom: sdm845: remove snps,dw-pcie compatibles
On SDM845 PCI controller bindings are not compatible with snps,dw-pcie
binding. The platform doesn't provide second (global) IRQ, it requires
additional glue code. To prevent it from probing against the dw-pcie
driver, remove corresponding compatible.

Fixes: 5c538e09cb ("arm64: dts: qcom: sdm845: Add first PCIe controller and PHY")
Fixes: 42ad231338 ("arm64: dts: qcom: sdm845: Add second PCIe PHY and controller")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411115808.1976500-1-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Dmitry Baryshkov
61fd9113f0 arm64: dts: qcom: apq8096-db820c: enable MSS node
APQ8096 provides a 'modem' with reduced functionality, mainly targeting
location services. Enable corresponding device tree node.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220403193911.1393920-3-dmitry.baryshkov@linaro.org
2022-04-12 09:21:16 -05:00
Yassine Oudjana
73f7731b68 arm64: dts: qcom: msm8996-xiaomi-*: Enable MSS and SLPI
Enable mss_pil and slpi_pil and set their firmware paths.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210926190555.278589-6-y.oudjana@protonmail.com
2022-04-12 09:21:15 -05:00
Yassine Oudjana
127dd2f08d arm64: dts: qcom: msm8996: Add MSS and SLPI
Add nodes for the MSS and SLPI remoteprocs.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210926190555.278589-5-y.oudjana@protonmail.com
2022-04-12 09:21:15 -05:00
Yassine Oudjana
6d338feb55 arm64: dts: qcom: msm8996: Unify smp2p naming
Rename smp2p-modem to smp2p-mpss, and make the subnode labels of smp2p_adsp
and smp2p_slpi follow the <name>_smp2p_<out/in> layout.
Also move smp2p_slpi_out above smp2p_slpi_in to make it match mpss and adsp
where master-kernel is the first subnode.

This patch brings no functional change.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210926190555.278589-4-y.oudjana@protonmail.com
2022-04-12 09:21:15 -05:00
Yassine Oudjana
902d97a442 arm64: dts: qcom: msm8996: Revamp reserved memory
Fix a total overlap between zap_shader_region and slpi_region, and rename
all regions to match the naming convention in other Qualcomm SoC device trees.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210926190555.278589-2-y.oudjana@protonmail.com
2022-04-12 09:21:15 -05:00
Bhupesh Sharma
0deb2624e2 arm64: dts: qcom: sa8155p-adp: Add support for uSD card
Add support for uSD card on SA8155p-ADP board using the SDHC2
interface.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220403144151.92572-3-bhupesh.sharma@linaro.org
2022-04-12 09:21:15 -05:00
Bhupesh Sharma
876644c760 arm64: dts: qcom: sm8150: Add support for SDC2
Add support for SDC2 which can be used to interface uSD card.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220403144151.92572-2-bhupesh.sharma@linaro.org
2022-04-12 09:21:15 -05:00
Dmitry Baryshkov
6b834df839 arm64: dts: qcom: sdm845-db845c: add wifi variant property
Dragonboard845c doesn't have board-specific board-id programmed, it uses
generic 0xff. Thus add the property with the 'variant' of the
calibration data.

Note: the driver will check for the calibration data for the following
IDs, so older board-2.bin files that were distributed as a part of
Linaro releases will continue to work.

- 'bus=snoc,qmi-board-id=ff,qmi-chip-id=30214,variant=Thundercomm_DB845C'
- 'bus=snoc,qmi-board-id=ff,qmi-chip-id=30214'
- 'bus=snoc,qmi-board-id=ff'

For the reference, the board is identified by the driver in the
following way:

ath10k_snoc 18800000.wifi: qmi chip_id 0x30214 chip_family 0x4001 board_id 0xff soc_id 0x40030001
ath10k_snoc 18800000.wifi: qmi fw_version 0x2009856b fw_build_timestamp 2018-07-19 12:28 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.2.0-01387-QCAHLSWMTPLZ-1

Fixes: 3f72e2d3e6 ("arm64: dts: qcom: Add Dragonboard 845c")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220403105711.1173161-1-dmitry.baryshkov@linaro.org
2022-04-12 09:21:15 -05:00
Krzysztof Kozlowski
2374b99e19 arm64: dts: qcom: align clocks in I2C/SPI with DT schema
The DT schema expects clocks core-iface order.  No functional change.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405063451.12011-3-krzysztof.kozlowski@linaro.org
2022-04-12 09:21:15 -05:00
Krzysztof Kozlowski
0e1b27f4f6 arm64: dts: qcom: align dmas in I2C/SPI/UART with DT schema
The DT schema expects dma channels in tx-rx order.  No functional
change.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405063451.12011-2-krzysztof.kozlowski@linaro.org
2022-04-12 09:21:15 -05:00
Krzysztof Kozlowski
dcd0a66354 arm64: dts: qcom: msm8916: rename WCNSS child name to bluetooth
The "bluetooth" is more popular and more descriptive than "bt", for a
Bluetooth device.  The WCNSS DT schema will expect such naming.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220405065752.27389-2-krzysztof.kozlowski@linaro.org
2022-04-12 09:21:15 -05:00
Souradeep Chowdhury
0fa44edd0f arm64: dts: qcom: sc7280: Set the default dr_mode for usb2
Set the default dr_mode for usb2 node to "otg" to enable
role-switch for EUD(Embedded USB Debugger) connector node.

Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/451392a942f90aa9805b00afad7dff894604d189.1649235218.git.quic_schowdhu@quicinc.com
2022-04-12 09:21:15 -05:00
Manikanta Pubbisetty
cdbfb815d6 arm64: dts: qcom: sc7280: Add WCN6750 WiFi node
Add DTS node for WCN6750 WiFi chipset.

Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220406111303.27670-1-quic_mpubbise@quicinc.com
2022-04-12 09:21:15 -05:00
Krzysztof Kozlowski
7ba57d11e5 arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
ref_clk clock in UFS node is already there with a <0 0> frequency, which
matches other DTSI files.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220407092725.232463-3-krzysztof.kozlowski@linaro.org
2022-04-12 09:21:15 -05:00
Krzysztof Kozlowski
64ff698424 arm64: dts: qcom: msm8996: correct UFS compatible
The Qualcomm UFS bindings require to use specific (qcom,msm8996-ufshc)
and generic (jedec,ufs-2.0) compatibles.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220407092725.232463-2-krzysztof.kozlowski@linaro.org
2022-04-12 09:21:15 -05:00
Krzysztof Kozlowski
b32846a38f arm64: dts: qcom: msm8996: drop unsupported UFS vddp-ref-clk-max-microamp
The property vddp-ref-clk-max-microamp (for VDDP ref clk supply which is
l25 regulator) is not documented in MSM8996 UFS PHY bindings
(qcom,msm8996-qmp-ufs-phy).  It is mentioned in the other UFS PHY
bindings for qcom,msm8996-ufs-phy-qmp-14nm.

The MSM8996-based Xiaomi devices configure l25 regulator in a
conflicting way:
1. with maximum 100 uAmp for VDDP ref clk supply of UFS PHY,
2. with maximum 450 mAmp for VCCQ supply of UFS.

Since the vddp-ref-clk-max-microamp property is basically not
documented for that UFS PHY and has a conflicting values, drop it
entirely as it looks like not tested and not used ever.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220407092725.232463-1-krzysztof.kozlowski@linaro.org
2022-04-12 09:21:15 -05:00
Krzysztof Kozlowski
2b6d37f6b7 arm64: dts: qcom: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220407143112.294930-2-krzysztof.kozlowski@linaro.org
2022-04-12 09:21:15 -05:00
Rob Herring
aff4d695b4 arm64: dts: qcom: sdm845: shift6mq: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.

It may have been intended that 0 values are false, but there is no change
in behavior with this patch.

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
[bjorn: Updated subject prefix]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220407225254.2178644-1-robh@kernel.org
2022-04-12 09:20:00 -05:00
Dmitry Baryshkov
18019eb62e arm64: dts: qcom: sm8250: don't enable rx/tx macro by default
Enabling rxmacro and txmacro nodes by defaults makes Qualcomm RB5 to
crash and reboot while probing audio devices. Disable these device tree
nodes by default and enabled them only when necessary (for the
SM8250-MTP board).

Fixes: 24f52ef0c4 ("arm64: dts: qcom: sm8250: Add nodes for tx and rx macros with soundwire masters")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401185814.519653-1-dmitry.baryshkov@linaro.org
2022-04-11 21:40:57 -05:00
Luca Weiss
413821b777 arm64: dts: qcom: sm7225-fairphone-fp4: Add AW8695 haptics
Add a node for the haptics driver found on the phone.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220408115311.237039-3-luca.weiss@fairphone.com
2022-04-11 21:09:16 -05:00
Luca Weiss
7be9f3ae25 arm64: dts: qcom: sm6350: Add I2C busses
Add nodes for the I2C busses on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220408114205.234635-2-luca.weiss@fairphone.com
2022-04-11 21:09:08 -05:00
Luca Weiss
9e5c45a5aa arm64: dts: qcom: sm6350: Fix naming of uart9
The uart9 was previously mistakenly called uart2. Fix this.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220408114205.234635-1-luca.weiss@fairphone.com
2022-04-11 21:09:06 -05:00
Petr Vorel
e7773dbc87 arm64: dts: qcom: msm8994-huawei-angler: Add sdhc1 definition
Angler does not have SD card, thus sdhc2 kept disabled.

Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220323204840.22832-1-petr.vorel@gmail.com
2022-04-11 21:08:15 -05:00
Stephen Boyd
516ca27b60 arm64: dts: qcom: sc7180-trogdor: Simplify SAR sensor enabling
The SAR node, ap_sar_sensor, needs to be enabled in addition to the i2c
bus it resides on. Let's simplify this by leaving the sensor node
enabled by default while leaving the i2c bus disabled by default. On
boards that use the sensor, we already enable the i2c bus so we can
simply remove the extra bit that enables the sar sensor node. This saves
some lines but is otherwise a non-functional change.

Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325211640.54228-1-swboyd@chromium.org
2022-04-11 16:07:00 -05:00
Stephen Boyd
dbcbeed94f arm64: dts: qcom: sc7280-herobrine: Drop outputs on fpmcu pins
Having these pins with outputs is good on a fresh boot because it puts
the boot and reset pins in a known "good" state. Unfortunately, that
conflicts with the fingerprint firmware flashing code. The firmware
flashing process binds and unbinds the cros-ec and spidev drivers and
that reapplies the pin output values after the flashing code has
overridden the gpio values. This causes a problem because we try to put
the device into bootloader mode, bind the spidev driver and that
inadvertently puts it right back into normal boot mode, breaking the
flashing process.

Fix this by removing the outputs. We'll introduce a binding for
fingerprint cros-ec specifically to set the gpios properly via gpio APIs
during cros-ec driver probe instead.

Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Fixes: 116f7cc43d ("arm64: dts: qcom: sc7280: Add herobrine-r1")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220317010640.2498502-2-swboyd@chromium.org
2022-04-11 15:52:32 -05:00
Douglas Anderson
9464b00e6a arm64: dts: qcom: sc7280: Delete herobrine-r0
As talked about in commit 61a6262f95 ("arm64: dts: qcom: sc7280:
Move herobrine-r0 to its own dts"), herobrine evolved pretty
significantly after -r0 and newer revisions are pretty
different. Nobody needs the old boards to keep working, so let's
delete to avoid the maintenance burden.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220308125044.1.I3e4a1a9c102d194698b68661e69efebafec8af1c@changeid
2022-04-11 15:48:42 -05:00
Douglas Anderson
0d40497d05 arm64: dts: qcom: sc7280-herobrine: Fix PCIe regulator glitch at bootup
While scoping signals, we found that the PCIe signals weren't
compliant at bootup. Specifically, the bootloader was setting up PCIe
and leaving it configured, then jumping to the kernel. The kernel was
turning off the regulator while leaving the PCIe clock running, which
was a violation.

In the regulator bindings (and the Linux kernel driver that uses
them), there's currently no way to specify that a GPIO-controlled
regulator should keep its state at bootup. You've got to pick either
"on" or "off". Let's switch it so that the PCIe regulator defaults to
"on" instead of "off". This should be a much safer way to go and
avoids the timing violation. The regulator will still be turned off
later if there are no users.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220310130429.1.Id41fda1d7f5d9230bc45c1b85b06b0fb0ddd29af@changeid
2022-04-11 15:46:18 -05:00
Matthias Kaehlcke
6675ac9d00 arm64: dts: qcom: sc7280: Add CRD rev5
Add support for Qualcomm's SC7280 CRD rev5 (aka CRD 3.0/3.1).

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220316172814.v1.4.I37bdb77fdd06fb4143056366d7ec35b929528002@changeid
2022-04-11 15:45:55 -05:00
Matthias Kaehlcke
533ca1c3c1 arm64: dts: qcom: sc7280: herobrine: disable some regulators by default
Not all herobrine boards have a world facing camera or a fingerprint
sensor, disable the regulators that feed these devices by default and
only enable them for the boards that use them.

Similarly the audio configuration can vary between boards, not all
boards have the regulator pp3300_codec, disable it by default.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220316172814.v1.3.Iad21bd53f3ac14956b8dbbf3825fc7ab29abdf97@changeid
2022-04-11 15:45:23 -05:00
Matthias Kaehlcke
f226c66053 arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings
With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
are kept to make sure the board keeps booting with older bootloader
versions.

The compatible string 'google,piglin' (without revision information) is
still used by the IDP2 board, which is not expected to evolve further.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220316172814.v1.2.Ib0fbb7e5218201c81a2d064ff13c9bc1b0863212@changeid
2022-04-11 15:45:23 -05:00
Matthias Kaehlcke
737f9ea6ce arm64: dts: qcom: sc7280: Rename crd to crd-r3
There are multiple revisions of CRD boards. The current sc7280-crd.dts
describes revision 3 and 4 (aka CRD 1.0 and 2.0). Support for a newer
version will be added by another patch. Add the revision number to
distinguish it from the versionn. Also add the revision numbers to
the compatible string.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220316172814.v1.1.I2deda8f2cd6adfbb525a97d8fee008a8477b7b0e@changeid
2022-04-11 15:45:23 -05:00
Ivy Jian
33495eb77e arm64: dts: qcom: switch panel compatible to "edp-panel" for limozeen
some panel can't light up with new board with ps8640, switch compatible
panel define to make it workable.

Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com>
Signed-off-by: Ivy Jian <ivyjian417@gmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220322092524.1.Ied05fc4b996737e3481861c6ab130a706f288412@changeid
2022-04-11 15:42:23 -05:00
Rakesh Pillai
476dce6e50 arm64: dts: qcom: sc7280: Add WPSS remoteproc node
Add the WPSS remoteproc node in dts for
PIL loading.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Rakesh Pillai <quic_pillair@quicinc.com>
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220328070701.28551-1-quic_mpubbise@quicinc.com
2022-04-11 15:41:30 -05:00
Matthias Kaehlcke
ee2a621160 arm64: dts: qcom: sc7280: Add device tree for herobrine villager
Add a basic device tree for the herobrine villager board.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220329105854.v3.2.Iebdb5af0db7d3d6364cb229a27cd7c668f1063ae@changeid
2022-04-11 15:17:33 -05:00
Matthias Kaehlcke
70137d1d8a arm64: dts: qcom: sc7280: Add SAR sensors for herobrine
Add nodes for the two SX9324 SAR proximity sensors. Not all herobrine
boards have these sensors, so leave them disabled by default.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220329105854.v3.1.Icedb2e3cd5e21f3a4ec535ddf756fa44d053b6ed@changeid
2022-04-11 15:17:33 -05:00
Stephen Boyd
f31c834d39 arm64: dts: qcom: sc7280: Fix sar1_irq_odl node name
This node should be named sar1-irq-odl, not sar0-irq-odl. Otherwise
we'll overwrite the settings for sar0 with what is intended for sar1,
leading to probe failures for sar1 that are quite confusing.

Fixes: 116f7cc43d ("arm64: dts: qcom: sc7280: Add herobrine-r1")
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220324223331.876199-1-swboyd@chromium.org
2022-04-11 14:51:47 -05:00
Guillaume Giraudon
962dd65e57 arm64: dts: meson-sm1-bananapi-m5: fix wrong GPIO pin labeling for CON1
The labels for lines 61 through 84 on the periphs-banks were offset by 2.
2 lines are missing in the BOOT GPIO lines (contains 14, should be 16)
Added 2 empty entries in BOOT to realigned the rest of GPIO labels
to match the Banana Pi M5 schematics.

(Thanks to Neil Armstrong for the heads up on the position of the missing pins)

Fixes: 976e920183 ("arm64: dts: meson-sm1: add Banana PI BPI-M5 board dts")
Signed-off-by: Guillaume Giraudon <ggiraudon@prism19.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220411144427.874-1-ggiraudon@prism19.com
2022-04-11 17:53:38 +02:00
Christian Hewitt
456733feb0 arm64: dts: meson: alpa sort the board Makefile
Let's alpha-sort the board Makefile to keep things organised.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220409064257.24453-1-christianshewitt@gmail.com
2022-04-11 14:52:44 +02:00
Geert Uytterhoeven
599fdfddc8 arm64: dts: renesas: spider: Add Ethernet sub-board
Add a DTS file for the Spider Ether TSN sub-board (RTP8A779F0ASKB0ST0S),
and include it from the main r8a779f0-spider.dts.

For now its contents are limited to the Board ID EEPROM.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/5aa58816182b34d9e5795bc1e22784f4e4879d13.1643898884.git.geert+renesas@glider.be
2022-04-11 12:00:33 +02:00
Geert Uytterhoeven
b74d5d65af arm64: dts: renesas: spider-cpu: Add I2C4 and EEPROMs
Enable the I2C4 bus on the Falcon CPU board, and describe the I2C EEPROMs
present on the Spider CPU and BreakOut boards.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/6d8917e49f83b6a932970ca169100eb086d11f16.1643898884.git.geert+renesas@glider.be
2022-04-11 12:00:32 +02:00
Geert Uytterhoeven
bd04437341 arm64: dts: renesas: r8a779f0: Add I2C nodes
Add device nodes for the I2C Bus Interfaces on the Renesas R-Car S4-8
(R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e1c7fb17801bc82a74aa5364212d02ba51535dd2.1643898884.git.geert+renesas@glider.be
2022-04-11 12:00:32 +02:00
Marcel Ziswiler
a39ed23bdf arm64: dts: freescale: add initial support for verdin imx8m plus
This patch adds the device tree to support Toradex Verdin iMX8M Plus [1]
a computer on module which can be used on different carrier boards.

The module consists of an NXP i.MX 8M Plus family SoC (either i.MX 8M
Plus Quad or 8M Plus QuadLite), a PCA9450C PMIC, a Gigabit Ethernet PHY,
1, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC, an I2C EEPROM, an
RX8130 RTC, an optional I2C temperature sensor plus an optional
Bluetooth/Wi-Fi module.

Anything that is not self-contained on the module is disabled by
default.

The device tree for the Dahlia includes the module's device tree and
enables the supported peripherals of the carrier board.

The device tree for the Verdin Development Board includes the module's
device tree as well as the Dahlia one as it is a superset and supports
almost all peripherals available.

So far there is no display functionality supported at all but basic
console UART, USB host, eMMC and Ethernet functionality work fine.

[1] https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plus

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 10:14:08 +08:00
Marcel Ziswiler
a00f1fa615 arm64: dts: imx8mp: add uart2 dma
Add DMA properties to uart2 node.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 10:13:49 +08:00
Krzysztof Kozlowski
aba3a3fb8e arm64: dts: freescale: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:50:03 +08:00
Kuldeep Singh
7cbeeb0553 arm64: dts: lx2160a: Update can node property
fsl,clk-source property is of type uint8 and need to be defined as
"/bits/ 8 <0>". Simply setting value to 0 raise warning:
can@2180000: fsl,clk-source:0: [0, 0, 0, 0] is too long

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:14 +08:00
Michael Walle
73d901d6dc arm64: dts: ls1028a: default to OTG mode for USB
At the moment, the dtsi will force the dr_mode to host. This is
problematic because it will always turn on the Vbus voltage regardless
if the port is host or device. This might lead to a "shortcut" between
the two USB endpoints because both might have their Vbus supplies
enabled. Therefore, the default should be "otg" for any ports which
aren't host only (from a SoC point of view) and have a user of the dtsi
file overwrite that explicitly.

Move the 'dr_mode = "host";' into the board dts. Now that the dtsi
doesn't set the dr_mode anymore, we can also drop the 'dr_mode = "otg";'
in the board dts because that is the default value if dr_mode is not
set.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Michael Walle
be0b178c50 arm64: dts: ls1028a: sl28: use ocelot-8021q tagging by default
Enable the ocelot-8021q tagger by default which supports ethernet flow
control.

The new default is set in the common board dtsi. The actual switch
node is enabled on a per board variant basis. Because of this we
set the new tagger default for both internal ports and a particular
variant is free to choose among the two port.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Marcel Ziswiler
4f6b5de985 arm64: dts: imx8mm-verdin: add sd1 sleep pinctrl
Add SD1 sleep pinctrl to avoid backfeeding during sleep.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Marcel Ziswiler
f84ccff6d8 arm64: dts: imx8mm-verdin: note about disabled sd1 pull-ups
Add a note about us using discrete external on-module resistors
pulling-up to the on-module +V3.3_1.8_SD (LDO5) rail and explicitly
disabling the internal pull-ups due to ERR050080 [1]:

IO: Degradation of internal IO pullup/pulldown current capability for
IO’s continuously driven in a 3.3V operating mode

[1] https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Marcel Ziswiler
473b34b8ce arm64: dts: imx8mm-verdin: capitalisation of verdin comments
Fix capitalisation of Verdin in comments.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Marcel Ziswiler
593c535b0d arm64: dts: imx8mm-verdin: re-order pinctrl groups
Alphabetically re-order pinctrl groups.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Marcel Ziswiler
60f01b5b5c arm64: dts: imx8mm-verdin: update iomux configuration
Update IOMUX configuration as required by the hardware design team.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Marcel Ziswiler
79c1c8509c arm64: dts: imx8mm-verdin: comment about i2c level shifter
Add a note about the bootloader being expected to switch on the I2C
level shifter for the TLA2024 ADC behind this PMIC.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Marcel Ziswiler
9847725e3a arm64: dts: imx8mm-verdin: only dashes in node names
Make sure we only have dashes rather than underscores in node names by
renaming ctrl_sleep_moci-hog to ctrl-sleep-moci-hog.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:13 +08:00
Marcel Ziswiler
344acf05d8 arm64: dts: imx8mm-verdin: alphabetically re-order nodes
Alphabetically re-order nodes.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:12 +08:00
Marcel Ziswiler
98e4f1930e arm64: dts: imx8mm-verdin: multi-line comment style
Fix multi-line comment style.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:12 +08:00
Marcel Ziswiler
97a07703cf arm64: dts: imx8mm-verdin: update regulator names
Annotate regulators which are on-module.
Rename usb_otg{1/2}_vbus to USB_{1/2}_EN more in-line with Verdin spec.
Annotate PMIC regulators with information on which BUCK/LDO they are on.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:12 +08:00
Sherry Sun
68b7cf5d91 arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:12 +08:00
Marek Vasut
21a14c68f3 arm64: dts: imx8mp: Add cpu-freq support
Add A53 OPP table and cpu regulator to support cpu-freq driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anson Huang <Anson.Huang@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:12 +08:00
Marek Vasut
9ad9773e89 arm64: dts: imx8mp: Add missing speed grade phandle
And missing speed grade phandle to cpu@0 node.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anson Huang <Anson.Huang@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:39:12 +08:00
Rob Herring
f571e9c9aa arm64: dts: imx: Fix imx8*-var-som touchscreen property sizes
The common touchscreen properties are all 32-bit, not 16-bit. These
properties must not be too important as they are all ignored in case of an
error reading them.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:38:07 +08:00
Tim Harvey
4c79865f3e ARM: dts: imx8mm-venice-gw{71xx,72xx,73xx}: fix OTG controller OC mode
The GW71xx, GW72xx and GW73xx boards have USB1 routed to a USB OTG
connectors and USB2 routed to a USB hub.

The OTG connector has a over-currently protection with an active-low
pin and the USB1 to HUB connection has no over-current protection (as
the HUB itself implements this for its downstream ports).

Add proper dt nodes to specify the over-current pin polarity for USB1
and disable over-current protection for USB2.

Fixes: 6f30b27c5e ("arm64: dts: imx8mm: Add Gateworks i.MX 8M Mini Development Kits")
Cc: stable@vger.kernel.org
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:13:33 +08:00
Marek Vasut
574518b7cc arm64: dts: imx8mn: Fix SAI nodes
The most specific compatible string element should be "fsl,imx8mn-sai"
on i.MX8M Nano, fix it from current "fsl,imx8mm-sai" (two Ms, likely
due to copy-paste error from i.MX8M Mini).

Fixes: 9e98600697 ("arm64: dts: imx8mn: Add SAI nodes")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Reviewed-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 09:13:20 +08:00
Alexander Stein
c7b45c79fb arm64: dts: imx8mq-tqma8mq: change the spi-nor tx
This fixes the qspi read command by importing the changes from commit
04aa946d57 ("arm64: dts: imx8: change the spi-nor tx").

Fixes: b186b8b6e7 ("arm64: dts: freescale: add initial device tree for TQMa8Mx with i.MX8M")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11 08:57:36 +08:00
Philip Rinn
f9814e2ef9 arm64: dts: allwinner: a64: olinuxino: Enable audio
Enable the audio hardware on the Olimex A64-OLinuXino board family.
Tested on the A64-OLinuXino-2Ge8G-IND variant.

Signed-off-by: Philip Rinn <rinni@inventati.org>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220407155145.10891-1-rinni@inventati.org
2022-04-10 20:21:24 +02:00
Lin Huang
80bc6f34c5 arm64: dts: rockchip: Enable dmc and dfi nodes on gru
Enable the DMC (Dynamic Memory Controller) and the DFI (DDR PHY
Interface) nodes on gru boards so we can support DDR DVFS.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220308110825.v4.12.I3a5c7f21ecd8221b42c2dbcd618386bce7b3e9a6@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 19:10:09 +02:00
Lin Huang
1b3f36854a arm64: dts: rockchip: Add dfi and dmc nodes to rk3399
These are required to support DDR DVFS on RK3399 platforms.

Change since Daniel's posting: reordered by unit address, per existing
style

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220308110825.v4.11.Ie97993621975c5463d7928a8646f3737c9f2921d@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 19:10:09 +02:00
Johan Jonker
14fc86b9aa arm64: dts: rockchip: add clocks property to cru nodes rk3399
Add clocks property to rk3399 cru nodes to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329150742.22093-6-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 19:06:35 +02:00
Johan Jonker
e03774ff21 arm64: dts: rockchip: use generic node name for pmucru on rk3399
The node names should be generic, so fix this for the rk3399 pmucru node
and rename it to "clock-controller".

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329150742.22093-5-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 19:06:24 +02:00
Frank Wunderlich
551e645fed arm64: dts: rockchip: Add SATA support to BPI-R2-Pro
Enable the Combphy and Sata nodes in Bananapi R2 Pro Board.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220409112136.164481-3-linux@fw-web.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:51:09 +02:00
Frank Wunderlich
f29ffce32b arm64: dts: rockchip: Add USB nodes for BPI-R2-Pro
Add usb2 nodes to Bananapi R2 Pro board

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220409112136.164481-2-linux@fw-web.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:51:09 +02:00
Michael Riesch
d6cfb110b0 arm64: dts: rockchip: add usb3 support to rk3568-evb1-v10
The Rockchip RK3568 EVB1 features one USB 3.0 device-only
(USB 2.0 OTG) port and one USB 3.0 host-only port.
Activate the USB 3.0 controller nodes and phy nodes in the
device tree.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220408151237.3165046-6-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:45:09 +02:00
Peter Geis
e432309ff8 arm64: dts: rockchip: enable dwc3 on quartz64-a
The quartz64 model a has support for both the dwc3 otg port and the dwc3
host port. Add the otg power supply and dwc3 nodes to the device tree to
enable support for these.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220408151237.3165046-5-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:45:09 +02:00
Peter Geis
9f4c480f24 arm64: dts: rockchip: add rk356x dwc3 usb3 nodes
Add the dwc3 device nodes to the rk356x device trees.
The rk3566 has one usb2 capable dwc3 otg controller and one usb3 capable
dwc3 host controller.
The rk3568 has one usb3 capable dwc3 otg controller and one usb3 capable
dwc3 host controller.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220408151237.3165046-4-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:45:08 +02:00
Michael Riesch
22a442e658 arm64: dts: rockchip: add basic dts for the radxa rock3 model a
Add basic device tree for the Radxa ROCK3 Model A board (with
the Rockchip RK3568 SoC) including Ethernet, USB2 and headphone
connector.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220310210352.451136-3-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:35:33 +02:00
Heiko Stuebner
ef5814e75b arm64: dts: rockchip: fix Makefile sorting for BananaPi R2 Pro
Banana before evb of course.

Fixes: f901aaadaa ("arm64: dts: rockchip: Add Bananapi R2 Pro")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:35:33 +02:00
Krzysztof Kozlowski
c043dee9cb arm64: dts: rockchip: correct interrupt flags on rk3399 boards
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW  = 1 = IRQ_TYPE_EDGE_RISING

Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
  ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200917185211.5483-2-krzk@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:35:33 +02:00
Frank Wunderlich
77047ed73d arm64: dts: rockchip: Add gmac1 and change network settings of bpi-r2-pro
New Version (v1.0) of R2 pro has swapped gmacs compared to the v00.

WAN-Port is now on gmac1 (RTL8211F) and lan-ports on gmac0 with mt7531
switch.

There is already a mt7531 dsa driver in mainline, but it needs to be
modified to work for this board.

Pre-1.0 version was not sold, so the setting can be savely overridden.

Fixes: f901aaadaa ("arm64: dts: rockchip: Add Bananapi R2 Pro")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220402110045.104031-3-linux@fw-web.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:34:50 +02:00
Frank Wunderlich
6f277adf11 arm64: dts: rockchip: Change io-domains of bpi-r2-pro
New 1.0 Hardware revision has different io domain settings than the first
board.

Pre-1.0 version was not sold, so the setting can be savely overridden.

Fixes: f901aaadaa ("arm64: dts: rockchip: Add Bananapi R2 Pro")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220402110045.104031-2-linux@fw-web.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-09 12:25:44 +02:00
Liu Ying
dd2737fab4 arm64: dts: imx8qm: Correct SCU clock controller's compatible property
The fsl,scu.txt dt-binding documentation explicitly mentions
that the compatible string should be either "fsl,imx8qm-clock"
or "fsl,imx8qxp-clock", followed by "fsl,scu-clk".  Also, i.MX8qm
SCU clocks and i.MX8qxp SCU clocks are really not the same, so
we have to set the compatible property according to SoC name.
Let's correct the i.MX8qm clock controller's compatible property
from
"fsl,imx8qxp-clk", "fsl,scu-clk"
to
"fsl,imx8qm-clk", "fsl,scu-clk" .

Fixes: f2180be18a ("arm64: dts: imx: add imx8qm common dts file")
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-09 10:59:11 +08:00
Bhupesh Sharma
03d470ce2b arm64: dts: qcom: sa8155: Enable PCIe nodes
SA8155p ADP board supports the PCIe0 controller in the RC
mode (only). So add the support for the same.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220326055754.1796146-3-bhupesh.sharma@linaro.org
2022-04-08 19:31:18 -05:00
Bhupesh Sharma
a1c86c6805 arm64: dts: qcom: sm8150: Add PCIe nodes
Add nodes for the two PCIe controllers found on the SM8150 SoC.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220326055754.1796146-2-bhupesh.sharma@linaro.org
2022-04-08 19:31:16 -05:00
Bhupesh Sharma
fe75b0c4a6 arm64: dts: qcom: sm8150: Add ufs power-domain entries
Add power-domain entries for UFS phy node in sm8150 dts.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
[bjorn: Dropped power-domain-names]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220323203052.1124683-1-bhupesh.sharma@linaro.org
2022-04-08 19:30:55 -05:00
Bhupesh Sharma
397ad94668 arm64: dts: qcom: sm8150: Add pdc interrupt controller node
Add pdc interrupt controller for sm8150.

Cc: Maulik Shah <quic_mkshah@quicinc.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226184028.111566-4-bhupesh.sharma@linaro.org
2022-04-08 19:30:51 -05:00
Krzysztof Kozlowski
1ceaccf2b2 arm64: dts: synaptics: remove unused DTSI for AS370
The as370.dtsi for Synaptics AS370 SoC does not have a user (DTS board
file), is uncompilable and untestable.  It was added back in 2018.  No
user appeared since that time, so assume it won't be added.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-08 18:18:48 +02:00
Lucas Stach
4bdb11926e arm64: dts: imx8mp: add GPU nodes
Add the DT nodes for both the 3D and 2D GPU cores found on the i.MX8MP.

etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6204
etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
[drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 21:18:31 +08:00
Lucas Stach
fc0f051246 arm64: dts: imx8mp: add GPC node with GPU power domains
Add the power domains for the GPUs, which do not require any interaction with
a blk-ctrl, but are simply two PU domains nested inside a MIX domain.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 21:18:13 +08:00
Michael Walle
579df42888 arm64: dts: imx8mn-evk: add QSPI flash
There is a 32MiB Micron MT25QU256ABA1 serial NOR flash on the EVK board.
Add a device tree node for it.

Tested on a 8MNANOD3L-EVK.

Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 19:43:37 +08:00
Guido Günther
9694ed9bcf arm64: dts: imx8mq-librem5-r4: add the correct panel
The r4 ("Evergreen") hardware revision of the Librem 5 phone includes a
slightly different panel than the revisions before it. Since its'
description is available, describe it properly for the board.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 18:40:54 +08:00
Angus Ainslie
c3e9d4547a arm64: dts: imx8mq-librem5: add a RO firmware partition
This partition will hold a squashfs firmware jail. Only one read-only
partition is needed.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 18:40:52 +08:00
Guido Günther
2bf475ce12 arm64: dts: imx8mq-librem5: higher boost regulation current
1,5A is what's used by the type-c controller on the Librem 5 board so
increase ti,boost-max-current to 1,5A too.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 18:40:50 +08:00
Martin Kepplinger
b019694c8b arm64: dts: imx8mq-librem5: remove description of CHG_STATUS_B
That pin is not connected on the board so no need to describe it.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 18:40:48 +08:00
Martin Kepplinger
a3b2fc4f76 arm64: dts: imx8mq-librem5: make the volume buttons a wakeup source
They turn on the display currently so to be consistent, let's make
them wake the system from suspend as well.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 18:40:34 +08:00
Krzysztof Kozlowski
8771ce5ead arm64: dts: meson: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220407142159.293836-2-krzysztof.kozlowski@linaro.org
2022-04-08 09:40:14 +02:00
Xianwei Zhao
9af9c58a09 arm64: dts: remove cpu compatible "arm,armv8" for s4
Amlogic s4 device is already applied, but cpu compatible 'arm,armv8'
is only valid for software models, so we remove it.

Fixes: ac4dfd0d1d ("arm64: dts: add support for S4 based Amlogic AQ222")
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220408070901.26446-1-xianwei.zhao@amlogic.com
2022-04-08 09:35:41 +02:00
Krzysztof Kozlowski
ad2c6e3cdd arm64: dts: broadcom: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-07 11:57:07 -07:00
Rob Herring
bc2fb47db5
arm/arm64: dts: qcom: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.

It may have been intended that 0 values are false, but there is no change
in behavior with this patch.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/Yk3m92Sj26/v1mLG@robh.at.kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-07 14:04:36 +02:00
Rob Herring
1bc12d3015
arm64: dts: imx: Fix imx8*-var-som touchscreen property sizes
The common touchscreen properties are all 32-bit, not 16-bit. These
properties must not be too important as they are all ignored in case of an
error reading them.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/Yk3moe6Hz8ELM0iS@robh.at.kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-07 14:04:33 +02:00
Rob Herring
1a67653de0
arm64: dts: tegra: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.

It may have been intended that 0 values are false, but there is no change
in behavior with this patch.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/Yk3nShkFzNJaI3/Z@robh.at.kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-07 14:03:02 +02:00
Johan Hovold
dc90043133 arm64: dts: imx8mm-venice: fix spi2 pin configuration
Due to what looks like a copy-paste error, the ECSPI2_MISO pad is not
muxed for SPI mode and causes reads from a slave-device connected to the
SPI header to always return zero.

Configure the ECSPI2_MISO pad for SPI mode on the gw71xx, gw72xx and
gw73xx families of boards that got this wrong.

Fixes: 6f30b27c5e ("arm64: dts: imx8mm: Add Gateworks i.MX 8M Mini Development Kits")
Cc: stable@vger.kernel.org      # 5.12
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-06 21:30:55 +08:00
Ashish Singhal
71f69ffa01 arm64: tegra: Add QSPI controllers on Tegra234
This adds the QSPI controllers on the Tegra234 SoC and populates the
SPI NOR flash device for the Jetson AGX Orin platform.

Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06 15:27:17 +02:00
Peng Fan
5472b7df7c arm64: dts: imx8mq: add hdmi phy 27m clock
The i.MX8MQ PLL support hdmi phy 27m as pll reference clock,
so add a fixed clock for it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-06 21:23:45 +08:00
Aniruddha Rao
7ac853ba78 arm64: tegra: Update SDMMC1/3 clock source for Tegra194
The default parent for SDMMC1/3 clock sources can provide maximum frequency
of 136MHz for SDR104 mode.
Update parent clock source for SDMMC1/SDMMC3 instances
to increase the output clock frequency to 195MHz and improve the perf.

Signed-off-by: Aniruddha Rao <anrao@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06 15:22:39 +02:00
Michael Walle
bc046b952a arm64: dts: imx8mn-evk: fix the min/max voltages of the PMIC
Use the proper voltages as supported by the board instead of the ones
supported by the PMIC. The voltages were taken from both the schematic
of the 8MNANOLPD4-EVK eval board and the datasheet of the IMX8MN SoC.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-06 21:20:34 +08:00
Michael Walle
1cfa1e68af arm64: dts: imx8mn-evk: use proper names for PMIC outputs
Use the power signal names as given in the schematics of the reference
board.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-06 21:20:21 +08:00
Felix Fietkau
e9b65ecb7c arm64: dts: mediatek: mt7622: introduce nodes for Wireless Ethernet Dispatch
Introduce wed0 and wed1 nodes in order to enable offloading forwarding
between ethernet and wireless devices on the mt7622 chipset.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-06 14:08:49 +01:00
Felix Fietkau
3abd063019 arm64: dts: mediatek: mt7622: add support for coherent DMA
It improves performance by eliminating the need for a cache flush on rx and tx

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-06 14:08:48 +01:00
Oleksij Rempel
1c6add99c2 arm64: dts: imx8mm-kontron: fix ethernet node name
The node name of Ethernet controller should be "ethernet" instead of
"usbether" as required by Ethernet controller devicetree schema:
 Documentation/devicetree/bindings/net/ethernet-controller.yaml

This patch can potentially affect boot loaders patching against full
node path instead of using device aliases.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-06 20:50:29 +08:00
Marek Vasut
583f24ae42 arm64: dts: imx8mm: Add support for Data Modul i.MX8M Mini eDM SBC
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, PCIe, SPI NOR,
USB host and USB OTG.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-06 09:15:55 +08:00
Ariel D'Alessandro
236b8cfac4 arm64: dts: imx8mn-bsh-smm-s2pro: Add tlv320aic31xx audio card node
BSH SystemMaster (SMM) S2 PRO board comes with an audio card based on
tlv320aic31xx family codec.

The audio card exposes two playback devices, one of them using the EASRC
(Enhanced Asynchronous Sample Rate Converter) module. Note that this
would require SDMA and EASRC firmware in order to work.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-06 09:03:52 +08:00
Krzysztof Kozlowski
22cbcb8f4a arm64: dts: tesla: add a specific compatible to MCT on FSD
One compatible is used for the Multi-Core Timer on Tesla FSD SoC, which
is correct but not specific enough.  The MCT blocks have different
number of interrupts, so add a second specific compatible to Tesla FSD.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220304122424.307885-5-krzysztof.kozlowski@canonical.com
2022-04-04 18:53:08 +02:00
Krzysztof Kozlowski
2616922241 arm64: dts: exynos: add a specific compatible to MCT
One compatible is used for the Multi-Core Timer on most of the Samsung
Exynos SoCs, which is correct but not specific enough.  These MCT blocks
have different number of interrupts, so add a second specific
compatible to Exynos5433 and Exynos850.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220304122424.307885-4-krzysztof.kozlowski@canonical.com
2022-04-04 18:52:55 +02:00
Krzysztof Kozlowski
f4324583cd arm64: dts: exynos: move aliases to board in Exynos850
The aliases for typical blocks which are disabled by default in DTSI
(like I2C, UART and MMC) should be defined in the board DTS.  The board
should add aliases only for enabled blocks according to its specific
order.

On Exynos850, move aliases of enabled blocks to E850-96 board and remove
unused ones.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220221075219.10827-1-krzysztof.kozlowski@canonical.com
2022-04-04 18:47:40 +02:00
Allen-KH Cheng
aa8f3711fc arm64: dts: mt8192: Add H264 venc device node
Adds H264 venc node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220330133816.30806-4-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:38 +02:00
Allen-KH Cheng
e530d08093 arm64: dts: mt8192: Add PCIe node
Add PCIe node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220330133816.30806-2-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:38 +02:00
Allen-KH Cheng
b2edd51979 arm64: dts: mt8192: Add dpi node
Add dpi node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-18-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:37 +02:00
Allen-KH Cheng
4a65b0f1be arm64: dts: mt8192: Add m4u and smi nodes
Add m4u and smi nodes for mt8192 SoC

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-15-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:37 +02:00
Allen-KH Cheng
4d50a433d0 arm64: dts: mt8192: Add efuse node
Add efuse node for mt8192 SoC

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-12-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:37 +02:00
Allen-KH Cheng
27f0eb16b0 arm64: dts: mt8192: Fix nor_flash status disable typo
Correct nor_flash status disable typo of mt8192 SoC.

Fixes: d0a197a0d0 ("arm64: dts: mt8192: add nor_flash device node")

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-11-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:37 +02:00
Allen-KH Cheng
e5aac2258e arm64: dts: mt8192: Add xhci node
Add xhci node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-7-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:37 +02:00
Allen-KH Cheng
40de66b8bb arm64: dts: mt8192: Add usb-phy node
Add xhci node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-6-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:37 +02:00
Allen-KH Cheng
c63556ec6b arm64: dts: mt8192: Add SCP node
Add SCP node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-5-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:36 +02:00
Allen-KH Cheng
261691b401 arm64: dts: mt8192: Add pwrap node
Add pwrap node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220318144534.17996-2-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:36 +02:00
Nícolas F. R. A. Prado
33c7874b44 arm64: dts: mediatek: Format mediatek,larbs as an array of phandles
Commit 39bd2b6a37 ("dt-bindings: Improve phandle-array schemas")
updated the mediatek,larbs property in the mediatek,iommu.yaml
dt-binding to make it clearer that the phandles passed to the property
are independent, rather than subsequent arguments to the first phandle.

Update the mediatek,larbs property in the arm64 Devicetrees to use the
same formatting. This change doesn't impact any behavior: the compiled
dtb is exactly the same. It does however fix the warnings generated by
dtbs_check.

Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220301203147.1143782-2-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:09:36 +02:00
Koji Matsuoka
0182581a9f arm64: dts: renesas: r8a77961: Add CAN-FD node
Add the device node for the CAN-FD device on R-Car M3-W+.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220319223306.60782-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:56 +02:00
Ulrich Hecht
d2194187aa arm64: dts: renesas: falcon: Enable CANFD 0 and 1
Enables confirmed-working CAN interfaces 0 and 1 on the Falcon board.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20220309162609.3726306-4-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:56 +02:00
Ulrich Hecht
d63833b869 arm64: dts: renesas: r8a779a0: Add CANFD device node
This patch adds a CANFD device node for r8a779a0.

Based on patch by Kazuya Mizuguchi.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20220309162609.3726306-3-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:56 +02:00
Kieran Bingham
9a4259e596 arm64: dts: renesas: falcon-cpu: Use INTC_EX for SN65DSI86
The INTC block is a better choice for handling the interrupts on the V3U
as the INTC will always be powered, while the GPIO block may be
de-clocked if not in use. Further more, it may be likely to have a lower
power consumption as it does not need to drive the pins.

Switch the interrupt parent and interrupts definition from gpio1 to
irq0 on intc_ex, and configure the PFC accordingly.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20220309190631.1576372-1-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:56 +02:00
Lad Prabhakar
f6a2f28ab1 arm64: dts: renesas: r9a07g054: Add TSU node
Add TSU and thermal-zones nodes to RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220308223324.7456-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:56 +02:00
Lad Prabhakar
4b7e7f1083 arm64: dts: renesas: r9a07g054: Add OPP table
Add OPP table for RZ/V2L SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220308223324.7456-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Lad Prabhakar
809823b853 arm64: dts: renesas: r9a07g054: Fillup the GPU node
Renesas RZ/V2L SoC has Mali-G31 GPU, this patch fills up the GPU node and
adds opp table to RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220308223324.7456-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Biju Das
6f57895c49 arm64: dts: renesas: rzg2lc-smarc-som: Add vdd core regulator
Add vdd core regulator (1.1 V) for GPU.

This patch add regulator support for GPU.

The H/W manual mentions nothing about a GPU regulator. So using vdd
core regulator for GPU.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220307192436.13237-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Biju Das
a081c4fe98 arm64: dts: renesas: rzg2lc-smarc-som: Enable OSTM
Enable OSTM{1, 2} interfaces on RZ/G2LC SMARC EVK.
OSTM0 is reserved for TF-A.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220307192436.13237-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Biju Das
018d7b9347 arm64: dts: renesas: rzg2lc-smarc-som: Enable serial NOR flash
Enable mt25qu512a flash connected to QSPI0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220307192436.13237-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Biju Das
4eb6a6bb8e arm64: dts: renesas: rzg2lc-smarc: Enable Audio
Enable Audio on RZ/G2LC SMARC EVK by deleting ssi0 entries from
board DT and adding pincontrol entries to the soc-pinctrl dtsi,
so that entries from common dtsi kick in and make audio functionality
operational.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Biju Das
4fa1edc83b arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}
Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also enable i2c2 by adding to soc dtsi.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Biju Das
0a7c1c888a arm64: dts: renesas: rzg2l-smarc: Move out i2c3 and Audio codec from common dtsi
On RZ/G2L SoM module, the Audio codec is connected to i2c3 bus whereas on
RZ/G2LC, it is connected to i2c2 bus. So move out i2c3 and wm8978 nodes
from common dtsi to soc specific dtsi.

While at it add wm8978 node to RZ/G2LC SoC specific dtsi to fix the
build error.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Biju Das
a2b642d89e arm64: dts: renesas: rzg2lc-smarc-pinfunction: Sort the nodes
Sort the pinctrl nodes alphabetically.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Biju Das
1889f4798c arm64: dts: renesas: r9a07g044c2-smarc: Enable usb2.0
Enable usb2.0 host/device functionality on RZ/G2LC SMARC EVK
by deleting phyrst, usb2_phy{0,1}, ehci/ohci{0,1} and hsusb
entries from board DT, so that entries from common dtsi kick
in and make USB2.0 functionality operational.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220302074043.21525-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:55 +02:00
Lad Prabhakar
3f3c46d4e2 arm64: dts: renesas: r9a07g054: Add SPI{0,2} nodes and fillup SPI1 stub node
Add SPI{0,2} nodes and fillup SPI1 stub node in RZ/V2L (R9A07G054)
SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-13-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:05:46 +02:00
Lad Prabhakar
c9c4e5b7d2 arm64: dts: renesas: r9a07g054: Add USB2.0 device support
Fillup the hsusb stub node in RZ/V2L (R9A07G054) SoC DTSI which enables
USB2.0 device support.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-12-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:05:46 +02:00
Lad Prabhakar
a8e2a77b64 arm64: dts: renesas: r9a07g054: Add USB2.0 phy and host support
Add USB2.0 phy and host support to RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-11-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:05:46 +02:00
Lad Prabhakar
cd0339ec25 arm64: dts: renesas: r9a07g054: Add SSI{1,2,3} nodes and fillup the SSI0 stub node
Add SSI{1,2,3} nodes and fillup the SSI0 stub node in RZ/V2L
(R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-10-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:05:46 +02:00
Lad Prabhakar
f35a868bcf arm64: dts: renesas: r9a07g054: Fillup the WDT{0,1,2} stub nodes
Fillup the WDT{0,1,2} stub nodes in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-9-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:05:45 +02:00
Lad Prabhakar
f458b7707c arm64: dts: renesas: r9a07g054: Fillup the OSTM{0,1,2} stub nodes
Fillup the OSTM{0,1,2} stub nodes in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:05:45 +02:00
Lad Prabhakar
8d3da65c4c arm64: dts: renesas: r9a07g054: Fillup the sbc stub node
Fillup the sbc stub node in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:05:45 +02:00
Lad Prabhakar
e46a72e039 arm64: dts: renesas: r9a07g054: Fillup the I2C{0,1,2,3} stub nodes
Fillup the I2C{0,1,2,3} stub nodes in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:05:45 +02:00
Lad Prabhakar
e3ab457376 arm64: dts: renesas: r9a07g054l2-smarc: Drop deleting can{0,1}-stb-hog nodes
Drop deleting can{0,1}-stb-hog nodes so that CAN becomes operational on
Renesas RZ/V2L SMARC EVK.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 10:48:32 +02:00
Lad Prabhakar
791b7e1dcb arm64: dts: renesas: r9a07g054: Fillup the CANFD stub node
Fillup the CANFD stub node in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 10:48:32 +02:00
Lad Prabhakar
b0bb96e516 arm64: dts: renesas: r9a07g054l2-smarc: Drop deleting gpio-hog pins related to SDHI
Drop deleting gpio-hog pins related to SDHI0/1 so that SDHI functionality
gets enabled on Renesas RZ/V2L SMARC EVK.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 10:48:31 +02:00
Lad Prabhakar
ffe3f135dd arm64: dts: renesas: r9a07g054: Fillup the SDHI{0,1} stub nodes
Fillup the SDHI{0,1} stub nodes in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 10:48:31 +02:00
Lad Prabhakar
8eb5092e64 arm64: dts: renesas: r9a07g054: Fillup the ADC stub node
Fillup the ADC stub node in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220224125843.29733-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 10:48:31 +02:00
Shunzhou Jiang
085f7a298a arm64: dts: add support for S4 power domain controller
Enable power domain controller for Meson s4 SoC

Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220401110306.3364551-1-shunzhou.jiang@amlogic.com
2022-04-04 10:06:58 +02:00
Qianggui Song
3936339369 arm64: dts: meson-s4: add gpio_intc node
Add gpio interrupt controller node

Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220310092645.4303-1-qianggui.song@amlogic.com
2022-04-04 10:06:58 +02:00
Qianggui Song
6383f5a212 arm64: dts: meson-s4: add pinctrl node
Add pinctrl node for mesonn-s4

Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220310030410.718-1-qianggui.song@amlogic.com
2022-04-04 10:06:58 +02:00
Robin Murphy
a070d3b857 arm64: dts: rockchip: Add some pins for NanoPi4
The NanoPi4 boards have the RK808's always-on 32KHz clock wired to the
SoC, so have it claim the relevant pinctrl to actually enable the
CLK32K_IN input. The RK808's SLEEP pin is also wired to the SoC's
AP_PWROFF output, so we may as well claim that too.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/e870284a872567f163868b77267c01b77ed6f22a.1647381986.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-04 10:01:53 +02:00
Frank Wunderlich
16c0f95d9e arm64: dts: rockchip: Add sata nodes to rk356x
RK356x supports up to 3 sata controllers which were compatible with the
existing snps,dwc-ahci binding.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220311210357.222830-7-linux@fw-web.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-04 10:01:53 +02:00
Shawn Lin
4246d0bab2 arm64: dts: rockchip: Move drive-impedance-ohm to emmc phy on rk3399
drive-impedance-ohm is introduced for emmc phy instead of pcie phy.

Fixes: fb8b7460c9 ("arm64: dts: rockchip: Define drive-impedance-ohm for RK3399's emmc-phy.")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/r/1647336426-154797-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-04 10:01:53 +02:00
Vyacheslav Bocharov
87a8765724 arm64: meson: update WiFi SDIO in dts for JetHub D1
Fix the dts to match board's reference design:
- update the maximum SDIO frequency to match 3.3v regulator (Wi-Fi SDIO module)

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220326075110.1462301-5-adeep@lexina.in
2022-04-04 10:01:20 +02:00
Vyacheslav Bocharov
81bbd2bd24 arm64: meson: update SDIO voltage in dts for JetHub D1
Fix the dts to match board's reference design:
- update vddio_boot regulator to 3.3v (Wi-Fi SDIO module)
- add vccq_1v8 regulator with 1.8v for eMMC SDIO

In the first revision of JetHub D1 the vccq_1v8 regulator was 3.3v.
All installed eMMC modules were tested to work in HS200 mode at 3.3v
supply voltage. In the next revisions of the board eMMC will be
powered with 1.8v according to the standard.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220326075110.1462301-4-adeep@lexina.in
2022-04-04 10:01:20 +02:00
Vyacheslav Bocharov
cf94e26508 arm64: meson: dts: update serial alias in dts for JetHub D1
Change zigbee serial port alias to ttyAML2 for backward compatibility.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220326075110.1462301-3-adeep@lexina.in
2022-04-04 10:01:19 +02:00
Vyacheslav Bocharov
2bda08dfc5 arm64: meson: add dts bluetooth node for JetHub H1
Add bluetooth node for RTL8822CS uart to JetHub H1 dts file.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220326075110.1462301-2-adeep@lexina.in
2022-04-04 10:01:19 +02:00
Christian Hewitt
fd86d85401 arm64: dts: meson: remove CPU opps below 1GHz for SM1 boards
Amlogic SM1 devices experience CPU stalls and random board wedges when
the system idles and CPU cores clock down to lower opp points. Recent
vendor kernels include a change to remove 100-250MHz and other distro
sources also remove the 500/667MHz points. Unless all 100-667Mhz opps
are removed or the CPU governor forced to performance stalls are still
observed, so let's remove them to improve stability and uptime.

Fixes: 3d9e764830 ("arm64: dts: meson-sm1-sei610: enable DVFS")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220210100638.19130-3-christianshewitt@gmail.com
2022-04-04 09:52:03 +02:00
Christian Hewitt
6c4d636bc0 arm64: dts: meson: remove CPU opps below 1GHz for G12B boards
Amlogic G12B devices experience CPU stalls and random board wedges when
the system idles and CPU cores clock down to lower opp points. Recent
vendor kernels include a change to remove 100-250MHz and other distro
sources also remove the 500/667MHz points. Unless all 100-667Mhz opps
are removed or the CPU governor forced to performance stalls are still
observed, so let's remove them to improve stability and uptime.

Fixes: b96d4e9270 ("arm64: dts: meson-g12b: support a311d and s922x cpu operating points")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220210100638.19130-2-christianshewitt@gmail.com
2022-04-04 09:51:40 +02:00
Linus Torvalds
ba2d6201a9 SoC: fixes for 5.18, part 1
The introduction of vmap-stack on 32-bit arm caused a regression
 on a few omap3/omap4 machines that pass a stack variable into
 a firmware interface.
 
 The early pre-ACPI AMD Seattle machines have been broken for
 a while, Ard Biesheuvel has a series to bring them back for now.
 
 A few machines with multiple DMA channels used on a device have
 the channels in the wrong order according to the binding, which
 causes a harmless warning. Reversing the order is easier than
 fixing the tools to suppress the warning.
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Merge tag 'soc-fixes-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd BergmannL
 "The introduction of vmap-stack on 32-bit arm caused a regression on a
  few omap3/omap4 machines that pass a stack variable into a firmware
  interface.

  The early pre-ACPI AMD Seattle machines have been broken for a while,
  Ard Biesheuvel has a series to bring them back for now.

  A few machines with multiple DMA channels used on a device have the
  channels in the wrong order according to the binding, which causes a
  harmless warning. Reversing the order is easier than fixing the tools
  to suppress the warning"

* tag 'soc-fixes-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: ls1046a: Update i2c node dma properties
  arm64: dts: ls1043a: Update i2c dma properties
  ARM: dts: spear1340: Update serial node properties
  ARM: dts: spear13xx: Update SPI dma properties
  ARM: OMAP2+: Fix regression for smc calls for vmap stack
  dt: amd-seattle: add a description of the CPUs and caches
  dt: amd-seattle: disable IPMI controller and some GPIO blocks on B0
  dt: amd-seattle: add description of the SATA/CCP SMMUs
  dt: amd-seattle: add a description of the PCIe SMMU
  dt: amd-seattle: fix PCIe legacy interrupt routing
  dt: amd-seattle: upgrade AMD Seattle XGBE to new SMMU binding
  dt: amd-seattle: remove Overdrive revision A0 support
  dt: amd-seattle: remove Husky platform
2022-04-01 13:21:19 -07:00
Kuldeep Singh
eeeb4f1075
arm64: dts: ls1046a: Update i2c node dma properties
Reorder dmas and dma-names properties for i2c controller node to make it
compliant with bindings.

Fixes: 8126d88162 ("arm64: dts: add QorIQ LS1046A SoC support")
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
CC: soc@kernel.org
Link: https://lore.kernel.org/r/20220326042313.97862-5-singh.kuldeep87k@gmail.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-01 00:01:24 +02:00
Kuldeep Singh
aa4df840d1
arm64: dts: ls1043a: Update i2c dma properties
Reorder dmas and dma-names properties for i2c controller node to make it
compliant with bindings.

Fixes: 6d453cd223 ("arm64: dts: add Freescale LS1043a SoC support")
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
CC: soc@kernel.org
Link: https://lore.kernel.org/r/20220326042313.97862-4-singh.kuldeep87k@gmail.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-01 00:01:24 +02:00
Linus Torvalds
7203062171 TTY/Serial driver changes for 5.18-rc1
Here are the big set of tty and serial driver changes for 5.18-rc1.
 
 Nothing major, some more good cleanups from Jiri and 2 new serial
 drivers.  Highlights include:
 	- termbits cleanups
 	- export symbol cleanups and other core cleanups from Jiri Slaby
 	- new sunplus and mvebu uart drivers (amazing that people are
 	  still creating new uarts...)
 	- samsung serial driver cleanups
 	- ldisc 29 is now "reserved" for experimental/development line
 	  disciplines
 	- lots of other tiny fixes and cleanups to serial drivers and
 	  bindings
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'tty-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial driver updates from Greg KH:
 "Here are the big set of tty and serial driver changes for 5.18-rc1.

  Nothing major, some more good cleanups from Jiri and 2 new serial
  drivers. Highlights include:

   - termbits cleanups

   - export symbol cleanups and other core cleanups from Jiri Slaby

   - new sunplus and mvebu uart drivers (amazing that people are still
     creating new uarts...)

   - samsung serial driver cleanups

   - ldisc 29 is now "reserved" for experimental/development line
     disciplines

   - lots of other tiny fixes and cleanups to serial drivers and
     bindings

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'tty-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (104 commits)
  vt_ioctl: fix potential spectre v1 in VT_DISALLOCATE
  serial: 8250: fix XOFF/XON sending when DMA is used
  tty: serial: samsung: Add ARTPEC-8 support
  dt-bindings: serial: samsung: Add ARTPEC-8 UART
  serial: sc16is7xx: Clear RS485 bits in the shutdown
  tty: serial: samsung: simplify getting OF match data
  tty: serial: samsung: constify variables and pointers
  tty: serial: samsung: constify s3c24xx_serial_drv_data members
  tty: serial: samsung: constify UART name
  tty: serial: samsung: constify s3c24xx_serial_drv_data
  tty: serial: samsung: reduce number of casts
  tty: serial: samsung: embed s3c2410_uartcfg in parent structure
  tty: serial: samsung: embed s3c24xx_uart_info in parent structure
  serial: 8250_tegra: mark acpi_device_id as unused with !ACPI
  tty: serial: bcm63xx: use more precise Kconfig symbol
  serial: SERIAL_SUNPLUS should depend on ARCH_SUNPLUS
  tty: serial: jsm: fix two assignments in if conditions
  tty: serial: jsm: remove redundant assignments to variable linestatus
  serial: 8250_mtk: make two read-only arrays static const
  serial: samsung_tty: do not unlock port->lock for uart_write_wakeup()
  ...
2022-03-28 13:00:51 -07:00
Linus Torvalds
02e2af20f4 Char/Misc and other driver updates for 5.18-rc1
Here is the big set of char/misc and other small driver subsystem
 updates for 5.18-rc1.
 
 Included in here are merges from driver subsystems which contain:
 	- iio driver updates and new drivers
 	- fsi driver updates
 	- fpga driver updates
 	- habanalabs driver updates and support for new hardware
 	- soundwire driver updates and new drivers
 	- phy driver updates and new drivers
 	- coresight driver updates
 	- icc driver updates
 
 Individual changes include:
 	- mei driver updates
 	- interconnect driver updates
 	- new PECI driver subsystem added
 	- vmci driver updates
 	- lots of tiny misc/char driver updates
 
 There will be two merge conflicts with your tree, one in MAINTAINERS
 which is obvious to fix up, and one in drivers/phy/freescale/Kconfig
 which also should be easy to resolve.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  updates for 5.18-rc1.

  Included in here are merges from driver subsystems which contain:

   - iio driver updates and new drivers

   - fsi driver updates

   - fpga driver updates

   - habanalabs driver updates and support for new hardware

   - soundwire driver updates and new drivers

   - phy driver updates and new drivers

   - coresight driver updates

   - icc driver updates

  Individual changes include:

   - mei driver updates

   - interconnect driver updates

   - new PECI driver subsystem added

   - vmci driver updates

   - lots of tiny misc/char driver updates

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits)
  firmware: google: Properly state IOMEM dependency
  kgdbts: fix return value of __setup handler
  firmware: sysfb: fix platform-device leak in error path
  firmware: stratix10-svc: add missing callback parameter on RSU
  arm64: dts: qcom: add non-secure domain property to fastrpc nodes
  misc: fastrpc: Add dma handle implementation
  misc: fastrpc: Add fdlist implementation
  misc: fastrpc: Add helper function to get list and page
  misc: fastrpc: Add support to secure memory map
  dt-bindings: misc: add fastrpc domain vmid property
  misc: fastrpc: check before loading process to the DSP
  misc: fastrpc: add secure domain support
  dt-bindings: misc: add property to support non-secure DSP
  misc: fastrpc: Add support to get DSP capabilities
  misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP
  misc: fastrpc: separate fastrpc device from channel context
  dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells
  dt-bindings: nvmem: make "reg" property optional
  nvmem: brcm_nvram: parse NVRAM content into NVMEM cells
  nvmem: dt-bindings: Fix the error of dt-bindings check
  ...
2022-03-28 12:27:35 -07:00
Linus Torvalds
710f5d627a USB/Thunderbolt patches for 5.18-rc1
Here is the big set of USB and Thunderbolt changes for 5.18-rc1.
 
 Nothing major in here, just lots of little improvements and cleanups and
 new device support.  Highlights are:
 	- list iterator fixups for when we walk past the end of the list
 	  (a common problem that was cut/pasted in almost all USB gadget
 	  drivers)
 	- xen USB driver "hardening" for malicious hosts
 	- xhci driver updates and fixes for more hardware types
 	- xhci debug cable fixes to make it actually work again
 	- usb gadget audio driver improvements
 	- usb gadget storage fixes to work with OS-X
 	- lots of other small usb gadget fixes and updates
 	- USB DWC3 driver improvements for more hardware types
 	- Lots of other small USB driver improvements
 	- DTS updates for some USB platforms
 
 Note, the DTS updates will have a merge conflict in your tree.  The
 fixup should be simple, but if not, I can provide a merged tree if
 needed.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/Thunderbolt updates from Greg KH:
 "Here is the big set of USB and Thunderbolt changes for 5.18-rc1.

  Nothing major in here, just lots of little improvements and cleanups
  and new device support. Highlights are:

   - list iterator fixups for when we walk past the end of the list (a
     common problem that was cut/pasted in almost all USB gadget
     drivers)

   - xen USB driver "hardening" for malicious hosts

   - xhci driver updates and fixes for more hardware types

   - xhci debug cable fixes to make it actually work again

   - usb gadget audio driver improvements

   - usb gadget storage fixes to work with OS-X

   - lots of other small usb gadget fixes and updates

   - USB DWC3 driver improvements for more hardware types

   - Lots of other small USB driver improvements

   - DTS updates for some USB platforms

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'usb-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (172 commits)
  usb: gadget: fsl_qe_udc: Add missing semicolon in qe_ep_dequeue()
  dt-bindings: usb: mtk-xhci: add compatible for mt8186
  usb: dwc3: Issue core soft reset before enabling run/stop
  usb: gadget: Makefile: remove ccflags-y
  USB: usb-storage: Fix use of bitfields for hardware data in ene_ub6250.c
  usb: gadget: eliminate anonymous module_init & module_exit
  usb: usbip: eliminate anonymous module_init & module_exit
  xen/usb: harden xen_hcd against malicious backends
  usb: dwc3: gadget: Wait for ep0 xfers to complete during dequeue
  usb: dwc3: gadget: move cmd_endtransfer to extra function
  usb: dwc3: gadget: ep_queue simplify isoc start condition
  xen/usb: don't use arbitrary_virt_to_machine()
  usb: isp1760: remove redundant max_packet() macro
  usb: oxu210hp-hcd: remove redundant call to max_packet() macro
  usb: common: usb-conn-gpio: Make VBUS supply completely optional
  USB: storage: ums-realtek: fix error code in rts51x_read_mem()
  usb: early: xhci-dbc: Fix xdbc number parsing
  usb: early: xhci-dbc: Remove duplicate keep parsing
  x86/tsc: Be consistent about use_tsc_delay()
  usb: gadget: udc: s3c2410: remove usage of list iterator past the loop body
  ...
2022-03-26 13:08:25 -07:00
Linus Torvalds
169e77764a Networking changes for 5.18.
Core
 ----
 
  - Introduce XDP multi-buffer support, allowing the use of XDP with
    jumbo frame MTUs and combination with Rx coalescing offloads (LRO).
 
  - Speed up netns dismantling (5x) and lower the memory cost a little.
    Remove unnecessary per-netns sockets. Scope some lists to a netns.
    Cut down RCU syncing. Use batch methods. Allow netdev registration
    to complete out of order.
 
  - Support distinguishing timestamp types (ingress vs egress) and
    maintaining them across packet scrubbing points (e.g. redirect).
 
  - Continue the work of annotating packet drop reasons throughout
    the stack.
 
  - Switch netdev error counters from an atomic to dynamically
    allocated per-CPU counters.
 
  - Rework a few preempt_disable(), local_irq_save() and busy waiting
    sections problematic on PREEMPT_RT.
 
  - Extend the ref_tracker to allow catching use-after-free bugs.
 
 BPF
 ---
 
  - Introduce "packing allocator" for BPF JIT images. JITed code is
    marked read only, and used to be allocated at page granularity.
    Custom allocator allows for more efficient memory use, lower
    iTLB pressure and prevents identity mapping huge pages from
    getting split.
 
  - Make use of BTF type annotations (e.g. __user, __percpu) to enforce
    the correct probe read access method, add appropriate helpers.
 
  - Convert the BPF preload to use light skeleton and drop
    the user-mode-driver dependency.
 
  - Allow XDP BPF_PROG_RUN test infra to send real packets, enabling
    its use as a packet generator.
 
  - Allow local storage memory to be allocated with GFP_KERNEL if called
    from a hook allowed to sleep.
 
  - Introduce fprobe (multi kprobe) to speed up mass attachment (arch
    bits to come later).
 
  - Add unstable conntrack lookup helpers for BPF by using the BPF
    kfunc infra.
 
  - Allow cgroup BPF progs to return custom errors to user space.
 
  - Add support for AF_UNIX iterator batching.
 
  - Allow iterator programs to use sleepable helpers.
 
  - Support JIT of add, and, or, xor and xchg atomic ops on arm64.
 
  - Add BTFGen support to bpftool which allows to use CO-RE in kernels
    without BTF info.
 
  - Large number of libbpf API improvements, cleanups and deprecations.
 
 Protocols
 ---------
 
  - Micro-optimize UDPv6 Tx, gaining up to 5% in test on dummy netdev.
 
  - Adjust TSO packet sizes based on min_rtt, allowing very low latency
    links (data centers) to always send full-sized TSO super-frames.
 
  - Make IPv6 flow label changes (AKA hash rethink) more configurable,
    via sysctl and setsockopt. Distinguish between server and client
    behavior.
 
  - VxLAN support to "collect metadata" devices to terminate only
    configured VNIs. This is similar to VLAN filtering in the bridge.
 
  - Support inserting IPv6 IOAM information to a fraction of frames.
 
  - Add protocol attribute to IP addresses to allow identifying where
    given address comes from (kernel-generated, DHCP etc.)
 
  - Support setting socket and IPv6 options via cmsg on ping6 sockets.
 
  - Reject mis-use of ECN bits in IP headers as part of DSCP/TOS.
    Define dscp_t and stop taking ECN bits into account in fib-rules.
 
  - Add support for locked bridge ports (for 802.1X).
 
  - tun: support NAPI for packets received from batched XDP buffs,
    doubling the performance in some scenarios.
 
  - IPv6 extension header handling in Open vSwitch.
 
  - Support IPv6 control message load balancing in bonding, prevent
    neighbor solicitation and advertisement from using the wrong port.
    Support NS/NA monitor selection similar to existing ARP monitor.
 
  - SMC
    - improve performance with TCP_CORK and sendfile()
    - support auto-corking
    - support TCP_NODELAY
 
  - MCTP (Management Component Transport Protocol)
    - add user space tag control interface
    - I2C binding driver (as specified by DMTF DSP0237)
 
  - Multi-BSSID beacon handling in AP mode for WiFi.
 
  - Bluetooth:
    - handle MSFT Monitor Device Event
    - add MGMT Adv Monitor Device Found/Lost events
 
  - Multi-Path TCP:
    - add support for the SO_SNDTIMEO socket option
    - lots of selftest cleanups and improvements
 
  - Increase the max PDU size in CAN ISOTP to 64 kB.
 
 Driver API
 ----------
 
  - Add HW counters for SW netdevs, a mechanism for devices which
    offload packet forwarding to report packet statistics back to
    software interfaces such as tunnels.
 
  - Select the default NIC queue count as a fraction of number of
    physical CPU cores, instead of hard-coding to 8.
 
  - Expose devlink instance locks to drivers. Allow device layer of
    drivers to use that lock directly instead of creating their own
    which always runs into ordering issues in devlink callbacks.
 
  - Add header/data split indication to guide user space enabling
    of TCP zero-copy Rx.
 
  - Allow configuring completion queue event size.
 
  - Refactor page_pool to enable fragmenting after allocation.
 
  - Add allocation and page reuse statistics to page_pool.
 
  - Improve Multiple Spanning Trees support in the bridge to allow
    reuse of topologies across VLANs, saving HW resources in switches.
 
  - DSA (Distributed Switch Architecture):
    - replay and offload of host VLAN entries
    - offload of static and local FDB entries on LAG interfaces
    - FDB isolation and unicast filtering
 
 New hardware / drivers
 ----------------------
 
  - Ethernet:
    - LAN937x T1 PHYs
    - Davicom DM9051 SPI NIC driver
    - Realtek RTL8367S, RTL8367RB-VB switch and MDIO
    - Microchip ksz8563 switches
    - Netronome NFP3800 SmartNICs
    - Fungible SmartNICs
    - MediaTek MT8195 switches
 
  - WiFi:
    - mt76: MediaTek mt7916
    - mt76: MediaTek mt7921u USB adapters
    - brcmfmac: Broadcom BCM43454/6
 
  - Mobile:
    - iosm: Intel M.2 7360 WWAN card
 
 Drivers
 -------
 
  - Convert many drivers to the new phylink API built for split PCS
    designs but also simplifying other cases.
 
  - Intel Ethernet NICs:
    - add TTY for GNSS module for E810T device
    - improve AF_XDP performance
    - GTP-C and GTP-U filter offload
    - QinQ VLAN support
 
  - Mellanox Ethernet NICs (mlx5):
    - support xdp->data_meta
    - multi-buffer XDP
    - offload tc push_eth and pop_eth actions
 
  - Netronome Ethernet NICs (nfp):
    - flow-independent tc action hardware offload (police / meter)
    - AF_XDP
 
  - Other Ethernet NICs:
    - at803x: fiber and SFP support
    - xgmac: mdio: preamble suppression and custom MDC frequencies
    - r8169: enable ASPM L1.2 if system vendor flags it as safe
    - macb/gem: ZynqMP SGMII
    - hns3: add TX push mode
    - dpaa2-eth: software TSO
    - lan743x: multi-queue, mdio, SGMII, PTP
    - axienet: NAPI and GRO support
 
  - Mellanox Ethernet switches (mlxsw):
    - source and dest IP address rewrites
    - RJ45 ports
 
  - Marvell Ethernet switches (prestera):
    - basic routing offload
    - multi-chain TC ACL offload
 
  - NXP embedded Ethernet switches (ocelot & felix):
    - PTP over UDP with the ocelot-8021q DSA tagging protocol
    - basic QoS classification on Felix DSA switch using dcbnl
    - port mirroring for ocelot switches
 
  - Microchip high-speed industrial Ethernet (sparx5):
    - offloading of bridge port flooding flags
    - PTP Hardware Clock
 
  - Other embedded switches:
    - lan966x: PTP Hardward Clock
    - qca8k: mdio read/write operations via crafted Ethernet packets
 
  - Qualcomm 802.11ax WiFi (ath11k):
    - add LDPC FEC type and 802.11ax High Efficiency data in radiotap
    - enable RX PPDU stats in monitor co-exist mode
 
  - Intel WiFi (iwlwifi):
    - UHB TAS enablement via BIOS
    - band disablement via BIOS
    - channel switch offload
    - 32 Rx AMPDU sessions in newer devices
 
  - MediaTek WiFi (mt76):
    - background radar detection
    - thermal management improvements on mt7915
    - SAR support for more mt76 platforms
    - MBSSID and 6 GHz band on mt7915
 
  - RealTek WiFi:
    - rtw89: AP mode
    - rtw89: 160 MHz channels and 6 GHz band
    - rtw89: hardware scan
 
  - Bluetooth:
    - mt7921s: wake on Bluetooth, SCO over I2S, wide-band-speed (WBS)
 
  - Microchip CAN (mcp251xfd):
    - multiple RX-FIFOs and runtime configurable RX/TX rings
    - internal PLL, runtime PM handling simplification
    - improve chip detection and error handling after wakeup
 
 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Merge tag 'net-next-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next

Pull networking updates from Jakub Kicinski:
 "The sprinkling of SPI drivers is because we added a new one and Mark
  sent us a SPI driver interface conversion pull request.

  Core
  ----

   - Introduce XDP multi-buffer support, allowing the use of XDP with
     jumbo frame MTUs and combination with Rx coalescing offloads (LRO).

   - Speed up netns dismantling (5x) and lower the memory cost a little.
     Remove unnecessary per-netns sockets. Scope some lists to a netns.
     Cut down RCU syncing. Use batch methods. Allow netdev registration
     to complete out of order.

   - Support distinguishing timestamp types (ingress vs egress) and
     maintaining them across packet scrubbing points (e.g. redirect).

   - Continue the work of annotating packet drop reasons throughout the
     stack.

   - Switch netdev error counters from an atomic to dynamically
     allocated per-CPU counters.

   - Rework a few preempt_disable(), local_irq_save() and busy waiting
     sections problematic on PREEMPT_RT.

   - Extend the ref_tracker to allow catching use-after-free bugs.

  BPF
  ---

   - Introduce "packing allocator" for BPF JIT images. JITed code is
     marked read only, and used to be allocated at page granularity.
     Custom allocator allows for more efficient memory use, lower iTLB
     pressure and prevents identity mapping huge pages from getting
     split.

   - Make use of BTF type annotations (e.g. __user, __percpu) to enforce
     the correct probe read access method, add appropriate helpers.

   - Convert the BPF preload to use light skeleton and drop the
     user-mode-driver dependency.

   - Allow XDP BPF_PROG_RUN test infra to send real packets, enabling
     its use as a packet generator.

   - Allow local storage memory to be allocated with GFP_KERNEL if
     called from a hook allowed to sleep.

   - Introduce fprobe (multi kprobe) to speed up mass attachment (arch
     bits to come later).

   - Add unstable conntrack lookup helpers for BPF by using the BPF
     kfunc infra.

   - Allow cgroup BPF progs to return custom errors to user space.

   - Add support for AF_UNIX iterator batching.

   - Allow iterator programs to use sleepable helpers.

   - Support JIT of add, and, or, xor and xchg atomic ops on arm64.

   - Add BTFGen support to bpftool which allows to use CO-RE in kernels
     without BTF info.

   - Large number of libbpf API improvements, cleanups and deprecations.

  Protocols
  ---------

   - Micro-optimize UDPv6 Tx, gaining up to 5% in test on dummy netdev.

   - Adjust TSO packet sizes based on min_rtt, allowing very low latency
     links (data centers) to always send full-sized TSO super-frames.

   - Make IPv6 flow label changes (AKA hash rethink) more configurable,
     via sysctl and setsockopt. Distinguish between server and client
     behavior.

   - VxLAN support to "collect metadata" devices to terminate only
     configured VNIs. This is similar to VLAN filtering in the bridge.

   - Support inserting IPv6 IOAM information to a fraction of frames.

   - Add protocol attribute to IP addresses to allow identifying where
     given address comes from (kernel-generated, DHCP etc.)

   - Support setting socket and IPv6 options via cmsg on ping6 sockets.

   - Reject mis-use of ECN bits in IP headers as part of DSCP/TOS.
     Define dscp_t and stop taking ECN bits into account in fib-rules.

   - Add support for locked bridge ports (for 802.1X).

   - tun: support NAPI for packets received from batched XDP buffs,
     doubling the performance in some scenarios.

   - IPv6 extension header handling in Open vSwitch.

   - Support IPv6 control message load balancing in bonding, prevent
     neighbor solicitation and advertisement from using the wrong port.
     Support NS/NA monitor selection similar to existing ARP monitor.

   - SMC
      - improve performance with TCP_CORK and sendfile()
      - support auto-corking
      - support TCP_NODELAY

   - MCTP (Management Component Transport Protocol)
      - add user space tag control interface
      - I2C binding driver (as specified by DMTF DSP0237)

   - Multi-BSSID beacon handling in AP mode for WiFi.

   - Bluetooth:
      - handle MSFT Monitor Device Event
      - add MGMT Adv Monitor Device Found/Lost events

   - Multi-Path TCP:
      - add support for the SO_SNDTIMEO socket option
      - lots of selftest cleanups and improvements

   - Increase the max PDU size in CAN ISOTP to 64 kB.

  Driver API
  ----------

   - Add HW counters for SW netdevs, a mechanism for devices which
     offload packet forwarding to report packet statistics back to
     software interfaces such as tunnels.

   - Select the default NIC queue count as a fraction of number of
     physical CPU cores, instead of hard-coding to 8.

   - Expose devlink instance locks to drivers. Allow device layer of
     drivers to use that lock directly instead of creating their own
     which always runs into ordering issues in devlink callbacks.

   - Add header/data split indication to guide user space enabling of
     TCP zero-copy Rx.

   - Allow configuring completion queue event size.

   - Refactor page_pool to enable fragmenting after allocation.

   - Add allocation and page reuse statistics to page_pool.

   - Improve Multiple Spanning Trees support in the bridge to allow
     reuse of topologies across VLANs, saving HW resources in switches.

   - DSA (Distributed Switch Architecture):
      - replay and offload of host VLAN entries
      - offload of static and local FDB entries on LAG interfaces
      - FDB isolation and unicast filtering

  New hardware / drivers
  ----------------------

   - Ethernet:
      - LAN937x T1 PHYs
      - Davicom DM9051 SPI NIC driver
      - Realtek RTL8367S, RTL8367RB-VB switch and MDIO
      - Microchip ksz8563 switches
      - Netronome NFP3800 SmartNICs
      - Fungible SmartNICs
      - MediaTek MT8195 switches

   - WiFi:
      - mt76: MediaTek mt7916
      - mt76: MediaTek mt7921u USB adapters
      - brcmfmac: Broadcom BCM43454/6

   - Mobile:
      - iosm: Intel M.2 7360 WWAN card

  Drivers
  -------

   - Convert many drivers to the new phylink API built for split PCS
     designs but also simplifying other cases.

   - Intel Ethernet NICs:
      - add TTY for GNSS module for E810T device
      - improve AF_XDP performance
      - GTP-C and GTP-U filter offload
      - QinQ VLAN support

   - Mellanox Ethernet NICs (mlx5):
      - support xdp->data_meta
      - multi-buffer XDP
      - offload tc push_eth and pop_eth actions

   - Netronome Ethernet NICs (nfp):
      - flow-independent tc action hardware offload (police / meter)
      - AF_XDP

   - Other Ethernet NICs:
      - at803x: fiber and SFP support
      - xgmac: mdio: preamble suppression and custom MDC frequencies
      - r8169: enable ASPM L1.2 if system vendor flags it as safe
      - macb/gem: ZynqMP SGMII
      - hns3: add TX push mode
      - dpaa2-eth: software TSO
      - lan743x: multi-queue, mdio, SGMII, PTP
      - axienet: NAPI and GRO support

   - Mellanox Ethernet switches (mlxsw):
      - source and dest IP address rewrites
      - RJ45 ports

   - Marvell Ethernet switches (prestera):
      - basic routing offload
      - multi-chain TC ACL offload

   - NXP embedded Ethernet switches (ocelot & felix):
      - PTP over UDP with the ocelot-8021q DSA tagging protocol
      - basic QoS classification on Felix DSA switch using dcbnl
      - port mirroring for ocelot switches

   - Microchip high-speed industrial Ethernet (sparx5):
      - offloading of bridge port flooding flags
      - PTP Hardware Clock

   - Other embedded switches:
      - lan966x: PTP Hardward Clock
      - qca8k: mdio read/write operations via crafted Ethernet packets

   - Qualcomm 802.11ax WiFi (ath11k):
      - add LDPC FEC type and 802.11ax High Efficiency data in radiotap
      - enable RX PPDU stats in monitor co-exist mode

   - Intel WiFi (iwlwifi):
      - UHB TAS enablement via BIOS
      - band disablement via BIOS
      - channel switch offload
      - 32 Rx AMPDU sessions in newer devices

   - MediaTek WiFi (mt76):
      - background radar detection
      - thermal management improvements on mt7915
      - SAR support for more mt76 platforms
      - MBSSID and 6 GHz band on mt7915

   - RealTek WiFi:
      - rtw89: AP mode
      - rtw89: 160 MHz channels and 6 GHz band
      - rtw89: hardware scan

   - Bluetooth:
      - mt7921s: wake on Bluetooth, SCO over I2S, wide-band-speed (WBS)

   - Microchip CAN (mcp251xfd):
      - multiple RX-FIFOs and runtime configurable RX/TX rings
      - internal PLL, runtime PM handling simplification
      - improve chip detection and error handling after wakeup"

* tag 'net-next-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (2521 commits)
  llc: fix netdevice reference leaks in llc_ui_bind()
  drivers: ethernet: cpsw: fix panic when interrupt coaleceing is set via ethtool
  ice: don't allow to run ice_send_event_to_aux() in atomic ctx
  ice: fix 'scheduling while atomic' on aux critical err interrupt
  net/sched: fix incorrect vlan_push_eth dest field
  net: bridge: mst: Restrict info size queries to bridge ports
  net: marvell: prestera: add missing destroy_workqueue() in prestera_module_init()
  drivers: net: xgene: Fix regression in CRC stripping
  net: geneve: add missing netlink policy and size for IFLA_GENEVE_INNER_PROTO_INHERIT
  net: dsa: fix missing host-filtered multicast addresses
  net/mlx5e: Fix build warning, detected write beyond size of field
  iwlwifi: mvm: Don't fail if PPAG isn't supported
  selftests/bpf: Fix kprobe_multi test.
  Revert "rethook: x86: Add rethook x86 implementation"
  Revert "arm64: rethook: Add arm64 rethook implementation"
  Revert "powerpc: Add rethook support"
  Revert "ARM: rethook: Add rethook arm implementation"
  netdevice: add missing dm_private kdoc
  net: bridge: mst: prevent NULL deref in br_mst_info_size()
  selftests: forwarding: Use same VRF for port and VLAN upper
  ...
2022-03-24 13:13:26 -07:00
Ard Biesheuvel
6a2f0b2d3b
dt: amd-seattle: add a description of the CPUs and caches
Add a DT description of the CPU and cache hierarchy as found on
the AMD Seattle SOC. Given the tight coupling of the PMU with
the CPUs, move the PMU node into the cpu .dtsi file as well, and
add the missing affinity description.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:55 +01:00
Ard Biesheuvel
e0db1597a7
dt: amd-seattle: disable IPMI controller and some GPIO blocks on B0
Disable some peripherals that are not usable on B0 silicon based
Overdrives.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:54 +01:00
Ard Biesheuvel
429863e767
dt: amd-seattle: add description of the SATA/CCP SMMUs
Add descriptions of the SMMUs that cover the SATA controller(s)
on the AMD Seattle SOC. The CCP crypto accelerator shares its
SMMU with the second SATA controller, which is only enabled on
B1 silicon.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:54 +01:00
Ard Biesheuvel
dd5c160655
dt: amd-seattle: add a description of the PCIe SMMU
Add a description of the SMMU that covers the PCIe host bridge
on AMD Seattle.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:54 +01:00
Ard Biesheuvel
acd9208ef8
dt: amd-seattle: fix PCIe legacy interrupt routing
The AMD Seattle SOC can be configured to expose up to 3 PCIe root
ports, each of which is wired to 4 dedicated SPI wired interrupts
for legacy INTx support. Update the SOC DT description to reflect
this.

Fix a stale comment about the size of the MMIO64 resource window
while at it.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:54 +01:00
Ard Biesheuvel
9bd9a063ac
dt: amd-seattle: upgrade AMD Seattle XGBE to new SMMU binding
Upgrade the DT descriptions of the AMD Seattle XGBE network
controllers to use the current SMMU bindings.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:54 +01:00
Ard Biesheuvel
f179eb6b3c
dt: amd-seattle: remove Overdrive revision A0 support
Support for AMD Seattle silicon revision A0 is no longer relevant,
since we no longer have a driver for the network controller, and
the PCIe on these boards was very unreliable. So drop the DTS
description of the A0 version of the overdrive board.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:53 +01:00
Ard Biesheuvel
a4eb44a643
dt: amd-seattle: remove Husky platform
The Huskyboard never made it to production, and its successor the
Celloboard was only shipped in very limited quantities with ACPI
only firmware, so the historical significance of husky.dts is
highly questionable. Let's drop it.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:53 +01:00
Linus Torvalds
ed4643521e ARM: DT updates for 5.18
After a somewhat quiet 5.17 release, the size of the DT changes
 is a bit larger again. There are nine new SoC that get added,
 all of them related to existing platforms:
 
  - Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
 
  - Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet
 
  - Microchip Lan966 networking SoC and it evaluation board
 
  - Qualcomm Snapdragon 625/632 midrange phone SoCs, with the
    LG Nexus 5X and Fairphone FP3 phones
 
  - Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs,
    along with their evaluation boards
 
  - Samsung Exynos 850 phone SoC and reference board
 
  - Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
 
  - Tesla FSD (Fully Self-Driving), an automotive SoC losely derived
    from the Samsung Exynos family.
 
  - TI K3/AM62 SoC and reference board
 
 Support for additional functionality in existing dts files is added all
 over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner,
 i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom.
 
 Samsung has a rework for its pinctrl schema that is a bit tricky and
 requires driver changes to be included here.
 
 A few more platforms only have smaller cleanups and DT Schema fixes,
 this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
 
 The new machines are really too many to list, but I'll do it anyway:
 
  Allwinner:
    - A20-Marsboard development board
 
  Amlogic
   - Amediatek X96-AIR (Amlogic S905X3)
   - CYX A95XF3-AIR (Amlogic S905X3)
   - Haochuangy H96-Max (Amlogic S905X3)
   - Amlogic AQ222 (Amlogic S4)
   - OSMC Vero 4K+ (Amlogic S905D)
 
  Arm Juno
   - Separate DT depending on SCMI firmware version
 
  Aspeed:
   - Quanta S6Q BMC (AST2600)
   - ASRock ROMED8HM3 (AST2500)
 
  Broadcom:
   - Raspberry Pi Zero 2 W
 
  Marvell MVEBU/Armada:
   - Ctera C200 V1 NAS (kirkwood)
   - Ctera C200 V2 NAS (armada-370)
 
  Mstar
   - DongShanPiOne, a low-end embedded board
   - Miyoo Mini handheld game console
 
  NXP i.MX:
   - Numerous i.MX8M Mini based boards in even more variations, but
     none based on other SoCs this time:
     Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
     Gateworks GW7903
 
  Qualcomm:
   - Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
   - SHIFT6mq phone (Snapdragon 845)
   - Samsung Galaxy Book2 (Snapdragon 850)
   - Snapdragon 8 Gen 1 Hardware Development Kit
 
  TI OMAP:
   - SanCloud BeagleBone Enhanced WiFi
 
  Rockchip:
   - Pine64 PineNote ereader tablet (rk356x)
   - Bananapi-R2-Pro (rk356x)
 
  STM32:
   - emtrion emSBS-Argon embedded board (stm32mp157c)
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Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "After a somewhat quiet 5.17 release, the size of the DT changes is a
  bit larger again. There are nine new SoC that get added, all of them
  related to existing platforms:

   - Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB

   - Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G
     tablet

   - Microchip Lan966 networking SoC and it evaluation board

   - Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus
     5X and Fairphone FP3 phones

   - Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along
     with their evaluation boards

   - Samsung Exynos 850 phone SoC and reference board

   - Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone

   - Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived
     from the Samsung Exynos family.

   - TI K3/AM62 SoC and reference board

  Support for additional functionality in existing dts files is added
  all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91,
  Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and
  Broadcom.

  Samsung has a rework for its pinctrl schema that is a bit tricky and
  requires driver changes to be included here.

  A few more platforms only have smaller cleanups and DT Schema fixes,
  this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.

  The new machines are really too many to list, but I'll do it anyway:

  Allwinner:
   - A20-Marsboard development board

  Amlogic:
   - Amediatek X96-AIR (Amlogic S905X3)
   - CYX A95XF3-AIR (Amlogic S905X3)
   - Haochuangy H96-Max (Amlogic S905X3)
   - Amlogic AQ222 (Amlogic S4)
   - OSMC Vero 4K+ (Amlogic S905D)

  Arm Juno:
   - Separate DT depending on SCMI firmware version

  Aspeed:
   - Quanta S6Q BMC (AST2600)
   - ASRock ROMED8HM3 (AST2500)

  Broadcom:
   - Raspberry Pi Zero 2 W

  Marvell MVEBU/Armada:
   - Ctera C200 V1 NAS (kirkwood)
   - Ctera C200 V2 NAS (armada-370)

  Mstar:
   - DongShanPiOne, a low-end embedded board
   - Miyoo Mini handheld game console

  NXP i.MX:
   - Numerous i.MX8M Mini based boards in even more variations, but
    none based on other SoCs this time:
    Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
    Gateworks GW7903

  Qualcomm:
   - Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
   - SHIFT6mq phone (Snapdragon 845)
   - Samsung Galaxy Book2 (Snapdragon 850)
   - Snapdragon 8 Gen 1 Hardware Development Kit

  TI OMAP:
   - SanCloud BeagleBone Enhanced WiFi

  Rockchip:
   - Pine64 PineNote ereader tablet (rk356x)
   - Bananapi-R2-Pro (rk356x)

  STM32:
   - emtrion emSBS-Argon embedded board (stm32mp157c)"

* tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits)
  arm64: dts: n5x: drop invalid property and fix edac node name
  arm64: dts: fsd: Add the MCT support
  arm64: dts: stingray: Fix spi clock name
  arm64: dts: ns2: Fix spi clock name
  ARM: dts: rockchip: Update regulator name for PX3
  ARM: dts: rockchip: Add #clock-cells value for rk805
  arm64: dts: rockchip: Add #clock-cells value for rk805
  arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808
  arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly
  ARM: dts: at91: sama7g5: Add NAND support
  ARM: dts: at91: sama7g5: add eic node
  ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
  ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15
  arm64: dts: lg: align pl330 node name with dtschema
  arm64: dts: lg: add dma-cells to pl330 node
  arm64: dts: juno: align pl330 node name with dtschema
  arm64: dts: broadcom: Fix sata nodename
  arm64: dts: n5x: add sdr edac support
  arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
  dt-bindings: usb: dwc2: add disable-over-current
  ...
2022-03-23 18:37:22 -07:00
Linus Torvalds
356a1adca8 arm64 updates for 5.18
- Support for including MTE tags in ELF coredumps
 
 - Instruction encoder updates, including fixes to 64-bit immediate
   generation and support for the LSE atomic instructions
 
 - Improvements to kselftests for MTE and fpsimd
 
 - Symbol aliasing and linker script cleanups
 
 - Reduce instruction cache maintenance performed for user mappings
   created using contiguous PTEs
 
 - Support for the new "asymmetric" MTE mode, where stores are checked
   asynchronously but loads are checked synchronously
 
 - Support for the latest pointer authentication algorithm ("QARMA3")
 
 - Support for the DDR PMU present in the Marvell CN10K platform
 
 - Support for the CPU PMU present in the Apple M1 platform
 
 - Use the RNDR instruction for arch_get_random_{int,long}()
 
 - Update our copy of the Arm optimised string routines for str{n}cmp()
 
 - Fix signal frame generation for CPUs which have foolishly elected to
   avoid building in support for the fpsimd instructions
 
 - Workaround for Marvell GICv3 erratum #38545
 
 - Clarification to our Documentation (booting reqs. and MTE prctl())
 
 - Miscellanous cleanups and minor fixes
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Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 updates from Will Deacon:

 - Support for including MTE tags in ELF coredumps

 - Instruction encoder updates, including fixes to 64-bit immediate
   generation and support for the LSE atomic instructions

 - Improvements to kselftests for MTE and fpsimd

 - Symbol aliasing and linker script cleanups

 - Reduce instruction cache maintenance performed for user mappings
   created using contiguous PTEs

 - Support for the new "asymmetric" MTE mode, where stores are checked
   asynchronously but loads are checked synchronously

 - Support for the latest pointer authentication algorithm ("QARMA3")

 - Support for the DDR PMU present in the Marvell CN10K platform

 - Support for the CPU PMU present in the Apple M1 platform

 - Use the RNDR instruction for arch_get_random_{int,long}()

 - Update our copy of the Arm optimised string routines for str{n}cmp()

 - Fix signal frame generation for CPUs which have foolishly elected to
   avoid building in support for the fpsimd instructions

 - Workaround for Marvell GICv3 erratum #38545

 - Clarification to our Documentation (booting reqs. and MTE prctl())

 - Miscellanous cleanups and minor fixes

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (90 commits)
  docs: sysfs-devices-system-cpu: document "asymm" value for mte_tcf_preferred
  arm64/mte: Remove asymmetric mode from the prctl() interface
  arm64: Add cavium_erratum_23154_cpus missing sentinel
  perf/marvell: Fix !CONFIG_OF build for CN10K DDR PMU driver
  arm64: mm: Drop 'const' from conditional arm64_dma_phys_limit definition
  Documentation: vmcoreinfo: Fix htmldocs warning
  kasan: fix a missing header include of static_keys.h
  drivers/perf: Add Apple icestorm/firestorm CPU PMU driver
  drivers/perf: arm_pmu: Handle 47 bit counters
  arm64: perf: Consistently make all event numbers as 16-bits
  arm64: perf: Expose some Armv9 common events under sysfs
  perf/marvell: cn10k DDR perf event core ownership
  perf/marvell: cn10k DDR perfmon event overflow handling
  perf/marvell: CN10k DDR performance monitor support
  dt-bindings: perf: marvell: cn10k ddr performance monitor
  arm64: clean up tools Makefile
  perf/arm-cmn: Update watchpoint format
  perf/arm-cmn: Hide XP PUB events for CMN-600
  arm64: drop unused includes of <linux/personality.h>
  arm64: Do not defer reserve_crashkernel() for platforms with no DMA memory zones
  ...
2022-03-21 10:46:39 -07:00
Linus Torvalds
14702b3b24 ARM: SoC fix for 5.17, part 4
Here is one last regression fix for 5.17, reverting a patch
 that went into 5.16 as a cleanup that ended up breaking
 external interrupts on Layerscape chips.
 
 The revert makes it work again, but also reintroduces a
 build time warning about the nonstandard DT binding that
 will have to be dealt with in the future.
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Merge tag 'soc-fixes-5.17-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fix from Arnd Bergmann:
 "Here is one last regression fix for 5.17, reverting a patch that went
  into 5.16 as a cleanup that ended up breaking external interrupts on
  Layerscape chips.

  The revert makes it work again, but also reintroduces a build time
  warning about the nonstandard DT binding that will have to be dealt
  with in the future"

* tag 'soc-fixes-5.17-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  Revert "arm64: dts: freescale: Fix 'interrupt-map' parent address cells"
2022-03-19 16:36:32 -07:00
Krzysztof Kozlowski
bcea9aaa43
arm64: dts: n5x: drop invalid property and fix edac node name
The intel,sysmgr-syscon in EDAC/memory controller node is not a
recognized and documented property, so drop it to fix error:

  sdr_edac@f87f8000: 'intel,sysmgr-syscon' does not match any of the regexes: 'pinctrl-[0-9]+'

Align also the node name with Devicetree specification (generic, not
specific, and EDAC is purely Linux term).

Fixes: ef82c9be84 ("arm64: dts: n5x: add sdr edac support")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220318121044.108750-1-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-19 22:34:25 +01:00
Jeya R
8c8ce95b6f arm64: dts: qcom: add non-secure domain property to fastrpc nodes
FastRPC DSP domain would be set as secure if non-secure dsp property is not
added to the fastrpc DT node. Add this property to DT files of msm8916,
sdm845, sm8150, sm8250 and sm8350 so that nothing is broken after secure
domain patchset.

This patch is purely for backward compatibility reasons.

Signed-off-by: Jeya R <jeyr@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220214161002.6831-13-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-18 14:11:00 +01:00
Alim Akhtar
bfb60ede2c
arm64: dts: fsd: Add the MCT support
Add node relevant to support MCT, which is used as
one of the system timer on this SoC.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220223171858.11384-1-alim.akhtar@samsung.com
Link: https://lore.kernel.org/r/20220316154309.436028-2-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-16 19:57:40 +01:00
Vladimir Oltean
1447c63580
Revert "arm64: dts: freescale: Fix 'interrupt-map' parent address cells"
This reverts commit 869f0ec048. That
updated the expected device tree binding format for the ls-extirq
driver, without also updating the parsing code (ls_extirq_parse_map)
to the new format.

The context is that the ls-extirq driver uses the standard
"interrupt-map" OF property in a non-standard way, as suggested by
Rob Herring during review:
https://lore.kernel.org/lkml/20190927161118.GA19333@bogus/

This has turned out to be problematic, as Marc Zyngier discovered
through commit 0412841812 ("of/irq: Allow matching of an interrupt-map
local to an interrupt controller"), later fixed through commit
de4adddcbc ("of/irq: Add a quirk for controllers with their own
definition of interrupt-map"). Marc's position, expressed on multiple
opportunities, is that:

(a) [ making private use of the reserved "interrupt-map" name in a
    driver ] "is wrong, by the very letter of what an interrupt-map
    means. If the interrupt map points to an interrupt controller,
    that's the target for the interrupt."
https://lore.kernel.org/lkml/87k0g8jlmg.wl-maz@kernel.org/

(b) [ updating the driver's bindings to accept a non-reserved name for
    this property, as an alternative, is ] "is totally pointless. These
    machines have been in the wild for years, and existing DTs will be
    there *forever*."
https://lore.kernel.org/lkml/87ilvrk1r0.wl-maz@kernel.org/

Considering the above, the Linux kernel has quirks in place to deal with
the ls-extirq's non-standard use of the "interrupt-map". These quirks
may be needed in other operating systems that consume this device tree,
yet this is seen as the only viable solution.

Therefore, the premise of the patch being reverted here is invalid.
It doesn't matter whether the driver, in its non-standard use of the
property, complies to the standard format or not, since this property
isn't expected to be used for interrupt translation by the core.

This change restores LS1088A, LS2088A/LS2085A and LX2160A to their
previous bindings, which allows these systems to continue to use
external interrupt lines with the correct polarity.

Fixes: 869f0ec048 ("arm64: dts: freescale: Fix 'interrupt-map' parent address cells")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-16 19:41:14 +01:00
Biao Huang
79e1177809 arm64: dts: mt2712: update ethernet device node
Since there are some changes in ethernet driver:
update ethernet device node in dts to accommodate to it.

1. stmmac_probe_config_dt() in stmmac_platform.c will initialize specified
   parameters according to compatible string "snps,dwmac-4.20a", then,
   dwmac-mediatek.c can skip the initialization if add compatible string
   "snps,dwmac-4.20a" in eth device node.
2. commit 882007ed78 ("net-next: dt-binding: dwmac-mediatek: add more
   description for RMII") added rmii internal support, we should add
   corresponding clocks/clocks-names in eth device node.
3. add "snps,reset-delays-us = <0 10000 10000>;" to ensure reset delay
   can meet PHY requirement.

Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-16 12:49:23 +00:00
Greg Kroah-Hartman
7f220d4a38 Linux 5.17-rc8
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Merge tag 'v5.17-rc8' into usb-next

We need the Xen USB fixes as other patches depend on those changes.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-16 09:04:22 +01:00
Alexander Stein
290918c72a arm64: dts: imx8mp: Add memory for USB3 glue layer to usb3 nodes
The USB3 glue layer has 2 areas in the register set, see RM Rev.1
section 11.2.5.2.1 GLUE_usb3 memory map:
* USB3 control/status
* PHY control/status

Provide the memory area to the usb3 nodes for accessing the features
in the USB3 control area.

Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220218152707.2198357-5-alexander.stein@ew.tq-group.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-15 15:37:11 +01:00
Souradeep Chowdhury
bced4afc53 Revert "arm64: dts: qcom: sc7280: Add EUD dt node and dwc3 connector"
This reverts commit a0c68e4930.

Revert all the changes to add the Embedded USB Debugger(EUD) Node
in the device tree, the connector node and also changes to usb2 Node
associated with this.The changes need to be reverted as DT changes
for QCOM should go through the QCOM tree and not the USB tree.

Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Link: https://lore.kernel.org/r/8c863e7e76003511dff36383b518ab66d2dd6552.1645793187.git.quic_schowdhu@quicinc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-15 15:35:18 +01:00
Souradeep Chowdhury
45a7dbf484 Revert "arm64: dts: qcom: sc7280: Set the default dr_mode for usb2"
This reverts commit c18553956f.

Revert the change to set dr_mode for usb2 in case of
Embedded USB Debugger(EUD). This change needs to be
reverted as the DT changes for QCOM should go through
the QCOM tree and not the USB tree.

Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Link: https://lore.kernel.org/r/87008876afb33d8e1b7fd78d2fd5b6d9ec343d7d.1645793187.git.quic_schowdhu@quicinc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-15 15:35:18 +01:00
Ioana Ciornei
3cbe93a1f5 arch: arm64: dts: lx2160a: describe the SerDes block #1
Describe the SerDes block #1 using the generic phys infrastructure. This
way, the ethernet nodes can each reference their serdes lanes
individually using the 'phys' dts property.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-14 10:41:51 +00:00
Arnd Bergmann
2ef363660d SoCFPGA dts updates for v5.18, part 2
- More dt-bindings cleanup, this time, USB DWC2 properties
 - Add SDR EDAC dts entry for the N5X platform
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Merge tag 'socfpga_dts_update_for_v5.18_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA dts updates for v5.18, part 2
- More dt-bindings cleanup, this time, USB DWC2 properties
- Add SDR EDAC dts entry for the N5X platform

* tag 'socfpga_dts_update_for_v5.18_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: n5x: add sdr edac support
  arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
  dt-bindings: usb: dwc2: add disable-over-current
  dt-bindings: usb: dwc2: add iommus
  dt-bindings: usb: dwc2: fix compatible of Intel Agilex

Link: https://lore.kernel.org/r/20220310195740.151250-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-11 11:02:37 +01:00
Jakub Kicinski
1e8a3f0d2a Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
net/dsa/dsa2.c
  commit afb3cc1a39 ("net: dsa: unlock the rtnl_mutex when dsa_master_setup() fails")
  commit e83d565378 ("net: dsa: replay master state events in dsa_tree_{setup,teardown}_master")
https://lore.kernel.org/all/20220307101436.7ae87da0@canb.auug.org.au/

drivers/net/ethernet/intel/ice/ice.h
  commit 97b0129146 ("ice: Fix error with handling of bonding MTU")
  commit 43113ff734 ("ice: add TTY for GNSS module for E810T device")
https://lore.kernel.org/all/20220310112843.3233bcf1@canb.auug.org.au/

drivers/staging/gdm724x/gdm_lte.c
  commit fc7f750dc9 ("staging: gdm724x: fix use after free in gdm_lte_rx()")
  commit 4bcc4249b4 ("staging: Use netif_rx().")
https://lore.kernel.org/all/20220308111043.1018a59d@canb.auug.org.au/

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-10 17:16:56 -08:00
Linus Torvalds
55b4083b44 ARM: SoC fixes for 5.17, part 3
Here is a third set of fixes for the soc tree, well
 within the expected set of changes.
 
 Maintainer list changes:
  - Krzysztof Kozlowski and Jisheng Zhang both have
    new email addresses
  - Broadcom iProc has a new git tree
 
 Regressions:
  - Robert Foss sends a revert for a Mediatek DPI bridge
    patch that caused an inadvertent break in the DT binding
  - mstar timers need to be included in Kconfig
 
 Devicetree fixes for:
  - Aspeed ast2600 spi pinmux
  - Tegra eDP panels on Nyan FHD
  - Tegra display IOMMU
  - Qualcomm sm8350 UFS clocks
  - minor DT changes for Marvell Armada, Qualcomm sdx65,
    Qualcomm sm8450, and Broadcom BCM2711
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Merge tag 'soc-fixes-5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Here is a third set of fixes for the soc tree, well within the
  expected set of changes.

  Maintainer list changes:
   - Krzysztof Kozlowski and Jisheng Zhang both have new email addresses
   - Broadcom iProc has a new git tree

  Regressions:
   - Robert Foss sends a revert for a Mediatek DPI bridge patch that
     caused an inadvertent break in the DT binding
   - mstar timers need to be included in Kconfig

  Devicetree fixes for:
   - Aspeed ast2600 spi pinmux
   - Tegra eDP panels on Nyan FHD
   - Tegra display IOMMU
   - Qualcomm sm8350 UFS clocks
   - minor DT changes for Marvell Armada, Qualcomm sdx65, Qualcomm
     sm8450, and Broadcom BCM2711"

* tag 'soc-fixes-5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: marvell: armada-37xx: Remap IO space to bus address 0x0
  MAINTAINERS: Update Jisheng's email address
  Revert "arm64: dts: mt8183: jacuzzi: Fix bus properties in anx's DSI endpoint"
  dt-bindings: drm/bridge: anx7625: Revert DPI support
  ARM: dts: aspeed: Fix AST2600 quad spi group
  MAINTAINERS: update Krzysztof Kozlowski's email
  MAINTAINERS: Update git tree for Broadcom iProc SoCs
  ARM: tegra: Move Nyan FHD panels to AUX bus
  arm64: dts: armada-3720-turris-mox: Add missing ethernet0 alias
  ARM: mstar: Select HAVE_ARM_ARCH_TIMER
  soc: mediatek: mt8192-mmsys: Fix dither to dsi0 path's input sel
  arm64: dts: mt8183: jacuzzi: Fix bus properties in anx's DSI endpoint
  ARM: boot: dts: bcm2711: Fix HVS register range
  arm64: dts: qcom: c630: disable crypto due to serror
  arm64: dts: qcom: sm8450: fix apps_smmu interrupts
  arm64: dts: qcom: sm8450: enable GCC_USB3_0_CLKREF_EN for usb
  arm64: dts: qcom: sm8350: Correct UFS symbol clocks
  arm64: tegra: Disable ISO SMMU for Tegra194
  Revert "dt-bindings: arm: qcom: Document SDX65 platform and boards"
2022-03-10 11:43:01 -08:00
Arnd Bergmann
7e606edaa0 mvebu fixes for 5.17 (part 2)
Allow using old PCIe card on Armada 37xx
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Merge tag 'mvebu-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/fixes

mvebu fixes for 5.17 (part 2)

Allow using old PCIe card on Armada 37xx

* tag 'mvebu-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: armada-37xx: Remap IO space to bus address 0x0

Link: https://lore.kernel.org/r/87bkydj4fn.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-10 15:25:46 +01:00