mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-01 15:14:52 +00:00
3302e07346
The 'bootph-all' tag was added to the dt-schema to describe the various
nodes used during the different phases of bootup with DT. Add the
bootph-all tag to all required nodes for all AM65x platforms.
Mark the mailbox and ring accelerators needed to communicate the with
various vendor firmware and the power, clock and reset nodes along with
the MMR for the chip-id to facilitate detecting the SoC and which
silicon version during the early stages of bootup with 'bootph-all' as
they are used during all phases of bootup
--
Changes in v2:
- removed tag from &mcu_udmap{} node
Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250710-65-boot-phases-v2-1-d431deb88783@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
117 lines
2.7 KiB
Plaintext
117 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Device Tree Source for AM6 SoC Family Wakeup Domain peripherals
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*
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* Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
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*/
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&cbass_wakeup {
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dmsc: system-controller@44083000 {
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compatible = "ti,am654-sci";
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ti,host-id = <12>;
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mbox-names = "rx", "tx";
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mboxes = <&secure_proxy_main 11>,
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<&secure_proxy_main 13>;
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reg-names = "debug_messages";
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reg = <0x44083000 0x1000>;
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k3_pds: power-controller {
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compatible = "ti,sci-pm-domain";
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#power-domain-cells = <2>;
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bootph-all;
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};
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k3_clks: clock-controller {
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compatible = "ti,k2g-sci-clk";
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#clock-cells = <2>;
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bootph-all;
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};
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k3_reset: reset-controller {
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compatible = "ti,sci-reset";
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#reset-cells = <2>;
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bootph-all;
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};
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};
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wkup_conf: bus@43000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x43000000 0x20000>;
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chipid: chipid@14 {
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compatible = "ti,am654-chipid";
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reg = <0x14 0x4>;
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bootph-all;
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};
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};
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wkup_pmx0: pinctrl@4301c000 {
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compatible = "pinctrl-single";
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reg = <0x4301c000 0x118>;
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#pinctrl-cells = <1>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xffffffff>;
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};
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wkup_uart0: serial@42300000 {
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compatible = "ti,am654-uart";
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reg = <0x42300000 0x100>;
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interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <48000000>;
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power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;
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status = "disabled";
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};
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wkup_i2c0: i2c@42120000 {
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compatible = "ti,am654-i2c", "ti,omap4-i2c";
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reg = <0x42120000 0x100>;
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interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "fck";
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clocks = <&k3_clks 115 1>;
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power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
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status = "disabled";
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};
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intr_wkup_gpio: interrupt-controller@42200000 {
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compatible = "ti,sci-intr";
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reg = <0x42200000 0x200>;
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ti,intr-trigger-type = <1>;
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interrupt-controller;
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interrupt-parent = <&gic500>;
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#interrupt-cells = <1>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <156>;
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ti,interrupt-ranges = <0 712 16>;
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};
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wkup_gpio0: gpio@42110000 {
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compatible = "ti,am654-gpio", "ti,keystone-gpio";
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reg = <0x42110000 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&intr_wkup_gpio>;
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interrupts = <60>, <61>, <62>, <63>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,ngpio = <56>;
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ti,davinci-gpio-unbanked = <0>;
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clocks = <&k3_clks 59 0>;
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clock-names = "gpio";
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};
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wkup_vtm0: temperature-sensor@42050000 {
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compatible = "ti,am654-vtm";
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reg = <0x42050000 0x25c>;
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power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
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#thermal-sensor-cells = <1>;
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bootph-all;
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};
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};
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