mirror of
https://github.com/rust-vmm/vhost-device.git
synced 2026-01-01 12:41:58 +00:00
[i2c] Break process_queue() into two parts
Break out most of the non vring specific stuff to process_requests(), this is required for testing request processing properly. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
This commit is contained in:
Viresh Kumar
parent
0cc0fe4f7a
commit
f9f3bdf845
@ -19,5 +19,6 @@ thiserror = "1.0"
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vhost = { version = "0.2", features = ["vhost-user-slave"] }
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vhost-user-backend = { git = "https://github.com/rust-vmm/vhost-user-backend", rev = "4047c697470cc6c37e8e1835025b091d2b59c2f7" }
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virtio-bindings = ">=0.1"
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virtio-queue = { git = "https://github.com/rust-vmm/vm-virtio", rev = "66cda80" }
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vm-memory = "0.7"
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vmm-sys-util = "=0.9.0"
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@ -17,6 +17,7 @@ use virtio_bindings::bindings::virtio_net::{VIRTIO_F_NOTIFY_ON_EMPTY, VIRTIO_F_V
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use virtio_bindings::bindings::virtio_ring::{
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VIRTIO_RING_F_EVENT_IDX, VIRTIO_RING_F_INDIRECT_DESC,
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};
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use virtio_queue::DescriptorChain;
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use vm_memory::{ByteValued, Bytes, GuestMemoryAtomic, GuestMemoryMmap, Le16, Le32};
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use vmm_sys_util::epoll::EventSet;
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use vmm_sys_util::eventfd::{EventFd, EFD_NONBLOCK};
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@ -96,6 +97,141 @@ pub struct VhostUserI2cBackend<D: I2cDevice> {
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pub exit_event: EventFd,
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}
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type I2cDescriptorChain = DescriptorChain<GuestMemoryAtomic<GuestMemoryMmap<()>>>;
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/// Process the requests in the vring and dispatch replies
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fn process_requests<D: I2cDevice>(
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i2c_map: &Arc<I2cMap<D>>,
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requests: Vec<I2cDescriptorChain>,
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vring: Option<&VringRwLock>,
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) -> Result<bool> {
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let mut reqs: Vec<I2cReq> = Vec::new();
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if requests.is_empty() {
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return Ok(true);
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}
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// Iterate over each I2C request and push it to "reqs" vector.
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for desc_chain in requests.clone() {
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let descriptors: Vec<_> = desc_chain.clone().collect();
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if (descriptors.len() != 2) && (descriptors.len() != 3) {
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return Err(Error::UnexpectedDescriptorCount);
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}
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let desc_out_hdr = descriptors[0];
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if desc_out_hdr.is_write_only() {
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return Err(Error::UnexpectedWriteOnlyDescriptor);
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}
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if desc_out_hdr.len() as usize != size_of::<VirtioI2cOutHdr>() {
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return Err(Error::UnexpectedDescriptorSize);
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}
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let out_hdr = desc_chain
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.memory()
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.read_obj::<VirtioI2cOutHdr>(desc_out_hdr.addr())
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.map_err(|_| Error::DescriptorReadFailed)?;
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let flags = match out_hdr.flags.to_native() & VIRTIO_I2C_FLAGS_M_RD {
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VIRTIO_I2C_FLAGS_M_RD => I2C_M_RD,
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_ => 0,
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};
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let desc_in_hdr = descriptors[descriptors.len() - 1];
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if !desc_in_hdr.is_write_only() {
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return Err(Error::UnexpectedReadableDescriptor);
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}
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if desc_in_hdr.len() as usize != size_of::<u8>() {
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return Err(Error::UnexpectedDescriptorSize);
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}
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let (buf, len) = match descriptors.len() {
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// Buffer is available
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3 => {
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let desc_buf = descriptors[1];
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let len = desc_buf.len();
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if len == 0 {
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return Err(Error::UnexpectedDescriptorSize);
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}
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let mut buf = vec![0; len as usize];
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if flags != I2C_M_RD {
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if desc_buf.is_write_only() {
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return Err(Error::UnexpectedWriteOnlyDescriptor);
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}
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desc_chain
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.memory()
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.read(&mut buf, desc_buf.addr())
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.map_err(|_| Error::DescriptorReadFailed)?;
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} else if !desc_buf.is_write_only() {
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return Err(Error::UnexpectedReadableDescriptor);
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}
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(buf, len)
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}
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_ => (Vec::<u8>::new(), 0),
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};
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reqs.push(I2cReq {
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addr: out_hdr.addr.to_native() >> 1,
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flags,
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len: len as u16,
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buf,
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});
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}
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let in_hdr = {
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VirtioI2cInHdr {
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status: match i2c_map.transfer(&mut reqs) {
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Ok(()) => VIRTIO_I2C_MSG_OK,
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Err(_) => VIRTIO_I2C_MSG_ERR,
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},
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}
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};
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for (i, desc_chain) in requests.iter().enumerate() {
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let descriptors: Vec<_> = desc_chain.clone().collect();
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let desc_in_hdr = descriptors[descriptors.len() - 1];
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let mut len = size_of::<VirtioI2cInHdr>() as u32;
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if descriptors.len() == 3 {
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let desc_buf = descriptors[1];
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// Write the data read from the I2C device
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if reqs[i].flags == I2C_M_RD {
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desc_chain
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.memory()
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.write(&reqs[i].buf, desc_buf.addr())
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.map_err(|_| Error::DescriptorWriteFailed)?;
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}
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if in_hdr.status == VIRTIO_I2C_MSG_OK {
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len += desc_buf.len();
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}
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}
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// Write the transfer status
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desc_chain
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.memory()
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.write_obj::<VirtioI2cInHdr>(in_hdr, desc_in_hdr.addr())
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.map_err(|_| Error::DescriptorWriteFailed)?;
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if let Some(vring) = vring {
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if vring.add_used(desc_chain.head_index(), len).is_err() {
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warn!("Couldn't return used descriptors to the ring");
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}
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}
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}
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Ok(true)
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}
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impl<D: I2cDevice> VhostUserI2cBackend<D> {
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pub fn new(i2c_map: Arc<I2cMap<D>>) -> Result<Self> {
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Ok(VhostUserI2cBackend {
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@ -107,8 +243,6 @@ impl<D: I2cDevice> VhostUserI2cBackend<D> {
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/// Process the requests in the vring and dispatch replies
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fn process_queue(&self, vring: &VringRwLock) -> Result<bool> {
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let mut reqs: Vec<I2cReq> = Vec::new();
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let requests: Vec<_> = vring
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.get_mut()
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.get_queue_mut()
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@ -116,129 +250,13 @@ impl<D: I2cDevice> VhostUserI2cBackend<D> {
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.map_err(|_| Error::DescriptorNotFound)?
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.collect();
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if requests.is_empty() {
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return Ok(true);
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if process_requests(&self.i2c_map, requests, Some(vring))? {
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// Send notification once all the requests are processed
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vring
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.signal_used_queue()
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.map_err(|_| Error::NotificationFailed)?;
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}
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// Iterate over each I2C request and push it to "reqs" vector.
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for desc_chain in requests.clone() {
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let descriptors: Vec<_> = desc_chain.clone().collect();
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if (descriptors.len() != 2) && (descriptors.len() != 3) {
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return Err(Error::UnexpectedDescriptorCount);
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}
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let desc_out_hdr = descriptors[0];
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if desc_out_hdr.is_write_only() {
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return Err(Error::UnexpectedWriteOnlyDescriptor);
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}
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if desc_out_hdr.len() as usize != size_of::<VirtioI2cOutHdr>() {
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return Err(Error::UnexpectedDescriptorSize);
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}
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let out_hdr = desc_chain
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.memory()
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.read_obj::<VirtioI2cOutHdr>(desc_out_hdr.addr())
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.map_err(|_| Error::DescriptorReadFailed)?;
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let flags = match out_hdr.flags.to_native() & VIRTIO_I2C_FLAGS_M_RD {
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VIRTIO_I2C_FLAGS_M_RD => I2C_M_RD,
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_ => 0,
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};
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let desc_in_hdr = descriptors[descriptors.len() - 1];
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if !desc_in_hdr.is_write_only() {
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return Err(Error::UnexpectedReadableDescriptor);
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}
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if desc_in_hdr.len() as usize != size_of::<u8>() {
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return Err(Error::UnexpectedDescriptorSize);
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}
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let (buf, len) = match descriptors.len() {
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// Buffer is available
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3 => {
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let desc_buf = descriptors[1];
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let len = desc_buf.len();
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if len == 0 {
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return Err(Error::UnexpectedDescriptorSize);
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}
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let mut buf = vec![0; len as usize];
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if flags != I2C_M_RD {
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if desc_buf.is_write_only() {
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return Err(Error::UnexpectedWriteOnlyDescriptor);
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}
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desc_chain
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.memory()
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.read(&mut buf, desc_buf.addr())
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.map_err(|_| Error::DescriptorReadFailed)?;
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} else if !desc_buf.is_write_only() {
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return Err(Error::UnexpectedReadableDescriptor);
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}
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(buf, len)
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}
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_ => (Vec::<u8>::new(), 0),
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};
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reqs.push(I2cReq {
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addr: out_hdr.addr.to_native() >> 1,
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flags,
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len: len as u16,
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buf,
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});
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}
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let in_hdr = {
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VirtioI2cInHdr {
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status: match self.i2c_map.transfer(&mut reqs) {
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Ok(()) => VIRTIO_I2C_MSG_OK,
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Err(_) => VIRTIO_I2C_MSG_ERR,
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},
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}
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};
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for (i, desc_chain) in requests.iter().enumerate() {
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let descriptors: Vec<_> = desc_chain.clone().collect();
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let desc_in_hdr = descriptors[descriptors.len() - 1];
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let mut len = size_of::<VirtioI2cInHdr>() as u32;
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if descriptors.len() == 3 {
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let desc_buf = descriptors[1];
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// Write the data read from the I2C device
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if reqs[i].flags == I2C_M_RD {
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desc_chain
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.memory()
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.write(&reqs[i].buf, desc_buf.addr())
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.map_err(|_| Error::DescriptorWriteFailed)?;
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}
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if in_hdr.status == VIRTIO_I2C_MSG_OK {
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len += desc_buf.len();
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}
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}
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// Write the transfer status
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desc_chain
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.memory()
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.write_obj::<VirtioI2cInHdr>(in_hdr, desc_in_hdr.addr())
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.map_err(|_| Error::DescriptorWriteFailed)?;
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if vring.add_used(desc_chain.head_index(), len).is_err() {
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warn!("Couldn't return used descriptors to the ring");
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}
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}
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// Send notification once all the requests are processed
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vring
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.signal_used_queue()
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.map_err(|_| Error::NotificationFailed)?;
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Ok(true)
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}
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}
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