Wenjing Liu 613a819955 drm/amd/display: fix a pipe mapping error in dcn32_fpu ... [why] In dcn32 DML pipes are ordered the same as dc pipes but only for used pipes. For example, if dc pipe 1 and 2 are used, their dml pipe indices would be 0 and 1 respectively. However update_pipe_slice_table_with_split_flags doesn't skip indices for free pipes. This causes us to not reference correct dml pipe output when building pipe topology. [how] Use two variables to iterate dc and dml pipes respectively and only increment dml pipe index when current dc pipe is not free. Cc: stable@vger.kernel.org # 6.1+ Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-11-29 16:48:58 -05:00
..
amdgpu_dm	drm/amd/display: Remove redundant DRM device struct in amdgpu_dm_, mst_types.c	2023-11-29 16:23:39 -05:00
dc	drm/amd/display: fix a pipe mapping error in dcn32_fpu	2023-11-29 16:48:58 -05:00
dmub	drm/amd/display: Include udelay when waiting for INBOX0 ACK	2023-11-29 16:24:30 -05:00
include	drm/amd/display: Add missing chips for HDCP	2023-11-17 09:30:50 -05:00
modules	drm/amd/display: Send PQ bit in AMD VSIF	2023-11-17 09:30:50 -05:00
Kconfig	drm/amd/display: Allow building DC with clang on RISC-V	2023-07-21 16:52:25 -04:00
Makefile	drm/amd/display: Refactor resource into component directory	2023-11-17 09:30:50 -05:00
TODO