Linus Torvalds 56d428ae1c RISC-V Patches for the 6.7 Merge Window, Part 2 ... * Support for handling misaligned accesses in S-mode. * Probing for misaligned access support is now properly cached and handled in parallel. * PTDUMP now reflects the SW reserved bits, as well as the PBMT and NAPOT extensions. * Performance improvements for TLB flushing. * Support for many new relocations in the module loader. * Various bug fixes and cleanups. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmVOUCcTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYicJ2D/9S+9dnHYHVGTeJfr9Zf2T4r+qHBPyx LXbTAbgHN6139MgcRLMRlcUaQ04RVxuBCWhxewJ6mQiHiYNlullgKmJO8oYMS4uZ 2yQGHKhzKEVluXxe+qT6VW+zsP0cY6pDQ+e59AqZgyWzvATxMU4VtFfCDdjFG03I k/8Y3MUKSHAKzIHUsGHiMW5J2YRiM/iVehv2gZfanreulWlK6lyiV4AZ4KChu8Sa gix9QkFJw+9+7RHnouHvczt4xTqLPJQcdecLJsbisEI4VaaPtTVzkvXx/kwbMwX0 qkQnZ7I60fPHrCb9ccuedjDMa1Z0lrfwRldBGz9f9QaW37Eppirn6LA5JiZ1cA47 wKTwba6gZJCTRXELFTJLcv+Cwdy003E0y3iL5UK2rkbLqcxfvLdq1WAJU2t05Lmh aRQN10BtM2DZG+SNPlLoBpXPDw0Q3KOc20zGtuhmk010+X4yOK7WXlu8zNGLLE0+ yHamiZqAbpIUIEzwDdGbb95jywR1sUhNTbScuhj4Rc79ZqLtPxty1PUhnfqFat1R i3ngQtCbeUUYFS2YV9tKkXjLf/xkQNRbt7kQBowuvFuvfksl9UwMdRAWcE/h0M9P 7uz7cBFhuG0v/XblB7bUhYLkKITvP+ltSMyxaGlfpGqCLAH2KIztdZ2PLWLRdKeU +9dtZSQR6oBLqQ== =NhdR -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull more RISC-V updates from Palmer Dabbelt: - Support for handling misaligned accesses in S-mode - Probing for misaligned access support is now properly cached and handled in parallel - PTDUMP now reflects the SW reserved bits, as well as the PBMT and NAPOT extensions - Performance improvements for TLB flushing - Support for many new relocations in the module loader - Various bug fixes and cleanups * tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (51 commits) riscv: Optimize bitops with Zbb extension riscv: Rearrange hwcap.h and cpufeature.h drivers: perf: Do not broadcast to other cpus when starting a counter drivers: perf: Check find_first_bit() return value of: property: Add fw_devlink support for msi-parent RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs riscv: Fix set_memory_XX() and set_direct_map_XX() by splitting huge linear mappings riscv: Don't use PGD entries for the linear mapping RISC-V: Probe misaligned access speed in parallel RISC-V: Remove __init on unaligned_emulation_finish() RISC-V: Show accurate per-hart isa in /proc/cpuinfo RISC-V: Don't rely on positional structure initialization riscv: Add tests for riscv module loading riscv: Add remaining module relocations riscv: Avoid unaligned access when relocating modules riscv: split cache ops out of dma-noncoherent.c riscv: Improve flush_tlb_kernel_range() riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlb riscv: Improve flush_tlb_range() for hugetlb pages riscv: Improve tlb_flush() ...		2023-11-10 09:23:17 -08:00
..
auxvec.h	riscv: signal: Report signal frame size to userspace via auxv	2023-06-08 07:16:48 -07:00
bitsperlong.h	asm-generic: partially revert "Unify uapi bitsperlong.h for arm64, riscv and loongarch"	2023-08-17 14:51:20 +02:00
bpf_perf_event.h	riscv, bpf: Add missing uapi header for BPF_PROG_TYPE_PERF_EVENT programs	2019-12-19 16:03:31 +01:00
byteorder.h	treewide: add "WITH Linux-syscall-note" to SPDX tag of uapi headers	2019-07-25 11:05:10 +02:00
elf.h	riscv: Add remaining module relocations	2023-11-07 14:59:31 -08:00
hwcap.h	riscv: Extending cpufeature.c to detect V-extension	2023-06-08 07:16:35 -07:00
hwprobe.h	RISC-V Patches for the 6.7 Merge Window, Part 1	2023-11-08 09:21:18 -08:00
Kbuild	treewide: Add SPDX license identifier - Kbuild	2019-05-30 11:32:33 -07:00
kvm.h	RISC-V: KVM: Forward SBI DBCN extension to user-space	2023-10-20 16:50:36 +05:30
perf_regs.h	riscv: Add support for perf registers sampling	2019-09-05 00:48:58 -07:00
ptrace.h	Merge patch "RISC-V: Add ptrace support for vectors"	2023-09-08 11:24:38 -07:00
setup.h	riscv: Bump COMMAND_LINE_SIZE value to 1024	2023-03-01 18:35:43 -08:00
sigcontext.h	riscv: sigcontext: Correct the comment of sigreturn	2023-07-11 13:05:19 -07:00
ucontext.h	riscv: fix styling in ucontext header	2022-10-28 14:46:16 -07:00
unistd.h	RISC-V: Add a syscall for HW probing	2023-04-18 15:48:14 -07:00