This uses the MediaTek MT7622 PCIe driver, since the PCIe IP block is nearly
identical to the one in MT7622
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220615125335.96089-3-nbd@nbd.name
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
None of the sunxi pin controllers have a module reset line. This is
confirmed by documentation (A80) as well as experimentation (A33).
Let's remove the inaccurate properties.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220531053623.43851-3-samuel@sholland.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Latest drivers version requires phy-mode to be set. Otherwise we will
use "NA" mode and the switch driver will invalidate this port mode.
Fixes: 65ac79e181 ("net: dsa: microchip: add the phylink get_caps")
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Link: https://lore.kernel.org/r/20220610081621.584393-1-o.rempel@pengutronix.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220609113911.380368-5-krzysztof.kozlowski@linaro.org
Add DTS for ARMv7 based broadband SoC BCM63148. bcm63148.dtsi is the SoC
description DTS header and bcm963148.dts is a simple DTS file for
Broadcom BCM963148 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
gpio-keys children do not use unit addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add DTS for ARMv7 based broadband SoC BCM6756. bcm6756.dtsi is the SoC
description DTS header and bcm96756.dts is a simple DTS file for
Broadcom BCM96756 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add DTS for ARMv7 based broadband SoC BCM6855. bcm6855.dtsi is the SoC
description DTS header and bcm96855.dts is a simple DTS file for
Broadcom BCM96855 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add devicetree for the Google Chameleon v3 board.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The ecc manager is a part of the Arria 10 SoC, move it to the correct
dts.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The Mercury+ AA1 is not a standalone board, rather it's a module
with an Arria 10 SoC. Remove status = "okay" and i2c aliases, as they
are routed to the base board and should be enabled from there.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Adding a "secure" version of STM32 boards (DK1/DK2/ED1/EV1), SCMI (clock/
reset) protocol and OP-TEE node have been added in SoC dtsi file
(stm32mp151.dtsi). They have been added with a status disabled in order to
keep our legacy unchanged. It is actually not enough to keep our legacy
unchanged.
First, just a reminder about our use case: TF-A (BL2) loads and starts
OP-TEE, then loads and runs U-Boot. U-Boot code checks if an OP-TEE is
running, if yes it searches in Kernel device tree if an OP-TEE node is
present:
-If the OP-TEE node is not present then U-Boot copies OP-TEE node and its
reserved memory region from U-Boot device tree to the kernel device tree.
-If the OP-TEE node is present then it does nothing (this OP-TEE node will
be used by Linux). So U-Boot lets the kernel device tree unchanged thinking
it is correct for an OP-TEE usage. It is the case for our legacy boards,
the OP-TEE node is present (although disabled) but the reserved memory
region is not declared. As no memory region has been reserved for OP-TEE,
the end of DDR is seen by the kernel as free and then used for CMA. But as
OP-TEE is running, this end of DDR is already used by OP-TEE. So as soon as
kernel tries to access to the CMA region OP-TEE raises an error.
To fix it, all OP-TEE node and SCMI is moved in a dedicated file.
Fixes: 40b4157dbd ("ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15")
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Link: https://lore.kernel.org/r/20220613071920.5463-1-alexandre.torgue@foss.st.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The commit feedaacdad ("Input: atmel_mxt_ts - fix up inverted RESET
handler") requires the reset GPIO to have GPIO_ACTIVE_LOW.
Fixes: 1524b27c94 ("ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsi")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Contrary to what was believed at the time, the ramp delay of 150us is not
plenty for the PU LDO with the default step time of 512 pulses of the 24MHz
clock. Measurements have shown that after enabling the LDO the voltage on
VDDPU_CAP jumps to ~750mV in the first step and after that the regulator
executes the normal ramp up as defined by the step size control.
This means it takes the regulator between 360us and 370us to ramp up to
the nominal 1.15V voltage for this power domain. With the old setting of
the ramp delay the power up of the PU GPC domain would happen in the middle
of the regulator ramp with the voltage being at around 900mV. Apparently
this was enough for most units to properly power up the peripherals in the
domain and execute the reset. Some units however, fail to power up properly,
especially when the chip is at a low temperature. In that case any access
to the GPU registers would yield an incorrect result with no way to recover
from this situation.
Change the ramp delay to 380us to cover the measured ramp up time with a
bit of additional slack.
Fixes: 40130d327f ("ARM: dts: imx6qdl: Allow disabling the PU regulator, add a enable ramp delay")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding header provides descriptive names for the RTC clock indexes,
since the indexes were arbitrarily chosen by the binding, not by the
hardware. Let's use the names, so the meaning is clearer.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220607012438.18183-1-samuel@sholland.org
This adds the entry for V3D for bcm2711 (used in the Raspberry Pi 4)
and the associated firmware clock entry.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Fix a few issue in bcm47622.dtsi file:
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
- Cosmetic changes
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add DTS for ARMv7 based broadband SoC BCM6846. bcm6846.dtsi is the
SoC description DTS header and bcm96846.dts is a simple DTS file for
Broadcom BCM96846 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm
Computer Module family Carrier Board.
Additional details available at
https://www.toradex.com/products/carrier-board/iris-carrier-board
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove the unnecessary leading zero from the reg address.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Disable most nodes on module-level to be enabled on carrier board-level.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
ADC2 is not available as it conflicts with the AD7879 resistive
touchscreen.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Correct CAN controller comment. It is a MCP2515 rather than a mpc258x.
Fixes: 66d59b678a ("ARM: dts: imx7-colibri: add MCP2515 CAN controller")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Each cpu-core is supposed to list its supply separately, add supply for
cpu1.
Fixes: 2d7401f863 ("ARM: dts: imx7d: Add cpu1 supply")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move I2C RTC to module-level to be enabled on carrier board-level.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adding no-1-8-v property to usdhc1 to disable +1.8V signaling (UHS-I)
mode on SoM dtsi level.
Clean up no-1-8-v from Aster carrier board dtsi, which is using defaults
from SoM dtsi and is not UHS-I capable.
A carrier board may have a MMC/SD card slot with a switchable power
supply. Add a pinctrl sleep used when the card power is off to avoid
backfeeding to the card and add the "sleep" pinctrl to the usdhc1
controller.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is a significant time required for PHY Micrel KSZ8041 to power up.
Add a delay on start-up/wake-up before the FEC starts communicating with
the PHY.
LDO1 takes 6 ms, R39 + C44 takes ~100ms, the KSZ8041 datasheet asks for
~11 ms before starting any programming on the MIIM.
Counting that, add a 200 ms delay to be sure the PHY is ready for
programming. Also, add the same off delay time to give the capacitor
time to discharge in order to properly reset.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move regulators to module-level device tree given they are standard
Colibri functionalities.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add Ethernet aliases which is required to properly pass MAC address
from bootloader.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move aliases, chosen, extcon and gpio-keys to module-level device tree
given they are standard Colibri functionalities.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The pin GPIO1_IO01 externally pulls down, it is required to sequentially
connect this pin (signal WAKE_MICO#) to +3v3 and then disconnect it to
trigger a wakeup interrupt.
Adding the flag GPIO_PULL_DOWN allows the system to be woken up just
connecting the pin GPIO1_IO01 to +3v3.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the video PLL as clock source to assure proper pixel clock
generation.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the MDIO bus with the respective PHY to allow for making changes to
that easier.
While at it also alphabetically re-order properties and improve
indentation.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rename display interface to match other modules to make it easier to
use device tree overlays.
The parallel RGB interface (lcdif) and all related stuff turn on in a
device tree overlay. Keep them disabled in the main devicetree.
As these subsystems are provided by module and not a part of boards,
move their definitions into the module-level devicetree.
Disable ad7879 touchscreen which turns on in a devic tree overlay.
Remains it disabled in the main devicetree.
Move Atmel MXT capacitive touch controller device tree nodes from
carrier board to module level and add iomux pinctl groups for both the
Capacitive Touch Adapter (using SODIMM 28/30) and the capacitive touch
connector as found on later carrier boards (using SODIMM 106/107).
Keep touchscreen and display nodes enabled for NAND based i.MX 7
modules, since device tree overlays are not yet supported. For the
Colibri Evaluation Board keep the Capacitive Touch Adapter node
disabled and PWM2, PWM3 enabled instead.
For eMMC based modules keep nodes disabled to work in conjunction with
device tree overlays.
Add the iomuxc pinctrl group for the LVDS transceiver related signals to
use it in a device tree overlay.
While at it also alphabetically re=order them properties.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adapt the brightness steps as the backlight doesn't light up
for very low duty cycles.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Set #pwm-cells to the default 3 to gain access to the parameter
which allows inverting the PWM signal. This is useful to specify
a backlight which has its highest brightness at 0.
With the change to use the PWM with inverted polarity the PWM signal
is inverted to how it was before this patch.
This changes the meaning of the values in the brightness-levels
property. I.e. the duty-cycle changes from x/255 to (255-x)/255.
Keeping the brightness-levels will then have a big brightness
jump from 0 to 127 duty cycle, the other 6 steps will then be
barely noticeable.
Change the brightness-levels to provide the same brightness-levels
as before.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the pin muxing for MCLK used by the codec to the codec node
instead of placing it inside the audmux pinctrl group.
While no negative effects have been observed this should make sure that
MCLK is provided when the codec driver is probed.
Follows commit fa51e1dc4b ("ARM: dts: imx6qdl-apalis: Fix sgtl5000
detection issue")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220526204218.832029-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Based on the normalized pattern:
the code contained herein is licensed under the gnu general public
license you may obtain a copy of the gnu general public license
version 2 at the following locations: http://www opensource
org/licenses/gpl-license html http://www gnu org/copyleft/gpl html
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on the normalized pattern:
this file is licensed under the terms of the gnu general public
license version 2 this program is licensed as is without any warranty
of any kind whether express or implied
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on the normalized pattern:
this program is free software you can redistribute it and/or modify it
under the terms of the gnu general public license as published by the
free software foundation version 2 this program is distributed as is
without any warranty of any kind whether express or implied without
even the implied warranty of merchantability or fitness for a
particular purpose see the gnu general public license for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Move the power domain to its actual user. This keeps the power domain
enabled even when the USB host is runtime suspended. This is necessary
to detect any downstream events, like device attach.
Fixes: 02f8eb40ef ("ARM: dts: imx7s: Add power domain for imx7d HSIC")
Suggested-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220526204552.832961-2-krzysztof.kozlowski@linaro.org
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add dts for ARMv7 based broadband SoC BCM6878. bcm6878.dtsi is the
SoC description dts header and bcm96878.dts is a simple dts file for
Broadcom BCM96878 Reference board that only enable the UART port.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add dts for ARMv7 based broadband SoC BCM63178. bcm63178.dtsi is the
SoC description dts header and bcm963178.dts is a simple dts file for
Broadcom BCM963178 Reference board that only enable the UART port.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Since commit 094536003e ("dt-bindings: display: Convert
VC4 bindings to schemas") it has been defined that the properties
'#address-cells' and '#size-cells' are not necessary for the dpi
node. This results in a warning during dtbs_check:
dpi@7e208000: '#address-cells', '#size-cells' do not match any
of the regexes: 'pinctrl-[0-9]+'
Since we don't need a reg property to differentiate between
multiple ports, drop them from the dtsi file.
Suggested-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This driver only registers fixed rate clocks, since the clocks are fully
initialized by the boot loader and should not be changed later, according
to Airoha.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220314084409.84394-4-nbd@nbd.name
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The DTS uses hardware register values directly in pin controller pin
configuration. These are not some IDs or other abstraction layer but
raw numbers used in the registers.
These numbers were previously put in the bindings header to avoid code
duplication and to provide some context meaning (name), but they do not
fit the purpose of bindings.
Store the constants in a header next to DTS and use them instead of
bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220605160508.134075-5-krzysztof.kozlowski@linaro.org
The DTS uses hardware register values directly in pin controller pin
configuration. These are not some IDs or other abstraction layer but
raw numbers used in the registers.
These numbers were previously put in the bindings header to avoid code
duplication and to provide some context meaning (name), but they do not
fit the purpose of bindings. It is also quite confusing to use
constants prefixed with Exynos for other SoC, because there is actually
nothing here in common, except the actual value.
Store the constants in a header next to DTS and use them instead of
bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220605160508.134075-4-krzysztof.kozlowski@linaro.org
The DTS uses hardware register values directly in pin controller pin
configuration. These are not some IDs or other abstraction layer but
raw numbers used in the registers.
These numbers were previously put in the bindings header to avoid code
duplication and to provide some context meaning (name), but they do not
fit the purpose of bindings. It is also quite confusing to use
constants prefixed with Exynos for other SoC, because there is actually
nothing here in common, except the actual value.
Store the constants in a header next to DTS and use them instead of
bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220605160508.134075-3-krzysztof.kozlowski@linaro.org
The DTS uses hardware register values directly in pin controller pin
configuration. These are not some IDs or other abstraction layer but
raw numbers used in the registers.
These numbers were previously put in the bindings header to avoid code
duplication and to provide some context meaning (name), but they do not
fit the purpose of bindings. It is also quite confusing to use
constants prefixed with Exynos for other SoC, because there is actually
nothing here in common, except the actual value.
Store the constants in a header next to DTS and use them instead of
bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220605160508.134075-2-krzysztof.kozlowski@linaro.org
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220526204323.832243-2-krzysztof.kozlowski@linaro.org
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220526203547.830848-1-krzysztof.kozlowski@linaro.org
Add configuration for the LTL101AL01 panel and a pwm backlight to drive
the display in the p4note devices.
Signed-off-by: Martin Jücker <martin.juecker@gmail.com>
Link: https://lore.kernel.org/r/20220516193709.10037-3-martin.juecker@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Here is the "big" set of USB and Thunderbolt driver changes for
5.18-rc1. For the most part it's been a quiet development cycle for the
USB core, but there are the usual "hot spots" of development activity.
Included in here are:
- Thunderbolt driver updates:
- fixes for devices without displayport adapters
- lane bonding support and improvements
- other minor changes based on device testing
- dwc3 gadget driver changes. It seems this driver will never
be finished given that the IP core is showing up in zillions
of new devices and each implementation decides to do something
different with it...
- uvc gadget driver updates as more devices start to use and
rely on this hardware as well
- usb_maxpacket() api changes to remove an unneeded and unused
parameter.
- usb-serial driver device id updates and small cleanups
- typec cleanups and fixes based on device testing
- device tree updates for usb properties
- lots of other small fixes and driver updates.
All of these have been in linux-next for weeks with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB / Thunderbolt updates from Greg KH:
"Here is the "big" set of USB and Thunderbolt driver changes for
5.18-rc1. For the most part it's been a quiet development cycle for
the USB core, but there are the usual "hot spots" of development
activity.
Included in here are:
- Thunderbolt driver updates:
- fixes for devices without displayport adapters
- lane bonding support and improvements
- other minor changes based on device testing
- dwc3 gadget driver changes.
It seems this driver will never be finished given that the IP core
is showing up in zillions of new devices and each implementation
decides to do something different with it...
- uvc gadget driver updates as more devices start to use and rely on
this hardware as well
- usb_maxpacket() api changes to remove an unneeded and unused
parameter.
- usb-serial driver device id updates and small cleanups
- typec cleanups and fixes based on device testing
- device tree updates for usb properties
- lots of other small fixes and driver updates.
All of these have been in linux-next for weeks with no reported
problems"
* tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits)
USB: new quirk for Dell Gen 2 devices
usb: dwc3: core: Add error log when core soft reset failed
usb: dwc3: gadget: Move null pinter check to proper place
usb: hub: Simplify error and success path in port_over_current_notify
usb: cdns3: allocate TX FIFO size according to composite EP number
usb: dwc3: Fix ep0 handling when getting reset while doing control transfer
usb: Probe EHCI, OHCI controllers asynchronously
usb: isp1760: Fix out-of-bounds array access
xhci: Don't defer primary roothub registration if there is only one roothub
USB: serial: option: add Quectel BG95 modem
USB: serial: pl2303: fix type detection for odd device
xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI
xhci: Remove quirk for over 10 year old evaluation hardware
xhci: prevent U2 link power state if Intel tier policy prevented U1
xhci: use generic command timer for stop endpoint commands.
usb: host: xhci-plat: omit shared hcd if either root hub has no ports
usb: host: xhci-plat: prepare operation w/o shared hcd
usb: host: xhci-plat: create shared hcd after having added main hcd
xhci: prepare for operation w/o shared hcd
xhci: factor out parts of xhci_gen_setup()
...
Add clocks and clock-names to the rk3228 cru node, because
the device has to have at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330121923.24240-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add clocks and clock-names to the rk3036 cru node, because
the device has to have at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330114847.18633-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add clocks property to rk3066a/rk3188 cru node to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329111323.3569-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add clocks property to rk3288 cru node to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329113657.4567-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful
purpose, and certainly bear no relation at all to the actual underlying
interconnect topology. They appear to be cargo-cult copying from a
design misstep in the very early days of FDT adoption on ARM, which was
righted with the "arm,primecell" compatible, and the last trace of the
idea finally purged by commit 2ef7d5f342 ("ARM, ARM64: dts: drop
"arm,amba-bus" in favor of "simple-bus"").
As such, they can simply be removed and the DMA-330 nodes fitted into
the normal sort order.
The node names should be generic, so rename it to "dma-controller".
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330131608.30040-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add clocks and clock-names to the rv1108 cru node, because
the device has to have at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220330131608.30040-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The '#dma-channels' property was deprecated in favor of one defined by
generic dma-common DT bindings. Add new property while keeping old one
for backwards compatibility.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220516142857.6419-3-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The '#dma-channels' and '#dma-requests' properties were deprecated in
favor of these defined by generic dma-common DT bindings. Add new
properties while keeping old ones for backwards compatibility.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220516142857.6419-2-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Patch series from Nick Hawkins:
"The GXP is the HPE BMC SoC that is used in the majority of HPE current
generation servers. Traditionally the asic will last multiple
generations of server before being replaced.
Info about SoC:
HPE GXP is the name of the HPE Soc. This SoC is used to implement many
BMC features at HPE. It supports ARMv7 architecture based on the Cortex
A9 core. It is capable of using an AXI bus to which a memory controller
is attached. It has multiple SPI interfaces to connect boot flash and
BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It has
multiple i2c engines to drive connectivity with a host infrastructure.
The initial patches enable the watchdog and timer enabling the host to
be able to boot."
* hpe/gxp-soc:
MAINTAINERS: Introduce HPE GXP Architecture
ARM: dts: Introduce HPE GXP Device tree
dt-bindings: arm: hpe: add GXP Support
dt-bindings: timer: hpe,gxp-timer: Add HPE GXP Timer and Watchdog
clocksource/drivers/timer-gxp: Add HPE GXP Timer
watchdog: hpe-wdt: Introduce HPE GXP Watchdog
ARM: configs: multi_v7_defconfig: Add HPE GXP ARCH
ARM: hpe: Introduce the HPE GXP architecture
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are 40 branches this time, adding a lot of new hardware
support, and cleanups. Krzysztof Kozlowski continues his treewide
cleanups.
There are a number of new SoCs, all of them as part of existing
families, and typically added along with a reference board:
- Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L
general-purpose MPU.
- Renesas RZ/V2M (R9A09G011) is a smart camera SoC
- Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
cores and deep learning accerlation.
- Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
and dual Wifi-6.
- Corstone1000 is a generic platform from Arm that is used for designing
custom SoCs, the support for now is for the Fixed Virtual Platform
emulation for it.
- Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used
in upcoming Chromebooks.
- NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
MMU-less SoC to be added in a while
New machines based on already supported SoCs this time are mainly
for 32-bit platforms and include:
- Two wireless routers based on Broadcom bcm4708
- 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
for the industrial embedded market, and on NXP LS1021A based
IOT board.
- Two ethernet switches based on Microchip LAN966
- Eight Qualcomm Snapdragon based machines, including a smartwatch,
a Chromebook board and some phones
- Another phone based on the old ST-Ericsson Ux500 platform
- Seven STM32MP1 based boards
- Four single-board computers based on Rockchip RK3566/RK3568
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Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM DT updates from Arnd Bergmann:
"There are 40 branches this time, adding a lot of new hardware support,
and cleanups. Krzysztof Kozlowski continues his treewide cleanups.
There are a number of new SoCs, all of them as part of existing
families, and typically added along with a reference board:
- Renesas RZ/G2UL (R9A07G043) is the single-core version of the
RZ/G2L general-purpose MPU.
- Renesas RZ/V2M (R9A09G011) is a smart camera SoC
- Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
cores and deep learning accerlation.
- Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
and dual Wifi-6.
- Corstone1000 is a generic platform from Arm that is used for
designing custom SoCs, the support for now is for the Fixed Virtual
Platform emulation for it.
- Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in
upcoming Chromebooks.
- NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
MMU-less SoC to be added in a while
New machines based on already supported SoCs this time are mainly for
32-bit platforms and include:
- Two wireless routers based on Broadcom bcm4708
- 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
for the industrial embedded market, and on NXP LS1021A based IOT
board.
- Two ethernet switches based on Microchip LAN966
- Eight Qualcomm Snapdragon based machines, including a smartwatch, a
Chromebook board and some phones
- Another phone based on the old ST-Ericsson Ux500 platform
- Seven STM32MP1 based boards
- Four single-board computers based on Rockchip RK3566/RK3568"
* tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits)
ARM: dts: kswitch-d10: enable networking
ARM: dts: lan966x: add switch node
ARM: dts: lan966x: add serdes node
ARM: dts: lan966x: add reset switch reset node
ARM: dts: lan966x: add MIIM nodes
ARM: dts: lan966x: add hwmon node
ARM: dts: lan966x: add basic Kontron KSwitch D10 support
ARM: dts: lan966x: add flexcom I2C nodes
ARM: dts: lan966x: add flexcom SPI nodes
ARM: dts: lan966x: add all flexcom usart nodes
ARM: dts: lan966x: add missing uart DMA channel
ARM: dts: lan966x: add sgpio node
ARM: dts: lan966x: swap dma channels for crypto node
ARM: dts: lan966x: rename pinctrl nodes
ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
ARM: dts: at91: use generic node name for dataflash
ARM: dts: turris-omnia: Add atsha204a node
arm64: dts: mt8192: Follow binding order for SCP registers
arm64: dts: mediatek: add mtk-snfi for mt7622
arm64: dts: mediatek: mt8195-demo: enable uart1
...
Enable the GFX device with a framebuffer memory region.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220302024930.18758-3-tommy_huang@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
The GFX device is present in the AST2600 SoC.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220302024930.18758-2-tommy_huang@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
The IBM Everest and Rainier systems have a GPIO line that goes to the
power supplies. It has a dual function: 1) Fans Full Speed, and 2) Sync
input history.
Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
Link: https://lore.kernel.org/r/20220421213638.1151193-1-bjwyman@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add initial version of device tree for Nuvia DC-SCM BMC which is
equipped with Aspeed AST2600 BMC SoC.
Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com>
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Link: https://lore.kernel.org/r/20220325190247.468079-1-quic_jaehyoo@quicinc.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
set number of sample averaging to 128 for both PWR_AVG and VI_AVG
Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220418094827.6185-1-potin.lai@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add eeprom (24c26) on each sled for storing sled fru information.
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-7-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add an ioexp node on each sled baseed on DVT schematic, address at 0x41.
P0: SLEDX_SWD_MUX
P1: SLEDX_XRES_SWD_N
P2: SLEDX_CLKREQ_N
P3: SLEDX_PCIE_PWR_EN
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-6-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Update GPIO line names based on DVT schematic
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-5-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Enable mdio0 bus based on DVT schematic.
TODO: Add Marvell 88E6191 Switch
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-4-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Due to DVT schematic has stable spi signal, switch back to aspeed-smc
driver for improving performance.
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-3-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Enable ehci0 node for USB2 host feature
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220509151118.4899-2-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Set "spi-max-frequency" to 50 MHz for all the flashes under the FMC
controller to ensure the clock frequency is calculated correctly.
Suggested-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20220509175616.1089346-11-clg@kaod.org
Signed-off-by: Joel Stanley <joel@jms.id.au>
All these controllers support at least Dual SPI. Update the DTs.
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Tao Ren <rentao.bupt@gmail.com>
Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20220509175616.1089346-10-clg@kaod.org
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is compatible with the current driver and addresses issues when
running 'make dt_binding_check'.
Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Tao Ren <rentao.bupt@gmail.com>
Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20220509175616.1089346-2-clg@kaod.org
Signed-off-by: Joel Stanley <joel@jms.id.au>
Since SoM revision 1.9 the PHY has been replaced with an ADIN1300,
add an entry for it next to the original.
As Russell King pointed out, additional phy nodes cause warnings like:
mdio_bus 2188000.ethernet-1: MDIO device at address 1 is missing
To avoid this the new node has its status set to disabled. U-Boot will
be modified to enable the appropriate phy node after probing.
The existing ar8035 nodes have to stay enabled by default to avoid
breaking existing systems when they update Linux only.
Co-developed-by: Alvaro Karsz <alvaro.karsz@solid-run.com>
Signed-off-by: Alvaro Karsz <alvaro.karsz@solid-run.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
The HPE SoC is new to linux. A basic device tree layout with minimum
required for linux to boot including a timer and watchdog support has
been created.
The dts file is empty at this point but will be updated in subsequent
updates as board specific features are enabled.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
SAMA7G5-EK has 4 PDM microphones connected to PDMC0. PDMC0 pinmux is in
conflict with gmac1, gmac1 being enabled by default.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/all/20220307122202.2251639-6-codrin.ciubotariu@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Microchip's SAMA7G5 embeds two PDMCs. The PDMCs can be used to connect 2x4
PDM microphones.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/all/20220307122202.2251639-5-codrin.ciubotariu@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
As the DT specification recommends, the node names should be of a
generic nature. Thus, the most appropriate generic node name for
the at91 rtt IPs is the "rtc" node name.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/all/20220304161159.147784-3-sergiu.moga@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add the required 'atmel,rtt-rtc-time-reg' property to the "rtt" nodes
of the board files that were missing it.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/all/20220304161159.147784-2-sergiu.moga@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Merge tag 'v5.18-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
Delete no longer needed properties of MediaTek Larbs for MT2701.
* tag 'v5.18-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm: dts: mediatek: Get rid of mediatek, larb for MM nodes
Link: https://lore.kernel.org/r/b4383f23-0adc-b9de-a1d9-abd1c2f82b27@gmail.com
This concludes a cleanup that was started back in 2019, with an
incompatible DT binding change. Kernels before 5.18 can no longer
use the updated dtb from 5.19, and the drivers no longer parse the
old properties, which breaks compatibility with older dtb files.
Link: https://lore.kernel.org/lkml/1546318276-18993-2-git-send-email-yong.wu@mediatek.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable all the necessary network related nodes, wire the pinctrl
configurations, add the PHYs and connect them to the corresponding
network ports.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-14-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add the switch node and its 8 children ports. All are disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-13-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add the SerDes node. On the LAN966x SoC these SerDes are used to connect
network PHYs.
By default, that node is disabled.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-12-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add the switch reset node which will later be used by the switch driver.
The switch reset also resets the GPIO controller and the SGPIO
controller, thus it also has to be connectected to these nodes. This way
the reset will only issued once for the first device requesting the
reset.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-11-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add the MDIO controller nodes. The integrated PHYs are connected to the
second controller. This controller also takes care of the resets of the
integrated PHYs, thus it has two memory regions. The first controller
is routed to the external MDIO/MDC pins.
By default, they are disabled.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-10-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add the monitoring node which covers the temperature sensor as well as
the PWM controller and the FAN tacho input.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-9-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add basic support for the Kontron KSwitch D10 MMT. It comes in two
variants: "6G-2GS" which features 6 Gigabit copper ports and two SFP
cages and "8G" which features 6 Gigbabit copper ports (where two are
2.5G capable).
For now the following is supported and working:
- Kernel console
- SFP cages
- SPI
- SGPIO
- Watchdog
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
[claudiu.beznea: fixed conflict on Makefile]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-8-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add all I2C nodes of the flexcom IP blocks. The driver supports
FIFO, DMA or both combined. But the latter isn't working correctly.
Thus, skip the fifo-size property for now. DMA is doing single byte
reads in this case.
Keep the nodes disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-7-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add all the SPI nodes for the flexcom IP block. Keep them
disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-6-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add all the remaining usart nodes for the flexcom block. Although the
DMA channels are specified, DMA is not enabled by default because break
detection doesn't work with DMA.
Keep the nodes disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-5-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
The usart node of the flexcom3 block is missing the DMA channels. Add
it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-4-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Add the device tree node for the SGPIO IP block reused from the
SparX-5. Keep the node disabled by default.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-3-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
The YAML binding (crypto/atmel,at91sam9g46-aes.yaml) mandates the order
of the channels. Swap them to pass devicetree validation.
Fixes: 290deaa10c ("ARM: dts: add DT for lan966 SoC and 2-port board pcb8291")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-2-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220420194230.3415663-1-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
interrupt-parent is not to be used as a boolean property.
It is already present in the DT in the proper way it's supposed to be used:
interrupt-parent = <&gic>;
This is also reported by dtbs_check:
arch/arm/boot/dts/at91-sama7g5ek.dtb: interrupt-controller@e8c11000: interrupt-parent: True is not of type 'array'
From schema: /.local/lib/python3.8/site-packages/dtschema/schemas/interrupts.yaml
Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220503133127.64320-1-eugen.hristev@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
The node names should be generic, so use "flash" for dataflash nodes and
for cfi-flash.
Suggested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220412105013.249793-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Crypto module atsha204a is available at i2c address 0x64. Module is used
for symmetric cryptography and provides also hardware random number
generator and OTP storage for device serial number and MAC addresses.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
- New board support: PHYTEC phyGATE-Tauri-S, TQ-Systems MBa6UL,
LS1021A IoT board, Toradex Iris and Aster carrier, i.MX7D SMEGW01,
i.MXRT1050 EVK, Bosch ACC board.
- A series from Alexander Stein to update i.MX51 based digi-connectcore
board, regarding to DMA of UART devices, PMIC voltages, USB
vbus-supply and usbphy.
- A series of changes from David Jander and Oleksij Rempel to remove
prototype specific deprecated code not used in production from
i.MX6Q/DL Vicut1 board, and unify Vicut1 and Victgo variants to reduce
maintaining overhead.
- Quite some changes from different people to update imx6ull-colibri board
on various aspects, touchscreen, device tree overlays, NAND BCH geometry,
GPIO line names, FEC phy-supply, etc.
- A couple of changes from Fabio Estevam to switch imx6dl-plybas and
imx6ul-kontron-n6x1x-s to use standard 'uart-has-rtscts' property.
- A couple of patches from Li Yang to update IFC device compatible and
node name for LayerScape SoCs.
- Disable USB host to work around boot issue on imx6qdl-udoo board.
- A series from Max Krummenacher to update Colibri i.MX6DL device trees,
drop dedicated v1.1 DT, disable add-on accessories, cleanups, etc.
- Various random and small updates on i.MX28 and i.MX6 boards.
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Merge tag 'imx-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX ARM device tree update for 5.19:
- New board support: PHYTEC phyGATE-Tauri-S, TQ-Systems MBa6UL,
LS1021A IoT board, Toradex Iris and Aster carrier, i.MX7D SMEGW01,
i.MXRT1050 EVK, Bosch ACC board.
- A series from Alexander Stein to update i.MX51 based digi-connectcore
board, regarding to DMA of UART devices, PMIC voltages, USB
vbus-supply and usbphy.
- A series of changes from David Jander and Oleksij Rempel to remove
prototype specific deprecated code not used in production from
i.MX6Q/DL Vicut1 board, and unify Vicut1 and Victgo variants to reduce
maintaining overhead.
- Quite some changes from different people to update imx6ull-colibri board
on various aspects, touchscreen, device tree overlays, NAND BCH geometry,
GPIO line names, FEC phy-supply, etc.
- A couple of changes from Fabio Estevam to switch imx6dl-plybas and
imx6ul-kontron-n6x1x-s to use standard 'uart-has-rtscts' property.
- A couple of patches from Li Yang to update IFC device compatible and
node name for LayerScape SoCs.
- Disable USB host to work around boot issue on imx6qdl-udoo board.
- A series from Max Krummenacher to update Colibri i.MX6DL device trees,
drop dedicated v1.1 DT, disable add-on accessories, cleanups, etc.
- Various random and small updates on i.MX28 and i.MX6 boards.
* tag 'imx-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (77 commits)
ARM: dts: imx6ull-colibri: improve pinctrl node names
ARM: dts: imx6ull-colibri: move gpio-keys node to som dtsi
ARM: dts: imx6ull-colibri: add/update some comments
ARM: dts: imx6ull-colibri: fix nand bch geometry
ARM: dts: imx6ull-colibri: add support for toradex aster carrier boards
ARM: dts: imx6ull-colibri: add support for toradex iris carrier boards
ARM: dts: imx6ull-colibri: add gpio-line-names
ARM: dts: imx6ull-colibri: update device trees to support overlays
ARM: dts: imx6ull-colibri: update usdhc1 pixmux and signaling
ARM: dts: imx6ull-colibri: add touchscreen device nodes
ARM: dts: imx6ull-colibri: add phy-supply to fec
ARM: dts: imx6ull-colibri: change touch i2c parameters
ARM: dts: imx6ull-colibri: use pull-down for adc pins
ARM: dts: Add bosch acc board
ARM: dts: imx: Add i.MXRT1050-EVK support
ARM: dts: imx7d-smegw01: Add support for i.MX7D SMEGW01 board
ARM: dts: imx6qdl-udoo: Disable USB host to work around boot issues
ARM: dts: imx27: use new 'dma-channels' property
ARM: dts: imx6qdl-phytec: Add LED labels
ARM: dts: ls1021a: reduce the interrupt-map-mask
...
Link: https://lore.kernel.org/r/20220508033843.2773685-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a long overdue overhaul of the MSM8974 DeviceTrees,
aligning the style, structure and naming with what we've learned since
the introduction of this platform.
On top of this the Sony Rhine platform gained I2C masters, NFC and
pstore support and the Fairphone 2 gained touchscreen support.
For the new SDX65 platform reserved-memory nodes, rpmpd, SPMI, CPU
clocks, SDHCI controller, SMMU and TCSR mutex was added. As was the
initial DeviceTree for the related PMX65 PMIC.
MSM8226 gained VADC and RTC support and support for the ASUS ZenWatch 2
was added.
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Merge tag 'qcom-dts-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM DT updates for v5.19
This contains a long overdue overhaul of the MSM8974 DeviceTrees,
aligning the style, structure and naming with what we've learned since
the introduction of this platform.
On top of this the Sony Rhine platform gained I2C masters, NFC and
pstore support and the Fairphone 2 gained touchscreen support.
For the new SDX65 platform reserved-memory nodes, rpmpd, SPMI, CPU
clocks, SDHCI controller, SMMU and TCSR mutex was added. As was the
initial DeviceTree for the related PMX65 PMIC.
MSM8226 gained VADC and RTC support and support for the ASUS ZenWatch 2
was added.
* tag 'qcom-dts-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (62 commits)
ARM: dts: qcom: msm8974-FP2: Add supplies for remoteprocs
ARM: dts: qcom: msm8974-FP2: Configure charger
ARM: dts: qcom: msm8974-FP2: Add support for touchscreen
ARM: dts: qcom: sdx55: Remove ipa interconnect node
ARM: dts: qcom: msm8974: Add missing license headers
ARM: dts: qcom: msm8974-FP2: Add mmc* aliases
ARM: dts: qcom: msm8974-FP2: We're msm8974pro
ARM: dts: qcom-msm8974*: Remove unnecessary include
ARM: dts: qcom-msm8974-rhine: Add pstore node
ARM: dts: qcom-msm8974-rhine: Add NFC and enable I2C hosts
ARM: dts: qcom-msm8974*: Clean up old GPIO declarations
ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCI
ARM: dts: qcom-msm8974*: Enable IMEM unconditionally
ARM: dts: qcom-msm8974: Sort and clean up nodes
ARM: dts: qcom-msm8974: Convert ADSP to a MMIO device
ARM: dts: qcom-msm8974pro-*: Use the 8974pro name in DT filenames
ARM: dts: qcom-msm8974pro: Use &labels
ARM: dts: qcom-msm8974-castor: Use &labels
ARM: dts: qcom-msm8974-{"hon","am"}ami: Commonize and modernize the DTs
ARM: dts: qcom-msm8974-klte: Use &labels
...
Link: https://lore.kernel.org/r/20220509172125.313259-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This property doesn't seem to exist in the documentation nor
in source code, but for some reason it is defined in a bunch
of device trees.
Signed-off-by: Dang Huynh <danct12@riseup.net>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220425064231.243482-1-danct12@riseup.net
The gpio-keys define module level wake-up pin functionality. Move it
from the carrier board dts file to the Som dtsi file.
While at it, also re-order the properties in the gpio-keys node
alphabetically and rename to sub-node from power to wakeup.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add GPIO line names on module-level. Those are all GPIOs that a user
might use on his custom carrier board. If more meaningful names are
available on the carrier board, the user can overwrite the line names
in the carrier board-level device tree.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Prepare in-tree device trees for out-of-tree device tree overlay support
(eMMC SKU only).
Relocate panel-dpi default to edt,et057090dhu (RGB 18bit VGA 640x480)
to the module-level dtsi and remove it from the carrier board dtsi.
Keep backlight, resistive touch and Atmel maxtouch nodes enabled
for both eMMC and NAND modules.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Due to many carrier boards pulling the usdhc1 signals up to 3.3 volt we
need to disable 1.8 volt signaling. Adding the no-1-8-v property
basically disables UHS-I modes by default.
Also pull-up the command and data lines to the +V3.3_1.8_SD rail and
set them to the 200 MHz speed grade (e.g. pinmux bits 7-6: meaning 11
SPEED_3_max_200MHz).
Explicitly specify a bus-width of <4> in the module-level device tree
include file and drop the no-1-8-v property from the carrier boards
device trees.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move all Atmel nodes from the board-level into the main module-level
device tree and prepare the device trees for use with Atmel MXT device
tree overlays. Also, add required pinmux groups.
The common scheme for pin groups in touch screen overlays is as follows:
- pinctrl_atmel_conn - SODIMM 106/107 pins for INT/RST signals (default)
- pinctrl_atmel_adap - SODIMM 28/30 pins for INT/RST signals.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds the proper phy-supply to the FEC. This supply is actually
switched by a clock that is now properly stated. This has the advantage
to add a delay for that particular regulator which is needed.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Switch on 22 kOhm pull-ups and lower the I2C frequency to around 40 kHz
to get more reliable communication.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Disable the keeper and enable a 100k pull-down on the ADC pins as per
the following note in section 13.2 of the i.MX 6ULL Application
Processor Reference Manual, Rev. 1, 11/2017 [1]:
The keeper causes an undesired jump behavior in ADC. To avoid the
problem, disable keeper before starting ADC.
[1] https://www.nxp.com/webapp/Download?colCode=IMX6ULLRM
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- I2C, sound, USB, CANFD, timer, watchdog, (Q)SPI, cpufreq, and
thermal support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
development board,
- Initial support for the R-Car V4H SoC and the Renesas White Hawk
development board stack,
- DMA, RTC, and USB support for the RZ/N1D SoC,
- Initial support for the RZ/V2M SoC an the RZ/V2M Evaluation Kit
Board,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.19 (take two)
- I2C, sound, USB, CANFD, timer, watchdog, (Q)SPI, cpufreq, and
thermal support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
development board,
- Initial support for the R-Car V4H SoC and the Renesas White Hawk
development board stack,
- DMA, RTC, and USB support for the RZ/N1D SoC,
- Initial support for the RZ/V2M SoC an the RZ/V2M Evaluation Kit
Board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (40 commits)
arm64: dts: renesas: Add initial device tree for RZ/V2M EVK
arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY
ARM: dts: r9a06g032: Add USB PHY DT support
ARM: dts: r9a06g032: Add internal PCI bridge node
ARM: dts: r9a06g032: Describe the RTC
arm64: dts: renesas: Add interrupt-names to CANFD nodes
arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node
arm64: dts: renesas: r9a07g043: Create thermal zone to support IPA
arm64: dts: renesas: r9a07g043: Add TSU node
arm64: dts: renesas: r9a07g043: Add OPP table
arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodes
arm64: dts: renesas: r9a07g054: Fix external clk node names
arm64: dts: renesas: r9a07g044: Fix external clk node names
ARM: dts: r9a06g032: Fix the NAND controller node
ARM: dts: r9a06g032: Fill the UART DMA properties
ARM: dts: r9a06g032: Describe the DMA router
ARM: dts: r9a06g032: Add the two DMA nodes
arm64: dts: renesas: Remove empty rgb output endpoints
...
Link: https://lore.kernel.org/r/cover.1651828603.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Align SPI NOR node names to DT schema and drop unused/undocumented
dma-channels/dma-requests.
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Merge tag 'dt-cleanup-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Minor cleanup of ARM DTS for v5.19, part two
Align SPI NOR node names to DT schema and drop unused/undocumented
dma-channels/dma-requests.
* tag 'dt-cleanup-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: socfpga: drop useless 'dma-channels/requests' properties
ARM: dts: zynq-7000: drop useless 'dma-channels/requests' properties
ARM: dts: marvell: align SPI NOR node name with dtschema
ARM: dts: omap: align SPI NOR node name with dtschema
ARM: dts: nuvoton: align SPI NOR node name with dtschema
Link: https://lore.kernel.org/r/20220506081438.149192-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device tree for the Bosch ACC board, based on i.MX6 Dual.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The NXP i.MXRT1050 Evaluation Kit (EVK) provides a platform for rapid
evaluation of the i.MXRT, which features NXP's implementation of the Arm
Cortex-M7 core.
The EVK provides 32 MB SDRAM, 64 MB Quad SPI flash, Micro SD card socket,
USB 2.0 OTG.
This patch aims to support the preliminary booting up features
as follows:
GPIO
LPUART
SD/MMC
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Jesse: Add clock-parents, edma, usdhc, anatop, remove old pinctl]
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Describe the PCI USB devices that are behind the PCI bridge, adding
necessary links to the USB PHY device.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20220429134143.628428-8-herve.codina@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
UART 0 to 2 do not have DMA support, while UART 3 to 7 do.
Fill the "dmas" and "dma-names" properties for each of these nodes.
Please mind that these nodes go through the dmamux node which will
redirect the requests to the right DMA controller. The first 4 cells of
the "dmas" properties will be transferred as-is to the DMA
controllers. The last 2 cells are consumed by the dmamux. Which means
cell 0 and 4 are almost redundant, one giving the controller request ID
and the other the dmamux channel which is a 1:1 translation of the
request IDs, shifted by 16 when pointing to the second DMA controller.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20220421095323.101811-11-miquel.raynal@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
There is a dmamux on this SoC which allows picking two different sources
for a single DMA request.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220427095653.91804-10-miquel.raynal@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Describe the two DMA controllers available on this SoC.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220427095653.91804-9-miquel.raynal@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Devicetree updates for few boards and more clean-up for make dtbs warnings:
- Updates for am335x-myirtech oscillator and mtd
- Firmware configuration for i2c voltage scaling and IO isolation for am3/4
that are wired for these features
- A series of omap3 clock node clean-up for make dtbs warnings for
unique_unit_address and node_name_chars_strict
- Updates for dma-channel usage to add the generic dma-common properties
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Merge tag 'omap-for-v5.19/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
More devicetree changes for omaps
Devicetree updates for few boards and more clean-up for make dtbs warnings:
- Updates for am335x-myirtech oscillator and mtd
- Firmware configuration for i2c voltage scaling and IO isolation for am3/4
that are wired for these features
- A series of omap3 clock node clean-up for make dtbs warnings for
unique_unit_address and node_name_chars_strict
- Updates for dma-channel usage to add the generic dma-common properties
* tag 'omap-for-v5.19/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (26 commits)
ARM: dts: dm81xx: use new 'dma-channels/requests' properties
ARM: dts: am33xx: use new 'dma-channels/requests' properties
ARM: dts: Group omap3 CM_CLKSEL1_EMU clocks
ARM: dts: Group omap3 CM_CLKSEL_PER clocks
ARM: dts: Group omap3 CM_ICLKEN_PER clocks
ARM: dts: Group omap3 CM_FCLKEN_PER clocks
ARM: dts: Group omap3 CM_FCLKEN_CAM clocks
ARM: dts: Group omap3 CM_CLKSEL_DSS clocks
ARM: dts: Group omap3 CM_FCLKEN_DSS clocks
ARM: dts: Group omap3 CM_CLKOUT_CTRL clocks
ARM: dts: Group omap3 CM_CLKSEL1_PLL clocks
ARM: dts: Group omap3 CM_CLKSEL_WKUP clocks
ARM: dts: Group omap3 CM_ICLKEN_WKUP clocks
ARM: dts: Group omap3 CM_FCLKEN_WKUP clocks
ARM: dts: Group omap3 CM_CLKSEL_CORE clocks
ARM: dts: Group omap3 CM_ICLKEN3_CORE clocks
ARM: dts: Group omap3 CM_ICLKEN1_CORE clocks
ARM: dts: Group omap3 crypto accelerator clocks
ARM: dts: Group omap3 CM_FCLKEN1_CORE clocks
ARM: dts: Group omap3 CONTROL_DEVCONF1 clocks
...
Link: https://lore.kernel.org/r/pull-1651726643-535261@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.19, please pull the following:
- Oleksij fixes the ethernet node name for the USB Ethernet adapter on
BCM283x (Raspberry Pi 1/2/3) platforms
- Kuldeep fixes the PL022 SPI controller clock names to conform to the
binding
- Rafal updates the various BCM5301X (Northstar) Device Tree include
files to be dtsschema conforming for pinctrl, NAND
- Arinc adds the Asus RT-AC88U binding, removes some unnecessary
properties of the Ethernet switch DT node, populates the correct PHY
interface for port 5 of the switch, adds support for fetching the MAC
address from the NVMEM provider and finally disables gmac0 on that
device which is unused
- Phil updates the Raspberry Pi 1/2/3 DTS files to have the latest gpio
line names conforming to the printed circuit board layout
- Krzysztof updates various Broadcom DTS files to have a conforming SPI
nor Device Tree node
- Takayoshi adds support for the Buffalo WZR-1166DHP/WZR-1166DHP2
wireless routers based on the BCM4708 SoC
- William adds support for the BCM47622 ARMv7 Broadband SoC and provides
a basic DTS to boot upstream Linux on such a system
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Merge tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.19, please pull the following:
- Oleksij fixes the ethernet node name for the USB Ethernet adapter on
BCM283x (Raspberry Pi 1/2/3) platforms
- Kuldeep fixes the PL022 SPI controller clock names to conform to the
binding
- Rafal updates the various BCM5301X (Northstar) Device Tree include
files to be dtsschema conforming for pinctrl, NAND
- Arinc adds the Asus RT-AC88U binding, removes some unnecessary
properties of the Ethernet switch DT node, populates the correct PHY
interface for port 5 of the switch, adds support for fetching the MAC
address from the NVMEM provider and finally disables gmac0 on that
device which is unused
- Phil updates the Raspberry Pi 1/2/3 DTS files to have the latest gpio
line names conforming to the printed circuit board layout
- Krzysztof updates various Broadcom DTS files to have a conforming SPI
nor Device Tree node
- Takayoshi adds support for the Buffalo WZR-1166DHP/WZR-1166DHP2
wireless routers based on the BCM4708 SoC
- William adds support for the BCM47622 ARMv7 Broadband SoC and provides
a basic DTS to boot upstream Linux on such a system
* tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux: (22 commits)
ARM: dts: BCM5301X: Add DT for WZR-1166DHP,DHP2
ARM: dts: add dts files for bcmbca soc 47622
dt-bindings: arm: add bcmbca device tree binding document
ARM: dts: bcm283x: Align ETH_CLK GPIO line name
ARM: dts: bcm283x: Remove gpio line name NC
ARM: dts: bcm2835-rpi-b: Fix GPIO line names
ARM: dts: bcm2837-rpi-3-b-plus: Fix GPIO line name of power LED
ARM: dts: bcm2837-rpi-cm3-io3: Fix GPIO line names for SMPS I2C
ARM: dts: bcm2835-rpi-zero-w: Fix GPIO line name for Wifi/BT
ARM: dts: BCM5301X: Disable gmac0 and enable port@8 on Asus RT-AC88U
ARM: dts: broadcom: align SPI NOR node name with dtschema
dt-bindings: arm: bcm: add bindings for Asus RT-AC88U
ARM: dts: BCM5301X: Fix compatible strings for BCM53012 and BCM53016 SoC
dt-bindings: arm: bcm: create new description for BCM53016
dt-bindings: arm: bcm: fix BCM53012 and BCM53016 SoC strings
ARM: dts: BCM5301X: Retrieve gmac1 MAC address from NVRAM on Asus RT-AC88U
ARM: dts: BCM5301X: Add rgmii to port@5 of Broadcom switch on Asus RT-AC88U
ARM: dts: BCM5301X: Remove cell properties from srab ports on Asus RT-AC88U
ARM: dts: BCM5301X: Fix DTC warning for NAND node
ARM: dts: BCM5301X: Update pin controller node name
...
Link: https://lore.kernel.org/r/20220504210942.1838248-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
-MCU:
-Fix pinctrl node names to match with pinctrl yaml.
- MPU:
-General:
- Fix pinctrl node names to match with pinctrl yaml.
- Add Protonics boards support based on STM32MP151A SoC:
- PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
TI and Micrel 10BaseT Phys and wifi support.
- PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
and CO2 sensors.
- PRTT1A - 10BaseT1L multi functional controller.
- ST boards:
- Add RTC support on stm32mp13.
- Add button and heartbit support on stm32mp13 DK board.
- Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
on OP-TEE OS and SCMI protocol.
- DH boards:
- Use MCO2 to generate PHY clock and ETHRX clock in order to release
internal PLL for a better SD card usage.
- Add 1ms PHY post-reset on Avenger96 board to match with PHY
requirements.
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Merge tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.19, round 1
Highlights:
----------
-MCU:
-Fix pinctrl node names to match with pinctrl yaml.
- MPU:
-General:
- Fix pinctrl node names to match with pinctrl yaml.
- Add Protonics boards support based on STM32MP151A SoC:
- PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
TI and Micrel 10BaseT Phys and wifi support.
- PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
and CO2 sensors.
- PRTT1A - 10BaseT1L multi functional controller.
- ST boards:
- Add RTC support on stm32mp13.
- Add button and heartbit support on stm32mp13 DK board.
- Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
on OP-TEE OS and SCMI protocol.
- DH boards:
- Use MCO2 to generate PHY clock and ETHRX clock in order to release
internal PLL for a better SD card usage.
- Add 1ms PHY post-reset on Avenger96 board to match with PHY
requirements.
* tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits)
ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
dt-bindings: reset: stm32mp15: rename RST_SCMI define
dt-bindings: clock: stm32mp15: rename CK_SCMI define
dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure"
dt-bindings: rcc: Add optional external ethernet RX clock properties
ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
ARM: dts: stm32: add support for Protonic PRTT1x boards
ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant
dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards
dt-bindings: arm: stm32: correct blank lines
dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards
ARM: dts: stm32: enable RTC support on stm32mp135f-dk
ARM: dts: stm32: add RTC node on stm32mp131
ARM: dts: stm32: Fix PHY post-reset delay on Avenger96
ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
...
Link: https://lore.kernel.org/r/5818c943-882d-7e50-430d-ae3299a108ee@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support for the i.MX7D SMEGW01 board.
This is a gateway board that supports the following peripherals:
- eMMC / SD card
- RTC
- USB modem
- Wifi via SDIO
- Dual Ethernet
- CAN
- Serial SRAM
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Attempting to boot my Udoo Dual and Quad with mainline hangs during boot
after printing:
[ 3.270471] imx_usb 2184000.usb: No over current polarity defined
[ 3.922502] mxs_phy 20c9000.usbphy: Data pin can't make good contact.
[ 3.940097] imx_usb 2184200.usb: No over current polarity defined
where imx_usb 2184200.usb is usbh1 in the DT. Adding debug prints to the
code seems to show that we lock up at the first read in usbmisc_imx6q_init()
which in combination with the above logging about the USB controllers
suggests that we lock up on the first read in usbmisc_imx6q_init(). Looking
at some of the other i.MX6 boards and the warning messages that are being
printed suggests that there is bitrot in the DTS for the device so disable
it for now, with it disabled the board boots successfully. Clearly this is
not a real fix, but it does allow some use of the board with mainline.
Similar behaviour is seen all the way back as far as v4.19, I tried going
back to when the board was added but had toolchain issues. Vendor provided
binaries seem fine on the boards so it seems likely that the hardware is
fine and the issue is with some combination of the DT and kernel. This
should obviously be resolved properly but for now this at least allows
the kernel to boot with reduced functionality on these systems.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The '#dma-channels' property was deprecated in favor of one defined by
generic dma-common DT bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This allows boards the option of adding properties or disabling the
LEDs entirely.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Reduce the interrupt-map-mask of the external interrupt controller to
7 to align with the devicetree schema.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add a label for the cpu node, so that board devicetree files can
reference to the CPU node.
This is useful for describing a PMIC voltage that supplies the CPU
voltage.
For example:
&cpu0 {
cpu-supply = <&sw1_reg>;
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The usage of the 'fsl,uart-has-rtscts' property is deprecated.
Use the standard 'uart-has-rtscts' instead.
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The usage of the 'fsl,uart-has-rtscts' property is deprecated.
Use the standard 'uart-has-rtscts' instead.
Cc: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding of ifc device has been updated. Update dts to match
accordingly.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add a "secure" version based on SCMI of STM32 boards. Only boards
provided by STMicroelectronics are concerned:
-STM32MP157A-DK1
-STM32MP157C-DK2
-STM32MP157C-ED1
-STM32MP157C-EV1
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless. Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.
Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220430121902.59895-3-krzysztof.kozlowski@linaro.org
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless. Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.
Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220430121902.59895-2-krzysztof.kozlowski@linaro.org
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless. Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.
Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220430121902.59895-8-krzysztof.kozlowski@linaro.org
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless. Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.
Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220430121902.59895-7-krzysztof.kozlowski@linaro.org
Buffalo WZR-1166DHP/WZR-1166DHP2 wireless router with
- BCM4708A0
- 128MiB NAND flash
- 2T2R 11ac/a/b/g/n Wi-Fi
- 4x 10/100/1000M ethernet switch
- 1x USB 3.0 port
WZR-1166DHP and WZR-1166DHP2 have different memory capacity.
WZR-1166DHP
- 512 MiB DDR2 SDRAM
WZR-1166DHP2
- 256 MiB DDR2 SDRAM
These hardware components are very similar to the WZR-1750DHP
except for the number of antennas.
Signed-off-by: SHIMAMOTO Takayoshi <takayoshi.shimamoto.360@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Those were removed from msm8974.dtsi as part of a recent cleanup commit,
so add them back for FP2.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220421214243.352469-3-luca@z3ntu.xyz
Set the relevant properties on the smbb charger to allow the device to
charge properly.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220421214243.352469-2-luca@z3ntu.xyz
Configure the touchscreen found on the new display module of the FP2.
To add some detail, FP2 has two different screen/touchscreen variants
("display module"), the old module has Synaptics touchscreen, the new
one this Ilitek touchscreen.
We're only supporting the new display module for now.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220421214243.352469-1-luca@z3ntu.xyz
This device node is unused now that we've removed the driver that
consumed it in the kernel. Drop the unused node to save some space.
Cc: Alex Elder <elder@linaro.org>
Cc: Taniya Das <quic_tdas@quicinc.com>
Cc: Mike Tipton <quic_mdtipton@quicinc.com>
Cc: Georgi Djakov <djakov@kernel.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415005828.1980055-2-swboyd@chromium.org
The PA13 user button is connected to the PA13 pin of the stm32mp135f-dk
board. It requires an internal pull-up configuration.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The blue led (Linux heartbeat) is connected to the PA14 pin of the
stm32mp135f-dk board.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
- New devicetree for Codina TMO (SGH-T599).
- Add the Amastaos proximity sensor to the Codina.
- Add line impedance per machine to the Fuel Gauge
nodes.
- Add GPS to Janice, Skomer and Codina.
- Add NFC to the Codina for GT-I8160P.
- Some janitorial like clock names.
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Merge tag 'ux500-dts-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.19 kernel cycle:
- New devicetree for Codina TMO (SGH-T599).
- Add the Amastaos proximity sensor to the Codina.
- Add line impedance per machine to the Fuel Gauge
nodes.
- Add GPS to Janice, Skomer and Codina.
- Add NFC to the Codina for GT-I8160P.
- Some janitorial like clock names.
* tag 'ux500-dts-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Add GPS to the Codina
ARM: dts: ux500: Add NFC to the Codina
ARM: dts: ux500: Add GPS to Skomer device tree
ARM: dts: ux500: Add GPS to Janice device tree
ARM: dts: ux500: Add line impedance to fuel gauge
ARM: dts: ux500: Register Amstaos proximity sensor
ARM: dts: ux500: Add Codina TMO device tree
dt-bindings: arm: ux500: Document Codina-TMO
ARM: dts: ste-dbx: Update spi clock-names property
Link: https://lore.kernel.org/r/CACRpkdYngWscqak5phKm58O2GF0RmVETgwW4NCKTBiASdaEcyg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree changes for omaps:
- A series of changes to fix devicetree binding check warnings for omaps
the the use of clock-output-names and clksel bindings
- Update Ethernet node names for omaps
- Pinctrl updates for logicpd-som-lv
- A series of updates for am335x-guardian
- Regulator range update for am335x-baltos
Note that this branch is based on a upstream IOMMU fix as it's needed for
booting on some SoCs.
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Merge tag 'omap-for-v5.19/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps
Devicetree changes for omaps:
- A series of changes to fix devicetree binding check warnings for omaps
the the use of clock-output-names and clksel bindings
- Update Ethernet node names for omaps
- Pinctrl updates for logicpd-som-lv
- A series of updates for am335x-guardian
- Regulator range update for am335x-baltos
Note that this branch is based on a upstream IOMMU fix as it's needed for
booting on some SoCs.
* tag 'omap-for-v5.19/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits)
ARM: dts: am335x-baltos: update MPU regulator range
ARM: dts: am335x: Guardian: Update comments
ARM: dts: am335x: Guardian: Add gpio line manes
ARM: dts: am335x: Guardian: Update interface pinmux
ARM: dts: am335x: Guardian: Disable DMA property of USB1
ARM: dts: am335x: Guardian: Enable UART port two
ARM: dts: am335x: Guardian: Update backlight parameter
ARM: dts: am335x: Guardian: Add lcd port
ARM: dts: am335x: Guardian: Update regulator node name
ARM: dts: am335x: Guardian: Update beeper label
ARM: dts: am335x: Guardian: Update life led
ARM: dts: am335x: Guardian: Remove mmc status led
ARM: dts: am335x: Guardian: Disable poweroff support from RTC
ARM: dts: am335x: Guardian: Add keypad
ARM: dts: am335x: Guardian: Rename power button label
ARM: dts: am335x: Guardian: Update NAND partition table
ARM: dts: logicpd-som-lv: Move pinmuxing to peripheral nodes
ARM: dts: omap3/4/5: fix ethernet node name for different OMAP boards
ARM: dts: Drop custom clkctrl compatible and update omap5 l4per
ARM: dts: Add clock-output-names for omap5
...
Link: https://lore.kernel.org/r/pull-1650961799-428630@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- ADC, SDHI, CAN-FD, I2C, QSPI, timer, watchdog, sound, USB, SPI, GPU,
cpufreq, and thermal support for the RZ/V2L SoC, and the RZ/V2L
SMARC EVK development board,
- USB, I2C, Audio, NOR Flash, timer, SPI support for RZ/G2LC SMARC EVK
development board,
- Can-FD support for the R-Car M30W+ and V3U SoCs, and the Falcon
development board,
- I2C and GPIO support for the R-Car S4-8 SoC,
- I2C EEPROM support for the Falcon development board,
- SPI Multi I/O Bus Controller (RPC-IF) support for the R-Car H3,
M3-W(+), M3-N, E3, and D3 SoCs,
- RPC HyperFlash support for the Draak, Ebisu, Salvator-X(S), and ULCB
development boards,
- Initial support (UART, DMAC, pin control, SDHI, eMMC, Ethernet) for
the RZ/G2UL SoC, and the RZ/G2UL SMARC EVK development board,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.19
- ADC, SDHI, CAN-FD, I2C, QSPI, timer, watchdog, sound, USB, SPI, GPU,
cpufreq, and thermal support for the RZ/V2L SoC, and the RZ/V2L
SMARC EVK development board,
- USB, I2C, Audio, NOR Flash, timer, SPI support for RZ/G2LC SMARC EVK
development board,
- Can-FD support for the R-Car M30W+ and V3U SoCs, and the Falcon
development board,
- I2C and GPIO support for the R-Car S4-8 SoC,
- I2C EEPROM support for the Falcon development board,
- SPI Multi I/O Bus Controller (RPC-IF) support for the R-Car H3,
M3-W(+), M3-N, E3, and D3 SoCs,
- RPC HyperFlash support for the Draak, Ebisu, Salvator-X(S), and ULCB
development boards,
- Initial support (UART, DMAC, pin control, SDHI, eMMC, Ethernet) for
the RZ/G2UL SoC, and the RZ/G2UL SMARC EVK development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (55 commits)
ARM: dts: r9a06g032: Drop "arm,cortex-a7-timer" from timer node
arm64: dts: renesas: r8a779f0: Add GPIO nodes
arm64: dts: renesas: rzg2ul-smarc-som: Enable Ethernet on SMARC platform
arm64: dts: renesas: rzg2ul-smarc-som: Enable eMMC on SMARC platform
arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform
arm64: dts: renesas: r9a07g043: Add GbEthernet nodes
arm64: dts: renesas: r9a07g043: Add SDHI nodes
arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins
arm64: dts: renesas: r9a07g043: Fillup the pinctrl stub node
arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVK
arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC
arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi
arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board
arm64: dts: renesas: ulcb: Add RPC HyperFlash device node
arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node
arm64: dts: renesas: ebisu: Add RPC HyperFlash device node
arm64: dts: renesas: draak: Add RPC HyperFlash device node
arm64: dts: renesas: rcar-gen3: Add RPC device nodes
arm64: dts: renesas: rcar-gen4: Add interrupt properties to watchdog nodes
arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodes
...
Link: https://lore.kernel.org/r/cover.1650638505.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The '#dma-channels' and '#dma-requests' properties were deprecated in
favor of these defined by generic dma-common DT bindings. Add new
properties while keeping old ones for backwards compatibility.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Message-Id: <20220503065201.51818-7-krzysztof.kozlowski@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The '#dma-channels' and '#dma-requests' properties were deprecated in
favor of these defined by generic dma-common DT bindings. Add new
properties while keeping old ones for backwards compatibility.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Message-Id: <20220503065201.51818-5-krzysztof.kozlowski@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add appropriate firmware-name property for all am33xx platforms.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[dfustini: change property from 'ti,scale-data-fw' to 'firmware-name']
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Message-Id: <20220502021508.1342869-3-dfustini@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With this flag wkup_m3 is able to control IO isolation during
suspend on the board.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Message-Id: <20220502021508.1342869-2-dfustini@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This boards are based on STM32MP151AAD3 and use 10BaseT1L for communication.
- PRTT1C - 10BaseT1L switch
- PRTT1S - 10BaseT1L CO2 sensor board
- PRTT1A - 10BaseT1L multi functional controller
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This reverts commit 0dc23d1a8e, which caused another regression
as the pinctrl code actually expects an integer value of 0 or 1
rather than a simple boolean property.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch replaces the legacy partition table layout with a modern style.
As an additional change, we are reserving space for three backup MLO entries
and increasing space for the main bootloader.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Message-Id: <20220427081914.6773-2-eagle.alexander923@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CPU RTC has an external crystal, so to keep time, let's define
it for devicetree.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Message-Id: <20220427081914.6773-1-eagle.alexander923@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
All other msm8974 dts files are licensed as GPL-2.0 so add the same
header to the files where it's missing.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220421211936.345168-3-luca@z3ntu.xyz
Without '#power-domain-cells' property, power-domains cannot
be used. This property is noted required in the device-tree
binding.
Add '#power-domain-cells' as needed.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20220422120850.769480-6-herve.codina@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add reset control properties into MDIO nodes. The 4 MDIO controllers in
AST2600 SOC share one reset control bit SCU50[3].
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
The VBUS on usbotg is connected to the PMIC SWBST, let's reflect
that in the bindings.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch updates the PMIC voltages according to the module's
datasheet to match both commercial and industrial variants of the module.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
VGEN1, VGEN2 and GPO1 regulators are not used on SOM.
Let's remove these entries.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The LS1021A-IoT gateway reference design is a purpose-built,
small footprint hardware platform equipped with a wide array
of both high-speed connectivity and low speed serial interfaces.
CC: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Latest version of ti,tmp103 driver supports thermal zone. So make use of
it.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
X axis is not inverted in hardware.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Factor out common parts of vicut1 and vicutp to reduce maintenance
overhead.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The common base is now identical to imx6qdl-vicut1.dtsi, so we can remove
one of both.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit will finally make this file identical to imx6qdl-victgo.dtsi.
All nodes that are removed here are added as-is to the DTS files that
include this file.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These parts are common to imx6qdl-vicut1.dtsi.
This patch is preparation to unify victgo and vicut1 DTs.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Following changes was made:
- Add MDIO signal names
- Add missing ISB_IN2 name. Also correct ISB_nIN1. These two signals were used
together in older HW revisions. Later ISB_IN2 was removed. Software should
still be able to use both.
- Add missing CAN1 and UART line names
- Add missing ON1/2_CTRL line names
- fix CPU_* line names. The real signal names are without the CPU_ prefix, like
on imx6qdl-vicut1.dtsi
- Fix ETH_INT signal name
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Only the prototype had the SATA interface. There are no existing products
with SATA interface and no plans to add any.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The function of DISP0_DAT9 is dependent on hardware revision of two
particular variants. This setting should be done by the bootloader anyway,
and is not needed in the kernel, so remove it from the DT.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add some missing names and remove names to pins that have never been used
and/or are not present on any hardware.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
While there are LEDs connected on some variants on GPIO4 pins 16 and 17,
those are not the debug LEDs that should be visible to user-space.
It should be the same as in imx6dl-victgo.dtsi.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The names should be consistent with the names in imx6dl-victgo.dts
This patch is preparation to unify vicut1 and victgo DTs.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Only first prototype had UART2 and there are no plans to add it in the
future.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Only the very first prototypes had PCIe and there are no plant to add it
in the future.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Unify nON_SWITCH pinctrl configuration with imx6dl-victgo.dts.
This patch is a preparation to reduce duplicated code between vicut1 and
victgo.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Only the first prototypes had a TiWi module. There is no publicly available
hardware where this module is fitted and there are no plan to produce
any.
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The correct spelling for the property is gpios. Otherwise, the regulator
will neither reserve nor control any GPIOs. Thus, any SD/MMC card which
can use UHS-I modes will fail.
Fixes: c2e4987e0e ("ARM: dts: imx6ull: add Toradex Colibri iMX6ULL support")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add dts for ARMv7 based broadband SoC BCM47622. bcm47622.dtsi is the
SoC description dts header and bcm947622.dts is a simple dts file for
Broadcom BCM947622 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Vendor prefix in compatible should be lower-case and the jedec,spi-nor
should be used as fallback, according to the bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220420090247.73410-2-krzysztof.kozlowski@linaro.org
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20220420090247.73410-1-krzysztof.kozlowski@linaro.org
1. Several DT schema related changes to make DTBs passing schema checks:
EHCI/OHCI/DMA/Ethernet node names, DMA channels order, USB-like
compatibles.
2. Add specific compatibles to Multi Core Timer to allow stricter DT
schema matching.
3. Cleanup from deprecated bindings:
- Remove deprecated unit-address workaround for Exynos5422 Odroid XU3
LPDDR3 memory timings.
- Do not use unit-address (and SFR region) in Exynos5250 MIPI phy in
favor of syscon node (unit-address deprecated in 2016).
- Use standard generic PHYs for EHCI/OHCI device in S5PV210.
4. Fix inverted SPI CS (thus blank panel) on S5PV210 Aries boards.
5. Correct Bluetooth interupt name on S5PV210 Aries boards.
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Merge tag 'samsung-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.19
1. Several DT schema related changes to make DTBs passing schema checks:
EHCI/OHCI/DMA/Ethernet node names, DMA channels order, USB-like
compatibles.
2. Add specific compatibles to Multi Core Timer to allow stricter DT
schema matching.
3. Cleanup from deprecated bindings:
- Remove deprecated unit-address workaround for Exynos5422 Odroid XU3
LPDDR3 memory timings.
- Do not use unit-address (and SFR region) in Exynos5250 MIPI phy in
favor of syscon node (unit-address deprecated in 2016).
- Use standard generic PHYs for EHCI/OHCI device in S5PV210.
4. Fix inverted SPI CS (thus blank panel) on S5PV210 Aries boards.
5. Correct Bluetooth interupt name on S5PV210 Aries boards.
* tag 'samsung-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5pv210: align DMA channels with dtschema
ARM: dts: s5pv210: Adjust DMA node names to match spec
ARM: dts: s5pv210: Adjust memory reg entries to match spec
ARM: dts: s5pv210: Correct interrupt name for bluetooth in Aries
ARM: dts: s5pv210: Remove spi-cs-high on panel in Aries
ARM: dts: s5pv210: Use standard arrays of generic PHYs for EHCI/OHCI device
ARM: dts: s5pv210: align EHCI/OHCI nodes with dtschema
ARM: dts: exynos: align EHCI/OHCI nodes with dtschema on Exynos4
ARM: dts: exynos: drop deprecated SFR region from MIPI phy
ARM: dts: exynos: add a specific compatible to MCT
ARM: dts: exynos: remove deprecated unit address for LPDDR3 timings on Odroid
ARM: dts: exynos: fix compatible strings for Ethernet USB devices
ARM: dts: exynos: fix ethernet node name for different odroid boards
Link: https://lore.kernel.org/r/20220420072152.11696-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Few regression fixes for omap variants. These mostly fix issues related to
warnings added for system suspend, and some devicetree issues:
- Make ti-sysc driver quirks for gpt12 timer omap3 specific to fix
timer clock disabling for am335x system suspend
- Fix new system suspend warning for dra7 vpe caused by trying to
use register bits not wired for vpe
- Fix mmc boot order for omap3-gta04 that has no mmc2 or 3 wired
- Add missing touchscreen properties for am3
- Fix pin muxing for logicpd-som-lv and am3517-evm to not depend on
earlier bootloader versions
- Fix refcount leak for omap_gic_of_init
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Merge tag 'omap-for-v5.18/fixes-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps
Few regression fixes for omap variants. These mostly fix issues related to
warnings added for system suspend, and some devicetree issues:
- Make ti-sysc driver quirks for gpt12 timer omap3 specific to fix
timer clock disabling for am335x system suspend
- Fix new system suspend warning for dra7 vpe caused by trying to
use register bits not wired for vpe
- Fix mmc boot order for omap3-gta04 that has no mmc2 or 3 wired
- Add missing touchscreen properties for am3
- Fix pin muxing for logicpd-som-lv and am3517-evm to not depend on
earlier bootloader versions
- Fix refcount leak for omap_gic_of_init
* tag 'omap-for-v5.18/fixes-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: logicpd-som-lv: Fix wrong pinmuxing on OMAP35
ARM: dts: am3517-evm: Fix misc pinmuxing
ARM: dts: am33xx-l4: Add missing touchscreen clock properties
ARM: dts: Fix mmc order for omap3-gta04
ARM: dts: dra7: Fix suspend warning for vpe powerdomain
bus: ti-sysc: Make omap3 gpt12 quirk handling SoC specific
ARM: OMAP2+: Fix refcount leak in omap_gic_of_init
iommu/omap: Fix regression in probe for NULL pointer dereference
Link: https://lore.kernel.org/r/pull-1650543308-836725@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Update the max MPU voltage range to align with the maximum
possible value allowed in the operating-points table, which is max
target voltage of 132500 uV + 2%.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Message-Id: <20220419143923.25196-1-yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* assign name to gpio line
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Message-Id: <20220325100613.1494-15-Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* Add support for uart2 port
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Message-Id: <20220325100613.1494-12-Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* Update default brightness and dimming frequency
* Enable current sink, while initialization
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Message-Id: <20220325100613.1494-11-Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* Add port to the node lcdc
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Message-Id: <20220325100613.1494-10-Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* update life led label and pin number
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Message-Id: <20220325100613.1494-7-Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* Disabling poweroff support form RTC will allow poweroff
to handle from other machanism
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Message-Id: <20220325100613.1494-5-Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* Update partition table to save env and splash image
* GPMC config values optimized for Bosch Guardian Board
* NAND Chip used by Bosch Guardian Board is Micron MT29F4G08ABBFA
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Message-Id: <20220325100613.1494-2-Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Move some pinmux references to their respective peripherals.
This keeps the pins in safe-mode until they are requested.
Signed-off-by: Adam Ford <aford173@gmail.com>
Message-Id: <20220303171818.11060-2-aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The node name of Ethernet controller should be "ethernet" instead of
"usbether" as required by Ethernet controller devicetree schema:
Documentation/devicetree/bindings/net/ethernet-controller.yaml
This patch can potentially affect boot loaders patching against full
node path instead of using device aliases.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Message-Id: <20220216074927.3619425-8-o.rempel@pengutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Clean up and commonize (where possible and it makes sense to) I2C, UART
and SDHCI nodes and pin configurations.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-20-konrad.dybcio@somainline.org
- Remove regulators from the SoC DTSI
- cpu_pmu{} -> pmu{}
- move modem/iris regulators out of here; only FP2 used them
- tcsr_mutex is moved out of /soc
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Rebased on top of Krzysztof's fixes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-18-konrad.dybcio@somainline.org
Add the 'pro' part to the filenames of DTs of devices that are based on
this SoC to make in easier to differentiate between Snapdragon 800- and
801-based platforms.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-16-konrad.dybcio@somainline.org
Use &labels to align with the style used in new DTS and apply tiny
style fixes.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Rebased ontop of Krzysztof's fixes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-14-konrad.dybcio@somainline.org
Sony Xperia Z1 and Z1 compact are almost identical, and that shows in
their DTs. Commonize the repeating parts and modernize the DTs to use
labels.
As a bonus, Z1C gains touchscreen support in this commit, as it was
present on Z1 already.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Rebased on top of Krzysztof's fixes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-13-konrad.dybcio@somainline.org
Use &labels to align with the style used in new DTS and apply tiny
style fixes.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Rebased on top of Krzysztof's fixes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-12-konrad.dybcio@somainline.org
Use &labels to align with the style used in new DTS and apply tiny
style fixes.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Rebased on top of Krzysztof's fixes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-11-konrad.dybcio@somainline.org
Use &labels to align with the style used in new DTS and apply tiny
style fixes.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Rebased on top of Krzysztof underscore fixes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-10-konrad.dybcio@somainline.org
Use &labels to align with the style used in new DTS and apply tiny
style fixes.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Rebased ontop of Krzysztof's underscore fixes]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-9-konrad.dybcio@somainline.org
- Add missing labels (and remove their redefinition from klte)
- Commonize bus-width
- Add non-removable on sdhc_1, as it's supposed to have an eMMC on it
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-7-konrad.dybcio@somainline.org
Fix up formatting, move status=disabled to the end where it belongs,
rename DSI PHY label to match newer DTs, use tabs where possible,
unwrap lines where wrapping is not necessary and don't disable mdp,
as MDSS is useless without it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-6-konrad.dybcio@somainline.org
It's either uart10, or blsp2_uart4, not blsp2_uart10, as there aren't 10
UARTs on BLSP2. Fix the naming to align with what's done in arm64/qcom.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-4-konrad.dybcio@somainline.org
SONY phones/tables are based on a common board ('platform'). Devices
based on the same are often close to identical. Mention their association
in filenames, like it's done in arm64 DTs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-2-konrad.dybcio@somainline.org
The GPIO line name ETHCLK is not aligned with the other signals like
WIFI_CLK. Recently this has been fixed in the vendor tree, so upstream
this change.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The convention to name not connected GPIOs with NC has never been
adapted. Also newer Raspberry Pi boards like RPi 4 never did. So fix
this inconsistency by removing all of the NC names.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Recently this has been fixed in the vendor tree, so upstream this.
Fixes: 731b26a6ac ("ARM: bcm2835: Add names for the Raspberry Pi GPIO lines")
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The red LED on the Raspberry Pi 3 B Plus is the power LED.
So fix the GPIO line name accordingly.
Fixes: 71c0cd2283 ("ARM: dts: bcm2837: Add Raspberry Pi 3 B+")
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The GPIOs 46 & 47 are already used for a I2C interface to a SMPS.
So fix the GPIO line names accordingly.
Fixes: a54fe8a6cf ("ARM: dts: add Raspberry Pi Compute Module 3 and IO board")
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The GPIOs 30 to 39 are connected to the Cypress CYW43438 (Wifi/BT).
So fix the GPIO line names accordingly.
Fixes: 2c7c040c73 ("ARM: dts: bcm2835: Add Raspberry Pi Zero W")
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The clock controller of RPMH RSC does not have 'reg' property, so should
not have unit address.
Fixes: bae2f5979c ("ARM: dts: qcom: Add SDX65 platform and MTP board support")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411085935.130072-2-krzysztof.kozlowski@linaro.org
Enables the support of RTC on stm32mp135f-dk board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Per KSZ9031RNX PHY datasheet FIGURE 7-5: POWER-UP/POWER-DOWN/RESET TIMING
Note 2: After the de-assertion of reset, wait a minimum of 100 μs before
starting programming on the MIIM (MDC/MDIO) interface.
Add 1ms post-reset delay to guarantee this figure.
Fixes: 010ca9fe50 ("ARM: dts: stm32: Add missing ethernet PHY reset on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The recent addition pinctrl.yaml in commit c09acbc499 ("dt-bindings:
pinctrl: use pinctrl.yaml") resulted in some node name warnings.
Fix the node names to the preferred 'pinctrl'.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The recent addition pinctrl.yaml in commit c09acbc499 ("dt-bindings:
pinctrl: use pinctrl.yaml") resulted in some node name warnings.
Fix the node names to the preferred 'pinctrl'.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
"make dtbs_check":
arch/arm/boot/dts/r9a06g032-rzn1d400-db.dt.yaml: timer: compatible: 'oneOf' conditional failed, one must be fixed:
['arm,cortex-a7-timer', 'arm,armv7-timer'] is too long
'arm,cortex-a7-timer' is not one of ['arm,cortex-a15-timer']
'arm,cortex-a7-timer' is not one of ['arm,armv7-timer']
'arm,cortex-a7-timer' is not one of ['arm,armv8-timer']
From schema: Documentation/devicetree/bindings/timer/arm,arch_timer.yaml
The Cortex-A7 timer should just declare compatibility with
"arm,armv7-timer".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a8e0cf00a983b4c539cdb1cfad5cc6b10b423c5b.1649680220.git.geert+renesas@glider.be
Add support for Toradex Aster, small form-factor with header compatible
with Arduino Uno and Raspberry Pi (RPi) maker boards.
Additional detail available at
https://www.toradex.com/products/carrier-boards/aster-carrier-board
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm
Computer Module family Carrier Board.
Additional details available at
https://www.toradex.com/products/carrier-board/iris-carrier-board
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Toradex board Iris V2 has a SD-card slot with switchable
power.
Add a pinctrl sleep used when the card power is off to avoid
backfeeding to the card and add the "sleep" pinctrl to the
usdhc1 controller.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- Sort pinctrl nodes alphabetically
- End all pinctrl node names in grp and avoid using dashes
- Change pinctrl_usbc_id_1's node name to not use underscores
- Change the pmic's node name to pmic@8 per binding requirement
- Add sound-dai-cells to the codec node per binding requirement
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following two nodes define module level functionality, move
them from the carrier board dts file to the SoM file.
While at it, reorder the properties in the gpio-keys node alphabetical.
- gpio-keys defining the wakeup pin
- memory node
The atmel touchscreen node can be used on any carrier board.
Move it from the carrier board to the module-level device tree and
keep it disabled.
Set the default pinmuxing to the dedicated connector available
on newer carrier boards and rename the pinctrl labels specifying
the INT/Reset signal to a common pattern.
pinctrl_atmel_conn - uses 107/106 pins as used on dedicated connector
pinctrl_atmel_adap - uses 28/30 pins as used with jumper wires
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Toradex board Iris V2 has an LVDS transceiver which is
configured with 4 signals. Add corresponding pins into the
separate pingroup to be able to manage the transceiver.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Colibri iMX6 HW doesn't allow to use the PWR_ON_REQ signal for
poweroff. Use the fsl,pmic-stby-poweroff property to command the PMIC
into a low power mode in poweroff.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Toradex Colibri family is composed of SoM that can be plugged in
various carrier board, with carrier boards allowing multiple optional
add-on (e.g. display, camera, ...).
Keep all the SoM specific part into the module .dtsi, disabling
everything that is not self-contained on the board. The carrier board
dts can reuse/enable anything that is defined in the module dtsi.
Additional device tree overlays can be used for any accessories that
are plugged in the carrier board.
Disable parallel RGB:
The parallel RGB interface (lcd_display) and all related nodes can
be enabled in an overlay if used. Keep all nodes disabled in the
module-level device tree.
Rename display interface node to match imx6qdl-apalis
to make it easier to use overlays.
The pwm-backlight binding now requires the power-supply property,
add it.
Disable stmpe touchscreen:
The touchscreen can be enabled in an overlay if used.
Add labels to the stmpe sub nodes.
Disable hdmi interface:
HDMI can be enabled in an overlay if used.
Update SPDX-License spelling to latest convention.
Update Copyright year.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add GPIO line names on module level. Those are all GPIOs which a user
might use on his custom carrier board. If more meaningful names are
available on the carrier board, the user can overwrite the line names
in the carrier board level device tree.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix names of extra pingroup node and property for gpio bus recovery.
Without the change i2c2 is not functional.
Fixes: 56f0df6b6b ("ARM: dts: imx*(colibri|apalis): add missing recovery modes to i2c")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Drop Colibri V1.1 device tree, this is just a duplicate of Colibri V1.0
with the possibility to use SD cards in UHS mode if the carrier board
does not have 3.3V pull up resistor.
The dedicated device tree kept the feature switched of by setting
the no-1-8-v property and thus does not offer anything different
than what the regular device tree does.
Thus drop the dedicated device tree and merge the preparation to
allow enabling the feature should a carrier without pull ups
be used into the regular device tree.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Disable gmac0 which is not connected to any switch MAC. Enable port@8 of
the Broadcom switch which is connected to gmac2.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20220407143027.294678-1-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.
It may have been intended that 0 values are false, but there is no change
in behavior with this patch.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org
Link: https://lore.kernel.org/r/20220407225107.2175958-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds the PN544 NFC chip mounted on some of the Codina models
numbered GT-I8160P. The "P" at the end of the product number
indicates that an NFC chip is mounted.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pinout of the OMAP35 and DM37 variants of the SOM-LV are the
same, but the macros which define the pinmuxing are different
between OMAP3530 and DM3730. The pinmuxing was correct for
for the DM3730, but wrong for the OMAP3530. Since the boot loader
was correctly pin-muxing the pins, this was not obvious. As the
bootloader not guaranteed to pinmux all the pins any more, this
causes an issue, so the pinmux needs to be moved from a common
file to their respective board files.
Fixes: f8a2e3ff71 ("ARM: dts: Add minimal support for LogicPD OMAP35xx SOM-LV devkit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Message-Id: <20220303171818.11060-1-aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The bootloader for the AM3517 has previously done much of the pin
muxing, but as the bootloader is moving more and more to a model
based on the device tree, it may no longer automatically mux the
pins, so it is necessary to add the pinmuxing to the Linux device
trees so the respective peripherals can remain functional.
Fixes: 6ed1d79975 ("ARM: dts: am3517-evm: Add support for UI board and Audio")
Signed-off-by: Adam Ford <aford173@gmail.com>
Message-Id: <20220226214820.747847-1-aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When adding support for TI magadc (Magnetic Stripe Reader and ADC), the
MFD driver common to the touchscreen and the ADC got updated to ease the
insertion of a new DT node for the ADC, with its own compatible, clocks,
etc. Commit 235a96e92c ("mfd: ti_am335x_tscadc: Don't search the tree
for our clock") removed one compatible specific information which was
the clock name, because the clock was looked up from scratch in the DT
while this hardware block was only fed by a single clock, already
defined and properly filled in the DT.
Problem is, this change was only validated with an am437x-based board,
where the clocks are effectively correctly defined and referenced. But
on am33xx, the ADC clock is also correctly defined but is not referenced
with a clock phandle as it ought to be.
The touchscreen bindings clearly state that the clocks/clock-names
properties are mandatory, but they have been forgotten in one DTSI. This
was probably not noticed in the first place because of the clock
actually existing and the clk_get() call going through all the tree
anyway.
Add the missing clock phandles in the am33xx touchscreen description.
Reported-by: H. Nikolaus Schaller <hns@goldelico.com>
Fixes: 235a96e92c ("mfd: ti_am335x_tscadc: Don't search the tree for our clock")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Message-Id: <20220314163445.79807-1-miquel.raynal@bootlin.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit a1ebdb3741 ("ARM: dts: Fix swapped mmc order for omap3")
introduces general mmc aliases. Let's tailor them to the need
of the GTA04 board which does not make use of mmc2 and mmc3 interfaces.
Fixes: a1ebdb3741 ("ARM: dts: Fix swapped mmc order for omap3")
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Message-Id: <dc9173ee3d391d9e92b7ab8ed4f84b29f0a21c83.1646744420.git.hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit bf781869e5 ("ARM: dts: at91: add pinctrl-{names, 0} for all
gpios") introduces pinctrl phandles for pins used by individual
controllers to avoid failures due to commit 2ab73c6d83 ("gpio:
Support GPIO controllers without pin-ranges"). For SPI controllers
available on SAMA5D4 and SAMA5D3 some of the pins are defined in
SoC specific dtsi on behalf of pinctrl-0. Adding extra pinctrl phandles
on board specific dts also on behalf of pinctrl-0 overwrite the pinctrl-0
phandle specified in SoC specific dtsi. Thus add the board specific
pinctrl to pinctrl-1.
Fixes: bf781869e5 ("ARM: dts: at91: add pinctrl-{names, 0} for all gpios")
Depends-on: 5c8b498529 ("ARM: dts: at91: sama5d4_xplained: fix pinctrl phandle name")
Reported-by: Ajay Kathat <ajay.kathat@microchip.com>
Co-developed-by: Ajay Kathat <ajay.kathat@microchip.com>
Signed-off-by: Ajay Kathat <ajay.kathat@microchip.com>
Tested-by: Ajay Kathat <ajay.kathat@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220331141323.194355-2-claudiu.beznea@microchip.com
The at91sam9g20ek has no software controllable regulators, only some fixed
discrete regulators, but they are there and currently the wm8731 driver
does try to use them. Show the supplies in the DT and map them for the
wm8731 so things start up cleanly.
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220404102806.581374-3-broonie@kernel.org
