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ARM: dts: Group omap3 CM_CLKSEL_DSS clocks
The clksel related registers on omap3 cause unique_unit_address and node_name_chars_strict warnings with the W=1 or W=2 make flags enabled. With the clock drivers updated, we can now avoid most of these warnings by grouping the TI component clocks using the TI clksel binding, and with the use of clock-output-names property to avoid non-standard node names for the clocks. Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -393,14 +393,31 @@
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};
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dpll4_m3_ck: dpll4_m3_ck@e40 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&dpll4_ck>;
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ti,bit-shift = <8>;
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ti,max-div = <32>;
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reg = <0x0e40>;
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ti,index-starts-at-one;
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/* CM_CLKSEL_DSS */
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clock@e40 {
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compatible = "ti,clksel";
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reg = <0xe40>;
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#clock-cells = <2>;
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#address-cells = <0>;
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dpll4_m3_ck: clock-dpll4-m3 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clock-output-names = "dpll4_m3_ck";
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clocks = <&dpll4_ck>;
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ti,bit-shift = <8>;
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ti,max-div = <32>;
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ti,index-starts-at-one;
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};
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dpll4_m4_ck: clock-dpll4-m4 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clock-output-names = "dpll4_m4_ck";
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clocks = <&dpll4_ck>;
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ti,max-div = <16>;
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ti,index-starts-at-one;
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};
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};
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dpll4_m3x2_mul_ck: dpll4_m3x2_mul_ck {
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@ -436,15 +453,6 @@
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clock-div = <4>;
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};
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dpll4_m4_ck: dpll4_m4_ck@e40 {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&dpll4_ck>;
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ti,max-div = <16>;
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reg = <0x0e40>;
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ti,index-starts-at-one;
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};
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dpll4_m4x2_mul_ck: dpll4_m4x2_mul_ck {
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#clock-cells = <0>;
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compatible = "ti,fixed-factor-clock";
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