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include the mips force nommad patch

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Sylvestre Ledru 2020-10-31 15:05:15 +01:00
parent 9c020b749c
commit fbab848540
1 changed files with 92 additions and 0 deletions
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92
debian/patches/mips-force-nomadd4.diff vendored Normal file
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@ -0,0 +1,92 @@
The MIPS port aims to support the Loongson 3 family of CPUs in addition
of the other MIPS CPUs. On the Loongson 3 family the MADD4 instructions
are fused, while they are not fused on the other MIPS CPUs. In order to
support both, we have to disabled those instructions.
For that, the patch below basically corresponds to the --with-madd4=no
used on the GCC side.
Index: llvm-toolchain-11-11.0.0/clang/lib/Basic/Targets/Mips.h
===================================================================
--- llvm-toolchain-11-11.0.0.orig/clang/lib/Basic/Targets/Mips.h
+++ llvm-toolchain-11-11.0.0/clang/lib/Basic/Targets/Mips.h
@@ -332,6 +332,8 @@ public:
HasMSA = true;
else if (Feature == "+nomadd4")
DisableMadd4 = true;
+ else if (Feature == "-nomadd4")
+ DisableMadd4 = false;
else if (Feature == "+fp64")
FPMode = FP64;
else if (Feature == "-fp64")
Index: llvm-toolchain-11-11.0.0/llvm/lib/Target/Mips/MipsSubtarget.cpp
===================================================================
--- llvm-toolchain-11-11.0.0.orig/llvm/lib/Target/Mips/MipsSubtarget.cpp
+++ llvm-toolchain-11-11.0.0/llvm/lib/Target/Mips/MipsSubtarget.cpp
@@ -79,7 +79,7 @@ MipsSubtarget::MipsSubtarget(const Tripl
InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
InMicroMipsMode(false), HasDSP(false), HasDSPR2(false), HasDSPR3(false),
AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
- UseTCCInDIV(false), HasSym32(false), HasEVA(false), DisableMadd4(false),
+ UseTCCInDIV(false), HasSym32(false), HasEVA(false), DisableMadd4(true),
HasMT(false), HasCRC(false), HasVirt(false), HasGINV(false),
UseIndirectJumpsHazard(false), StackAlignOverride(StackAlignOverride),
TM(TM), TargetTriple(TT), TSInfo(),
@@ -91,6 +91,9 @@ MipsSubtarget::MipsSubtarget(const Tripl
if (MipsArchVersion == MipsDefault)
MipsArchVersion = Mips32;
+ if (hasMips32r6() || hasMips64r6())
+ DisableMadd4 = false;
+
// Don't even attempt to generate code for MIPS-I and MIPS-V. They have not
// been tested and currently exist for the integrated assembler only.
if (MipsArchVersion == Mips1)
@@ -238,6 +241,7 @@ MipsSubtarget &
MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS,
const TargetMachine &TM) {
StringRef CPUName = MIPS_MC::selectMipsCPU(TM.getTargetTriple(), CPU);
+ SubtargetFeatures Features(FS);
// Parse features string.
ParseSubtargetFeatures(CPUName, FS);
@@ -260,6 +264,13 @@ MipsSubtarget::initializeSubtargetDepend
report_fatal_error("64-bit code requested on a subtarget that doesn't "
"support it!");
+ for (const std::string &Feature : Features.getFeatures()) {
+ if (Feature == "+nomadd4")
+ DisableMadd4 = true;
+ else if (Feature == "-nomadd4")
+ DisableMadd4 = false;
+ }
+
return *this;
}
Index: llvm-toolchain-11-11.0.0/llvm/lib/Target/Mips/Mips.td
===================================================================
--- llvm-toolchain-11-11.0.0.orig/llvm/lib/Target/Mips/Mips.td
+++ llvm-toolchain-11-11.0.0/llvm/lib/Target/Mips/Mips.td
@@ -191,7 +191,7 @@ def FeatureUseTCCInDIV : SubtargetFeatur
"UseTCCInDIV", "false",
"Force the assembler to use trapping">;
-def FeatureMadd4
+def FeatureNoMadd4
: SubtargetFeature<"nomadd4", "DisableMadd4", "true",
"Disable 4-operand madd.fmt and related instructions">;
Index: llvm-toolchain-11-11.0.0/llvm/lib/Target/Mips/MipsInstrInfo.td
===================================================================
--- llvm-toolchain-11-11.0.0.orig/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ llvm-toolchain-11-11.0.0/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -242,7 +242,7 @@ def HasEVA : Predicate<"Subtarg
def HasMSA : Predicate<"Subtarget->hasMSA()">,
AssemblerPredicate<(all_of FeatureMSA)>;
def HasMadd4 : Predicate<"!Subtarget->disableMadd4()">,
- AssemblerPredicate<(all_of (not FeatureMadd4))>;
+ AssemblerPredicate<(all_of (not FeatureNoMadd4))>;
def HasMT : Predicate<"Subtarget->hasMT()">,
AssemblerPredicate<(all_of FeatureMT)>;
def UseIndirectJumpsHazard : Predicate<"Subtarget->useIndirectJumpsHazard()">,