mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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non-drm: rust: - make ETIMEDOUT available - add size constants up to SZ_2G - add DMA coherent allocation bindings mtd: - driver for Intel GPU non-volatile storage i2c - designware quirk for Intel xe core: - atomic helpers: tune enable/disable sequences - add task info to wedge API - refactor EDID quirks - connector: move HDR sink to drm_display_info - fourcc: half-float and 32-bit float formats - mode_config: pass format info to simplify dma-buf: - heaps: Give CMA heap a stable name ci: - add device tree validation and kunit displayport: - change AUX DPCD access probe address - add quirk for DPCD probe - add panel replay definitions - backlight control helpers fbdev: - make CONFIG_FIRMWARE_EDID available on all arches fence: - fix UAF issues format-helper: - improve tests gpusvm: - introduce devmem only flag for allocation - add timeslicing support to GPU SVM ttm: - improve eviction sched: - tracing improvements - kunit improvements - memory leak fixes - reset handling improvements color mgmt: - add hardware gamma LUT handling helpers bridge: - add destroy hook - switch to reference counted drm_bridge allocations - tc358767: convert to devm_drm_bridge_alloc - improve CEC handling panel: - switch to reference counter drm_panel allocations - fwnode panel lookup - Huiling hl055fhv028c support - Raspberry Pi 7" 720x1280 support - edp: KDC KD116N3730A05, N160JCE-ELL CMN, N116BCJ-EAK - simple: AUO P238HAN01 - st7701: Winstar wf40eswaa6mnn0 - visionox: rm69299-shift - Renesas R61307, Renesas R69328 support - DJN HX83112B hdmi: - add CEC handling - YUV420 output support xe: - WildCat Lake support - Enable PanthorLake by default - mark BMG as SRIOV capable - update firmware recommendations - Expose media OA units - aux-bux support for non-volatile memory - MTD intel-dg driver for non-volatile memory - Expose fan control and voltage regulator in sysfs - restructure migration for multi-device - Restore GuC submit UAF fix - make GEM shrinker drm managed - SRIOV VF Post-migration recovery of GGTT nodes - W/A additions/reworks - Prefetch support for svm ranges - Don't allocate managed BO for each policy change - HWMON fixes for BMG - Create LRC BO without VM - PCI ID updates - make SLPC debugfs files optional - rework eviction rejection of bound external BOs - consolidate PAT programming logic for pre/post Xe2 - init changes for flicker-free boot - Enable GuC Dynamic Inhibit Context switch i915: - drm_panic support for i915/xe - initial flip queue off by default for LNL/PNL - Wildcat Lake Display support - Support for DSC fractional link bpp - Support for simultaneous Panel Replay and Adaptive sync - Support for PTL+ double buffer LUT - initial PIPEDMC event handling - drm_panel_follower support - DPLL interface renames - allocate struct intel_display dynamically - flip queue preperation - abstract DRAM detection better - avoid GuC scheduling stalls - remove DG1 force probe requirement - fix MEI interrupt handler on RT kernels - use backlight control helpers for eDP - more shared display code refactoring amdgpu: - add userq slot to INFO ioctl - SR-IOV hibernation support - Suspend improvements - Backlight improvements - Use scaling for non-native eDP modes - cleaner shader updates for GC 9.x - Remove fence slab - SDMA fw checks for userq support - RAS updates - DMCUB updates - DP tunneling fixes - Display idle D3 support - Per queue reset improvements - initial smartmux support amdkfd: - enable KFD on loongarch - mtype fix for ext coherent system memory radeon: - CS validation additional GL extensions - drop console lock during suspend/resume - bump driver version msm: - VM BIND support - CI: infrastructure updates - UBWC single source of truth - decouple GPU and KMS support - DP: rework I/O accessors - DPU: SM8750 support - DSI: SM8750 support - GPU: X1-45 support and speedbin support for X1-85 - MDSS: SM8750 support nova: - register! macro improvements - DMA object abstraction - VBIOS parser + fwsec lookup - sysmem flush page support - falcon: generic falcon boot code and HAL - FWSEC-FRTS: fb setup and load/execute ivpu: - Add Wildcat Lake support - Add turbo flag ast: - improve hardware generations implementation imx: - IMX8qxq Display Controller support lima: - Rockchip RK3528 GPU support nouveau: - fence handling cleanup panfrost: - MT8370 support - bo labeling - 64-bit register access qaic: - add RAS support rockchip: - convert inno_hdmi to a bridge rz-du: - add RZ/V2H(P) support - MIPI-DSI DCS support sitronix: - ST7567 support sun4i: - add H616 support tidss: - add TI AM62L support - AM65x OLDI bridge support bochs: - drm panic support vkms: - YUV and R* format support - use faux device vmwgfx: - fence improvements hyperv: - move out of simple - add drm_panic support -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmiJM/0ACgkQDHTzWXnE hr6MpA/+JJKGdSdrE95QkaMcOZh/3e3areGXZ0V/RrrJXdB4/DoAfQSHhF0H7m7y MhBGVLGNMXq7KHrz28p1MjLHrE1mwmvJ6hZ4J076ed4u9naoCD0m6k5w5wiue+KL HyPR54ADxN0BYmgV0l/B0wj42KsHyTO4x4hdqPJu02V9Dtmx6FCh2ujkOF3p9nbK GMwWDttl4KEKljD0IvQ9YIYJ66crYGx/XmZi7JoWRrS104K/h1u8qZuXBp5jVKTy OZRAVyLdmJqdTOLH7l599MBBcEd/bNV37/LVwF4T5iFunEKOAiyN0QY0OR+IeRVh ZfOv2/gp4UNyIfyahQ7LKLgEilNPGHoPitvDJPvBZxW2UjwXVNvA1QfdK5DAlVRS D5NoFRjlFFCz8/c2hQwlKJ9o7eVgH3/pK0mwR7SPGQTuqzLFCrAfCuzUvg/gV++6 JFqmGKMHeCoxO2o4GMrwjFttStP41usxtV/D+grcbPteNO9UyKJS4C38n4eamJXM a9Sy9APuAb6F0w5+yMItEF7TQifgmhIbm5AZHlxE1KoDQV6TdiIf1Gou5LeDGoL6 OACbXHJPL52tUnfCRpbfI4tE/IVyYsfL01JnvZ5cZZWItXfcIz76ykJri+E0G60g yRl/zkimHKO4B0l/HSzal5xROXr+3VzeWehEiz/ot1VriP5OesA= =n9MO -----END PGP SIGNATURE----- Merge tag 'drm-next-2025-07-30' of https://gitlab.freedesktop.org/drm/kernel Pull drm updates from Dave Airlie: "Highlights: - Intel xe enable Panthor Lake, started adding WildCat Lake - amdgpu has a bunch of reset improvments along with the usual IP updates - msm got VM_BIND support which is important for vulkan sparse memory - more drm_panic users - gpusvm common code to handle a bunch of core SVM work outside drivers. Detail summary: Changes outside drm subdirectory: - 'shrink_shmem_memory()' for better shmem/hibernate interaction - Rust support infrastructure: - make ETIMEDOUT available - add size constants up to SZ_2G - add DMA coherent allocation bindings - mtd driver for Intel GPU non-volatile storage - i2c designware quirk for Intel xe core: - atomic helpers: tune enable/disable sequences - add task info to wedge API - refactor EDID quirks - connector: move HDR sink to drm_display_info - fourcc: half-float and 32-bit float formats - mode_config: pass format info to simplify dma-buf: - heaps: Give CMA heap a stable name ci: - add device tree validation and kunit displayport: - change AUX DPCD access probe address - add quirk for DPCD probe - add panel replay definitions - backlight control helpers fbdev: - make CONFIG_FIRMWARE_EDID available on all arches fence: - fix UAF issues format-helper: - improve tests gpusvm: - introduce devmem only flag for allocation - add timeslicing support to GPU SVM ttm: - improve eviction sched: - tracing improvements - kunit improvements - memory leak fixes - reset handling improvements color mgmt: - add hardware gamma LUT handling helpers bridge: - add destroy hook - switch to reference counted drm_bridge allocations - tc358767: convert to devm_drm_bridge_alloc - improve CEC handling panel: - switch to reference counter drm_panel allocations - fwnode panel lookup - Huiling hl055fhv028c support - Raspberry Pi 7" 720x1280 support - edp: KDC KD116N3730A05, N160JCE-ELL CMN, N116BCJ-EAK - simple: AUO P238HAN01 - st7701: Winstar wf40eswaa6mnn0 - visionox: rm69299-shift - Renesas R61307, Renesas R69328 support - DJN HX83112B hdmi: - add CEC handling - YUV420 output support xe: - WildCat Lake support - Enable PanthorLake by default - mark BMG as SRIOV capable - update firmware recommendations - Expose media OA units - aux-bux support for non-volatile memory - MTD intel-dg driver for non-volatile memory - Expose fan control and voltage regulator in sysfs - restructure migration for multi-device - Restore GuC submit UAF fix - make GEM shrinker drm managed - SRIOV VF Post-migration recovery of GGTT nodes - W/A additions/reworks - Prefetch support for svm ranges - Don't allocate managed BO for each policy change - HWMON fixes for BMG - Create LRC BO without VM - PCI ID updates - make SLPC debugfs files optional - rework eviction rejection of bound external BOs - consolidate PAT programming logic for pre/post Xe2 - init changes for flicker-free boot - Enable GuC Dynamic Inhibit Context switch i915: - drm_panic support for i915/xe - initial flip queue off by default for LNL/PNL - Wildcat Lake Display support - Support for DSC fractional link bpp - Support for simultaneous Panel Replay and Adaptive sync - Support for PTL+ double buffer LUT - initial PIPEDMC event handling - drm_panel_follower support - DPLL interface renames - allocate struct intel_display dynamically - flip queue preperation - abstract DRAM detection better - avoid GuC scheduling stalls - remove DG1 force probe requirement - fix MEI interrupt handler on RT kernels - use backlight control helpers for eDP - more shared display code refactoring amdgpu: - add userq slot to INFO ioctl - SR-IOV hibernation support - Suspend improvements - Backlight improvements - Use scaling for non-native eDP modes - cleaner shader updates for GC 9.x - Remove fence slab - SDMA fw checks for userq support - RAS updates - DMCUB updates - DP tunneling fixes - Display idle D3 support - Per queue reset improvements - initial smartmux support amdkfd: - enable KFD on loongarch - mtype fix for ext coherent system memory radeon: - CS validation additional GL extensions - drop console lock during suspend/resume - bump driver version msm: - VM BIND support - CI: infrastructure updates - UBWC single source of truth - decouple GPU and KMS support - DP: rework I/O accessors - DPU: SM8750 support - DSI: SM8750 support - GPU: X1-45 support and speedbin support for X1-85 - MDSS: SM8750 support nova: - register! macro improvements - DMA object abstraction - VBIOS parser + fwsec lookup - sysmem flush page support - falcon: generic falcon boot code and HAL - FWSEC-FRTS: fb setup and load/execute ivpu: - Add Wildcat Lake support - Add turbo flag ast: - improve hardware generations implementation imx: - IMX8qxq Display Controller support lima: - Rockchip RK3528 GPU support nouveau: - fence handling cleanup panfrost: - MT8370 support - bo labeling - 64-bit register access qaic: - add RAS support rockchip: - convert inno_hdmi to a bridge rz-du: - add RZ/V2H(P) support - MIPI-DSI DCS support sitronix: - ST7567 support sun4i: - add H616 support tidss: - add TI AM62L support - AM65x OLDI bridge support bochs: - drm panic support vkms: - YUV and R* format support - use faux device vmwgfx: - fence improvements hyperv: - move out of simple - add drm_panic support" * tag 'drm-next-2025-07-30' of https://gitlab.freedesktop.org/drm/kernel: (1479 commits) drm/tidss: oldi: convert to devm_drm_bridge_alloc() API drm/tidss: encoder: convert to devm_drm_bridge_alloc() drm/amdgpu: move reset support type checks into the caller drm/amdgpu/sdma7: re-emit unprocessed state on ring reset drm/amdgpu/sdma6: re-emit unprocessed state on ring reset drm/amdgpu/sdma5.2: re-emit unprocessed state on ring reset drm/amdgpu/sdma5: re-emit unprocessed state on ring reset drm/amdgpu/gfx12: re-emit unprocessed state on ring reset drm/amdgpu/gfx11: re-emit unprocessed state on ring reset drm/amdgpu/gfx10: re-emit unprocessed state on ring reset drm/amdgpu/gfx9.4.3: re-emit unprocessed state on kcq reset drm/amdgpu/gfx9: re-emit unprocessed state on kcq reset drm/amdgpu: Add WARN_ON to the resource clear function drm/amd/pm: Use cached metrics data on SMUv13.0.6 drm/amd/pm: Use cached data for min/max clocks gpu: nova-core: fix bounds check in PmuLookupTableEntry::new drm/amdgpu: Replace HQD terminology with slots naming drm/amdgpu: Add user queue instance count in HW IP info drm/amd/amdgpu: Add helper functions for isp buffers drm/amd/amdgpu: Initialize swnode for ISP MFD device ...
623 lines
18 KiB
C
623 lines
18 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/completion.h>
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#include <drm/drm_print.h>
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#include <drm/gpu_scheduler.h>
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#include "sched_internal.h"
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#include "gpu_scheduler_trace.h"
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/**
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* drm_sched_entity_init - Init a context entity used by scheduler when
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* submit to HW ring.
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*
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* @entity: scheduler entity to init
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* @priority: priority of the entity
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* @sched_list: the list of drm scheds on which jobs from this
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* entity can be submitted
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* @num_sched_list: number of drm sched in sched_list
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* @guilty: atomic_t set to 1 when a job on this queue
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* is found to be guilty causing a timeout
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*
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* Note that the &sched_list must have at least one element to schedule the entity.
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*
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* For changing @priority later on at runtime see
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* drm_sched_entity_set_priority(). For changing the set of schedulers
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* @sched_list at runtime see drm_sched_entity_modify_sched().
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*
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* An entity is cleaned up by calling drm_sched_entity_fini(). See also
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* drm_sched_entity_destroy().
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*
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* Returns 0 on success or a negative error code on failure.
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*/
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int drm_sched_entity_init(struct drm_sched_entity *entity,
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enum drm_sched_priority priority,
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struct drm_gpu_scheduler **sched_list,
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unsigned int num_sched_list,
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atomic_t *guilty)
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{
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if (!(entity && sched_list && (num_sched_list == 0 || sched_list[0])))
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return -EINVAL;
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memset(entity, 0, sizeof(struct drm_sched_entity));
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INIT_LIST_HEAD(&entity->list);
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entity->rq = NULL;
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entity->guilty = guilty;
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entity->num_sched_list = num_sched_list;
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entity->priority = priority;
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/*
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* It's perfectly valid to initialize an entity without having a valid
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* scheduler attached. It's just not valid to use the scheduler before it
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* is initialized itself.
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*/
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entity->sched_list = num_sched_list > 1 ? sched_list : NULL;
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RCU_INIT_POINTER(entity->last_scheduled, NULL);
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RB_CLEAR_NODE(&entity->rb_tree_node);
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if (num_sched_list && !sched_list[0]->sched_rq) {
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/* Since every entry covered by num_sched_list
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* should be non-NULL and therefore we warn drivers
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* not to do this and to fix their DRM calling order.
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*/
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pr_warn("%s: called with uninitialized scheduler\n", __func__);
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} else if (num_sched_list) {
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/* The "priority" of an entity cannot exceed the number of run-queues of a
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* scheduler. Protect against num_rqs being 0, by converting to signed. Choose
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* the lowest priority available.
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*/
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if (entity->priority >= sched_list[0]->num_rqs) {
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dev_err(sched_list[0]->dev, "entity has out-of-bounds priority: %u. num_rqs: %u\n",
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entity->priority, sched_list[0]->num_rqs);
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entity->priority = max_t(s32, (s32) sched_list[0]->num_rqs - 1,
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(s32) DRM_SCHED_PRIORITY_KERNEL);
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}
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entity->rq = sched_list[0]->sched_rq[entity->priority];
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}
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init_completion(&entity->entity_idle);
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/* We start in an idle state. */
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complete_all(&entity->entity_idle);
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spin_lock_init(&entity->lock);
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spsc_queue_init(&entity->job_queue);
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atomic_set(&entity->fence_seq, 0);
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entity->fence_context = dma_fence_context_alloc(2);
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return 0;
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}
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EXPORT_SYMBOL(drm_sched_entity_init);
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/**
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* drm_sched_entity_modify_sched - Modify sched of an entity
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* @entity: scheduler entity to init
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* @sched_list: the list of new drm scheds which will replace
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* existing entity->sched_list
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* @num_sched_list: number of drm sched in sched_list
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*
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* Note that this must be called under the same common lock for @entity as
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* drm_sched_job_arm() and drm_sched_entity_push_job(), or the driver needs to
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* guarantee through some other means that this is never called while new jobs
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* can be pushed to @entity.
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*/
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void drm_sched_entity_modify_sched(struct drm_sched_entity *entity,
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struct drm_gpu_scheduler **sched_list,
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unsigned int num_sched_list)
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{
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WARN_ON(!num_sched_list || !sched_list);
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spin_lock(&entity->lock);
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entity->sched_list = sched_list;
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entity->num_sched_list = num_sched_list;
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spin_unlock(&entity->lock);
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}
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EXPORT_SYMBOL(drm_sched_entity_modify_sched);
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static bool drm_sched_entity_is_idle(struct drm_sched_entity *entity)
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{
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rmb(); /* for list_empty to work without lock */
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if (list_empty(&entity->list) ||
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spsc_queue_count(&entity->job_queue) == 0 ||
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entity->stopped)
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return true;
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return false;
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}
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/**
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* drm_sched_entity_error - return error of last scheduled job
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* @entity: scheduler entity to check
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*
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* Opportunistically return the error of the last scheduled job. Result can
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* change any time when new jobs are pushed to the hw.
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*/
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int drm_sched_entity_error(struct drm_sched_entity *entity)
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{
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struct dma_fence *fence;
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int r;
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rcu_read_lock();
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fence = rcu_dereference(entity->last_scheduled);
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r = fence ? fence->error : 0;
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rcu_read_unlock();
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return r;
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}
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EXPORT_SYMBOL(drm_sched_entity_error);
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static void drm_sched_entity_kill_jobs_work(struct work_struct *wrk)
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{
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struct drm_sched_job *job = container_of(wrk, typeof(*job), work);
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drm_sched_fence_scheduled(job->s_fence, NULL);
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drm_sched_fence_finished(job->s_fence, -ESRCH);
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WARN_ON(job->s_fence->parent);
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job->sched->ops->free_job(job);
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}
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/* Signal the scheduler finished fence when the entity in question is killed. */
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static void drm_sched_entity_kill_jobs_cb(struct dma_fence *f,
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struct dma_fence_cb *cb)
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{
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struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
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finish_cb);
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unsigned long index;
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dma_fence_put(f);
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/* Wait for all dependencies to avoid data corruptions */
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xa_for_each(&job->dependencies, index, f) {
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struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
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if (s_fence && f == &s_fence->scheduled) {
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/* The dependencies array had a reference on the scheduled
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* fence, and the finished fence refcount might have
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* dropped to zero. Use dma_fence_get_rcu() so we get
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* a NULL fence in that case.
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*/
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f = dma_fence_get_rcu(&s_fence->finished);
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/* Now that we have a reference on the finished fence,
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* we can release the reference the dependencies array
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* had on the scheduled fence.
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*/
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dma_fence_put(&s_fence->scheduled);
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}
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xa_erase(&job->dependencies, index);
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if (f && !dma_fence_add_callback(f, &job->finish_cb,
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drm_sched_entity_kill_jobs_cb))
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return;
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dma_fence_put(f);
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}
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INIT_WORK(&job->work, drm_sched_entity_kill_jobs_work);
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schedule_work(&job->work);
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}
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/* Remove the entity from the scheduler and kill all pending jobs */
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static void drm_sched_entity_kill(struct drm_sched_entity *entity)
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{
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struct drm_sched_job *job;
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struct dma_fence *prev;
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if (!entity->rq)
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return;
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spin_lock(&entity->lock);
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entity->stopped = true;
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drm_sched_rq_remove_entity(entity->rq, entity);
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spin_unlock(&entity->lock);
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/* Make sure this entity is not used by the scheduler at the moment */
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wait_for_completion(&entity->entity_idle);
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/* The entity is guaranteed to not be used by the scheduler */
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prev = rcu_dereference_check(entity->last_scheduled, true);
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dma_fence_get(prev);
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while ((job = drm_sched_entity_queue_pop(entity))) {
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struct drm_sched_fence *s_fence = job->s_fence;
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dma_fence_get(&s_fence->finished);
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if (!prev ||
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dma_fence_add_callback(prev, &job->finish_cb,
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drm_sched_entity_kill_jobs_cb)) {
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/*
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* Adding callback above failed.
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* dma_fence_put() checks for NULL.
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*/
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dma_fence_put(prev);
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drm_sched_entity_kill_jobs_cb(NULL, &job->finish_cb);
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}
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prev = &s_fence->finished;
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}
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dma_fence_put(prev);
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}
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/**
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* drm_sched_entity_flush - Flush a context entity
|
|
*
|
|
* @entity: scheduler entity
|
|
* @timeout: time to wait in for Q to become empty in jiffies.
|
|
*
|
|
* Splitting drm_sched_entity_fini() into two functions, The first one does the
|
|
* waiting, removes the entity from the runqueue and returns an error when the
|
|
* process was killed.
|
|
*
|
|
* Returns the remaining time in jiffies left from the input timeout
|
|
*/
|
|
long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout)
|
|
{
|
|
struct drm_gpu_scheduler *sched;
|
|
struct task_struct *last_user;
|
|
long ret = timeout;
|
|
|
|
if (!entity->rq)
|
|
return 0;
|
|
|
|
sched = entity->rq->sched;
|
|
/**
|
|
* The client will not queue more IBs during this fini, consume existing
|
|
* queued IBs or discard them on SIGKILL
|
|
*/
|
|
if (current->flags & PF_EXITING) {
|
|
if (timeout)
|
|
ret = wait_event_timeout(
|
|
sched->job_scheduled,
|
|
drm_sched_entity_is_idle(entity),
|
|
timeout);
|
|
} else {
|
|
wait_event_killable(sched->job_scheduled,
|
|
drm_sched_entity_is_idle(entity));
|
|
}
|
|
|
|
/* For killed process disable any more IBs enqueue right now */
|
|
last_user = cmpxchg(&entity->last_user, current->group_leader, NULL);
|
|
if ((!last_user || last_user == current->group_leader) &&
|
|
(current->flags & PF_EXITING) && (current->exit_code == SIGKILL))
|
|
drm_sched_entity_kill(entity);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(drm_sched_entity_flush);
|
|
|
|
/**
|
|
* drm_sched_entity_fini - Destroy a context entity
|
|
*
|
|
* @entity: scheduler entity
|
|
*
|
|
* Cleanups up @entity which has been initialized by drm_sched_entity_init().
|
|
*
|
|
* If there are potentially job still in flight or getting newly queued
|
|
* drm_sched_entity_flush() must be called first. This function then goes over
|
|
* the entity and signals all jobs with an error code if the process was killed.
|
|
*/
|
|
void drm_sched_entity_fini(struct drm_sched_entity *entity)
|
|
{
|
|
/*
|
|
* If consumption of existing IBs wasn't completed. Forcefully remove
|
|
* them here. Also makes sure that the scheduler won't touch this entity
|
|
* any more.
|
|
*/
|
|
drm_sched_entity_kill(entity);
|
|
|
|
if (entity->dependency) {
|
|
dma_fence_remove_callback(entity->dependency, &entity->cb);
|
|
dma_fence_put(entity->dependency);
|
|
entity->dependency = NULL;
|
|
}
|
|
|
|
dma_fence_put(rcu_dereference_check(entity->last_scheduled, true));
|
|
RCU_INIT_POINTER(entity->last_scheduled, NULL);
|
|
}
|
|
EXPORT_SYMBOL(drm_sched_entity_fini);
|
|
|
|
/**
|
|
* drm_sched_entity_destroy - Destroy a context entity
|
|
* @entity: scheduler entity
|
|
*
|
|
* Calls drm_sched_entity_flush() and drm_sched_entity_fini() as a
|
|
* convenience wrapper.
|
|
*/
|
|
void drm_sched_entity_destroy(struct drm_sched_entity *entity)
|
|
{
|
|
drm_sched_entity_flush(entity, MAX_WAIT_SCHED_ENTITY_Q_EMPTY);
|
|
drm_sched_entity_fini(entity);
|
|
}
|
|
EXPORT_SYMBOL(drm_sched_entity_destroy);
|
|
|
|
/*
|
|
* drm_sched_entity_wakeup - callback to clear the entity's dependency and
|
|
* wake up the scheduler
|
|
*/
|
|
static void drm_sched_entity_wakeup(struct dma_fence *f,
|
|
struct dma_fence_cb *cb)
|
|
{
|
|
struct drm_sched_entity *entity =
|
|
container_of(cb, struct drm_sched_entity, cb);
|
|
|
|
entity->dependency = NULL;
|
|
dma_fence_put(f);
|
|
drm_sched_wakeup(entity->rq->sched);
|
|
}
|
|
|
|
/**
|
|
* drm_sched_entity_set_priority - Sets priority of the entity
|
|
*
|
|
* @entity: scheduler entity
|
|
* @priority: scheduler priority
|
|
*
|
|
* Update the priority of runqueues used for the entity.
|
|
*/
|
|
void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
|
|
enum drm_sched_priority priority)
|
|
{
|
|
spin_lock(&entity->lock);
|
|
entity->priority = priority;
|
|
spin_unlock(&entity->lock);
|
|
}
|
|
EXPORT_SYMBOL(drm_sched_entity_set_priority);
|
|
|
|
/*
|
|
* Add a callback to the current dependency of the entity to wake up the
|
|
* scheduler when the entity becomes available.
|
|
*/
|
|
static bool drm_sched_entity_add_dependency_cb(struct drm_sched_entity *entity)
|
|
{
|
|
struct drm_gpu_scheduler *sched = entity->rq->sched;
|
|
struct dma_fence *fence = entity->dependency;
|
|
struct drm_sched_fence *s_fence;
|
|
|
|
if (fence->context == entity->fence_context ||
|
|
fence->context == entity->fence_context + 1) {
|
|
/*
|
|
* Fence is a scheduled/finished fence from a job
|
|
* which belongs to the same entity, we can ignore
|
|
* fences from ourself
|
|
*/
|
|
dma_fence_put(entity->dependency);
|
|
return false;
|
|
}
|
|
|
|
s_fence = to_drm_sched_fence(fence);
|
|
if (!fence->error && s_fence && s_fence->sched == sched &&
|
|
!test_bit(DRM_SCHED_FENCE_DONT_PIPELINE, &fence->flags)) {
|
|
|
|
/*
|
|
* Fence is from the same scheduler, only need to wait for
|
|
* it to be scheduled
|
|
*/
|
|
fence = dma_fence_get(&s_fence->scheduled);
|
|
dma_fence_put(entity->dependency);
|
|
entity->dependency = fence;
|
|
}
|
|
|
|
if (!dma_fence_add_callback(entity->dependency, &entity->cb,
|
|
drm_sched_entity_wakeup))
|
|
return true;
|
|
|
|
dma_fence_put(entity->dependency);
|
|
return false;
|
|
}
|
|
|
|
static struct dma_fence *
|
|
drm_sched_job_dependency(struct drm_sched_job *job,
|
|
struct drm_sched_entity *entity)
|
|
{
|
|
struct dma_fence *f;
|
|
|
|
/* We keep the fence around, so we can iterate over all dependencies
|
|
* in drm_sched_entity_kill_jobs_cb() to ensure all deps are signaled
|
|
* before killing the job.
|
|
*/
|
|
f = xa_load(&job->dependencies, job->last_dependency);
|
|
if (f) {
|
|
job->last_dependency++;
|
|
return dma_fence_get(f);
|
|
}
|
|
|
|
if (job->sched->ops->prepare_job)
|
|
return job->sched->ops->prepare_job(job, entity);
|
|
|
|
return NULL;
|
|
}
|
|
|
|
struct drm_sched_job *drm_sched_entity_pop_job(struct drm_sched_entity *entity)
|
|
{
|
|
struct drm_sched_job *sched_job;
|
|
|
|
sched_job = drm_sched_entity_queue_peek(entity);
|
|
if (!sched_job)
|
|
return NULL;
|
|
|
|
while ((entity->dependency =
|
|
drm_sched_job_dependency(sched_job, entity))) {
|
|
if (drm_sched_entity_add_dependency_cb(entity)) {
|
|
trace_drm_sched_job_unschedulable(sched_job, entity->dependency);
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
/* skip jobs from entity that marked guilty */
|
|
if (entity->guilty && atomic_read(entity->guilty))
|
|
dma_fence_set_error(&sched_job->s_fence->finished, -ECANCELED);
|
|
|
|
dma_fence_put(rcu_dereference_check(entity->last_scheduled, true));
|
|
rcu_assign_pointer(entity->last_scheduled,
|
|
dma_fence_get(&sched_job->s_fence->finished));
|
|
|
|
/*
|
|
* If the queue is empty we allow drm_sched_entity_select_rq() to
|
|
* locklessly access ->last_scheduled. This only works if we set the
|
|
* pointer before we dequeue and if we a write barrier here.
|
|
*/
|
|
smp_wmb();
|
|
|
|
spsc_queue_pop(&entity->job_queue);
|
|
|
|
/*
|
|
* Update the entity's location in the min heap according to
|
|
* the timestamp of the next job, if any.
|
|
*/
|
|
if (drm_sched_policy == DRM_SCHED_POLICY_FIFO) {
|
|
struct drm_sched_job *next;
|
|
|
|
next = drm_sched_entity_queue_peek(entity);
|
|
if (next) {
|
|
struct drm_sched_rq *rq;
|
|
|
|
spin_lock(&entity->lock);
|
|
rq = entity->rq;
|
|
spin_lock(&rq->lock);
|
|
drm_sched_rq_update_fifo_locked(entity, rq,
|
|
next->submit_ts);
|
|
spin_unlock(&rq->lock);
|
|
spin_unlock(&entity->lock);
|
|
}
|
|
}
|
|
|
|
/* Jobs and entities might have different lifecycles. Since we're
|
|
* removing the job from the entities queue, set the jobs entity pointer
|
|
* to NULL to prevent any future access of the entity through this job.
|
|
*/
|
|
sched_job->entity = NULL;
|
|
|
|
return sched_job;
|
|
}
|
|
|
|
void drm_sched_entity_select_rq(struct drm_sched_entity *entity)
|
|
{
|
|
struct dma_fence *fence;
|
|
struct drm_gpu_scheduler *sched;
|
|
struct drm_sched_rq *rq;
|
|
|
|
/* single possible engine and already selected */
|
|
if (!entity->sched_list)
|
|
return;
|
|
|
|
/* queue non-empty, stay on the same engine */
|
|
if (spsc_queue_count(&entity->job_queue))
|
|
return;
|
|
|
|
/*
|
|
* Only when the queue is empty are we guaranteed that
|
|
* drm_sched_run_job_work() cannot change entity->last_scheduled. To
|
|
* enforce ordering we need a read barrier here. See
|
|
* drm_sched_entity_pop_job() for the other side.
|
|
*/
|
|
smp_rmb();
|
|
|
|
fence = rcu_dereference_check(entity->last_scheduled, true);
|
|
|
|
/* stay on the same engine if the previous job hasn't finished */
|
|
if (fence && !dma_fence_is_signaled(fence))
|
|
return;
|
|
|
|
spin_lock(&entity->lock);
|
|
sched = drm_sched_pick_best(entity->sched_list, entity->num_sched_list);
|
|
rq = sched ? sched->sched_rq[entity->priority] : NULL;
|
|
if (rq != entity->rq) {
|
|
drm_sched_rq_remove_entity(entity->rq, entity);
|
|
entity->rq = rq;
|
|
}
|
|
spin_unlock(&entity->lock);
|
|
|
|
if (entity->num_sched_list == 1)
|
|
entity->sched_list = NULL;
|
|
}
|
|
|
|
/**
|
|
* drm_sched_entity_push_job - Submit a job to the entity's job queue
|
|
* @sched_job: job to submit
|
|
*
|
|
* Note: To guarantee that the order of insertion to queue matches the job's
|
|
* fence sequence number this function should be called with drm_sched_job_arm()
|
|
* under common lock for the struct drm_sched_entity that was set up for
|
|
* @sched_job in drm_sched_job_init().
|
|
*/
|
|
void drm_sched_entity_push_job(struct drm_sched_job *sched_job)
|
|
{
|
|
struct drm_sched_entity *entity = sched_job->entity;
|
|
bool first;
|
|
ktime_t submit_ts;
|
|
|
|
trace_drm_sched_job_queue(sched_job, entity);
|
|
|
|
if (trace_drm_sched_job_add_dep_enabled()) {
|
|
struct dma_fence *entry;
|
|
unsigned long index;
|
|
|
|
xa_for_each(&sched_job->dependencies, index, entry)
|
|
trace_drm_sched_job_add_dep(sched_job, entry);
|
|
}
|
|
atomic_inc(entity->rq->sched->score);
|
|
WRITE_ONCE(entity->last_user, current->group_leader);
|
|
|
|
/*
|
|
* After the sched_job is pushed into the entity queue, it may be
|
|
* completed and freed up at any time. We can no longer access it.
|
|
* Make sure to set the submit_ts first, to avoid a race.
|
|
*/
|
|
sched_job->submit_ts = submit_ts = ktime_get();
|
|
first = spsc_queue_push(&entity->job_queue, &sched_job->queue_node);
|
|
|
|
/* first job wakes up scheduler */
|
|
if (first) {
|
|
struct drm_gpu_scheduler *sched;
|
|
struct drm_sched_rq *rq;
|
|
|
|
/* Add the entity to the run queue */
|
|
spin_lock(&entity->lock);
|
|
if (entity->stopped) {
|
|
spin_unlock(&entity->lock);
|
|
|
|
DRM_ERROR("Trying to push to a killed entity\n");
|
|
return;
|
|
}
|
|
|
|
rq = entity->rq;
|
|
sched = rq->sched;
|
|
|
|
spin_lock(&rq->lock);
|
|
drm_sched_rq_add_entity(rq, entity);
|
|
|
|
if (drm_sched_policy == DRM_SCHED_POLICY_FIFO)
|
|
drm_sched_rq_update_fifo_locked(entity, rq, submit_ts);
|
|
|
|
spin_unlock(&rq->lock);
|
|
spin_unlock(&entity->lock);
|
|
|
|
drm_sched_wakeup(sched);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(drm_sched_entity_push_job);
|