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linux-loongson/tools/perf/pmu-events/arch/riscv
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Eric Lin 6dad43bb11 perf vendor events riscv: Add SiFive P650 events 
The SiFive Performance P650 core (including the vector-enabled P670 and
area-optimized P450/P470 variants) updates the P550 microarchitecture.
It brings in the debug, trace, and counter events from newer Bullet
cores, and adds new events for iTLB and dTLB multi-hits.

All other PMU events are unchanged from the P550 core.

Signed-off-by: Eric Lin <eric.lin@sifive.com>
Co-developed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Tested-by: Ian Rogers <irogers@google.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20250213220341.3215660-8-samuel.holland@sifive.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-03-10 14:15:38 -07:00
..
andes/ax45 perf arch events: Fix duplicate RISC-V SBI firmware event name 2024-08-01 07:14:45 -07:00
sifive perf vendor events riscv: Add SiFive P650 events 2025-03-10 14:15:38 -07:00
starfive/dubhe-80 perf arch events: Fix duplicate RISC-V SBI firmware event name 2024-08-01 07:14:45 -07:00
thead/c900-legacy perf arch events: Fix duplicate RISC-V SBI firmware event name 2024-08-01 07:14:45 -07:00
mapfile.csv perf vendor events riscv: Add SiFive P650 events 2025-03-10 14:15:38 -07:00
riscv-sbi-firmware.json perf arch events: Fix duplicate RISC-V SBI firmware event name 2024-08-01 07:14:45 -07:00