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106f43ab41
Update k3-pinctrl file to include pin definitions for AM62D2 family of SoCs. Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Link: https://lore.kernel.org/r/20250708085839.1498505-4-p-bhagat@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
103 lines
4.3 KiB
C
103 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
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/*
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* This header provides constants for pinctrl bindings for TI's K3 SoC
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* family.
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*
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* Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#ifndef DTS_ARM64_TI_K3_PINCTRL_H
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#define DTS_ARM64_TI_K3_PINCTRL_H
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#define ST_EN_SHIFT (14)
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#define PULLUDEN_SHIFT (16)
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#define PULLTYPESEL_SHIFT (17)
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#define RXACTIVE_SHIFT (18)
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#define DEBOUNCE_SHIFT (11)
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#define FORCE_DS_EN_SHIFT (15)
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#define DS_EN_SHIFT (24)
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#define DS_OUT_DIS_SHIFT (25)
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#define DS_OUT_VAL_SHIFT (26)
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#define DS_PULLUD_EN_SHIFT (27)
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#define DS_PULLTYPE_SEL_SHIFT (28)
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/* Schmitt trigger configuration */
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#define ST_DISABLE (0 << ST_EN_SHIFT)
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#define ST_ENABLE (1 << ST_EN_SHIFT)
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#define PULL_DISABLE (1 << PULLUDEN_SHIFT)
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#define PULL_ENABLE (0 << PULLUDEN_SHIFT)
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#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE)
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#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE)
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#define INPUT_EN (1 << RXACTIVE_SHIFT)
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#define INPUT_DISABLE (0 << RXACTIVE_SHIFT)
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/* Only these macros are expected be used directly in device tree files */
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#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE)
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#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP)
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#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN)
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#define PIN_INPUT (INPUT_EN | ST_ENABLE | PULL_DISABLE)
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#define PIN_INPUT_PULLUP (INPUT_EN | ST_ENABLE | PULL_UP)
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#define PIN_INPUT_PULLDOWN (INPUT_EN | ST_ENABLE | PULL_DOWN)
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/* Input configurations with Schmitt Trigger disabled */
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#define PIN_INPUT_NOST (INPUT_EN | PULL_DISABLE)
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#define PIN_INPUT_PULLUP_NOST (INPUT_EN | PULL_UP)
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#define PIN_INPUT_PULLDOWN_NOST (INPUT_EN | PULL_DOWN)
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#define PIN_DEBOUNCE_DISABLE (0 << DEBOUNCE_SHIFT)
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#define PIN_DEBOUNCE_CONF1 (1 << DEBOUNCE_SHIFT)
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#define PIN_DEBOUNCE_CONF2 (2 << DEBOUNCE_SHIFT)
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#define PIN_DEBOUNCE_CONF3 (3 << DEBOUNCE_SHIFT)
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#define PIN_DEBOUNCE_CONF4 (4 << DEBOUNCE_SHIFT)
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#define PIN_DEBOUNCE_CONF5 (5 << DEBOUNCE_SHIFT)
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#define PIN_DEBOUNCE_CONF6 (6 << DEBOUNCE_SHIFT)
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#define PIN_DS_FORCE_DISABLE (0 << FORCE_DS_EN_SHIFT)
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#define PIN_DS_FORCE_ENABLE (1 << FORCE_DS_EN_SHIFT)
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#define PIN_DS_IO_OVERRIDE_DISABLE (0 << DS_IO_OVERRIDE_EN_SHIFT)
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#define PIN_DS_IO_OVERRIDE_ENABLE (1 << DS_IO_OVERRIDE_EN_SHIFT)
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#define PIN_DS_OUT_ENABLE (0 << DS_OUT_DIS_SHIFT)
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#define PIN_DS_OUT_DISABLE (1 << DS_OUT_DIS_SHIFT)
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#define PIN_DS_OUT_VALUE_ZERO (0 << DS_OUT_VAL_SHIFT)
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#define PIN_DS_OUT_VALUE_ONE (1 << DS_OUT_VAL_SHIFT)
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#define PIN_DS_PULLUD_ENABLE (0 << DS_PULLUD_EN_SHIFT)
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#define PIN_DS_PULLUD_DISABLE (1 << DS_PULLUD_EN_SHIFT)
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#define PIN_DS_PULL_DOWN (0 << DS_PULLTYPE_SEL_SHIFT)
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#define PIN_DS_PULL_UP (1 << DS_PULLTYPE_SEL_SHIFT)
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/* Default mux configuration for gpio-ranges to use with pinctrl */
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#define PIN_GPIO_RANGE_IOPAD (PIN_INPUT | 7)
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#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM62DX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM62DX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define J722S_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define J722S_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define J784S4_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#define J784S4_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
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#endif
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