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linux-loongson/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts
Dominik Haller 8bc3b1c864 arm64: dts: ti: Add basic support for phyBOARD-Izar-AM68x 
The phyCORE-AM68x/TDA4x [1] is a SoM (System on Module) featuring TI's
AM68x/TDA4x SoC. It can be used in combination with different carrier
boards. This module can come with different sizes and models for DDR,
eMMC, SPI NOR Flash and various SoCs from the AM68x/TDA4x (J721S2) family.

A reference carrier board design, called phyBOARD-Izar is used for the
phyCORE-AM68x/TDA4x development kit [2].

Supported features:
* Debug UART
* 2x SPI NOR Flash
* eMMC
* 2x Ethernet
* Micro SD card
* I2C EEPROM
* I2C RTC
* 2x I2C GPIO Expander
* LEDs
* USB 5 Gbit/s
* PCIe

For more details see the product pages for the SoM and the
development kit:

[1] https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/
[2] https://www.phytec.eu/en/produkte/development-kits/phyboard-izar/

Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Acked-by: Moteen Shah <m-shah@ti.com>
Link: https://lore.kernel.org/r/20250423133635.29897-2-d.haller@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
2025-04-25 15:57:15 -05:00

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// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Copyright (C) 2025 PHYTEC Messtechnik GmbH
* Author: Dominik Haller <d.haller@phytec.de>
*
* https://www.phytec.eu/en/produkte/development-kits/phyboard-izar/
*/
/dts-v1/;
#include <dt-bindings/leds/leds-pca9532.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/phy/phy-cadence.h>
#include <dt-bindings/phy/phy.h>
#include "k3-am68-phycore-som.dtsi"
#include "k3-serdes.h"
/ {
compatible = "phytec,am68-phyboard-izar",
"phytec,am68-phycore-som", "ti,j721s2";
model = "PHYTEC phyBOARD-Izar-AM68x";
aliases {
serial0 = &mcu_uart0;
serial1 = &main_uart1;
serial2 = &main_uart8;
serial3 = &main_uart2;
mmc1 = &main_sdhci1;
ethernet0 = &cpsw_port1;
};
chosen {
stdout-path = &main_uart8;
};
transceiver1: can-phy1 {
compatible = "ti,tcan1043";
#phy-cells = <0>;
max-bitrate = <8000000>;
};
transceiver2: can-phy2 {
compatible = "ti,tcan1043";
#phy-cells = <0>;
max-bitrate = <8000000>;
};
transceiver3: can-phy3 {
compatible = "ti,tcan1043";
#phy-cells = <0>;
max-bitrate = <8000000>;
};
transceiver4: can-phy4 {
compatible = "ti,tcan1043";
#phy-cells = <0>;
max-bitrate = <8000000>;
};
vcc_12v0: regulator-12v0 {
/* main supply */
compatible = "regulator-fixed";
regulator-name = "VCC_IN";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
};
vcc_1v8: regulator-vcc-1v8 {
/* Output of TLV7158P */
compatible = "regulator-fixed";
regulator-name = "VCC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_3v3>;
};
vcc_3v3: regulator-vcc-3v3 {
/* Output of SiC431 */
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_5v0>;
};
vcc_5v0: regulator-vcc-5v0 {
/* Output of LM5116 */
compatible = "regulator-fixed";
regulator-name = "VCC_5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_12v0>;
};
};
&main_pmx0 {
main_i2c2_pins_default: main-i2c2-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x04c, PIN_INPUT_PULLUP, 13) /* (V27) MCASP1_AXR1.I2C2_SCL */
J721S2_IOPAD(0x050, PIN_INPUT_PULLUP, 13) /* (W27) MCASP1_AXR2.I2C2_SDA */
>;
};
main_i2c4_pins_default: main-i2c4-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */
J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */
>;
};
main_i2c5_pins_default: main-i2c5-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x01c, PIN_INPUT_PULLUP, 8) /* (Y24) MCAN15_TX.I2C5_SCL */
J721S2_IOPAD(0x018, PIN_INPUT_PULLUP, 8) /* (W23) MCAN14_RX.I2C5_SDA */
>;
};
main_gpio0_ioexp_intr_pins_default: main-gpio0-ioexp-intr-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
>;
};
main_mcan1_pins_default: main-mcan1-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x0c8, PIN_INPUT, 4) /* (AD28) EXT_REFCLK1.MCAN1_RX */
J721S2_IOPAD(0x06c, PIN_OUTPUT, 0) /* (V26) MCAN1_TX */
>;
};
main_mcan13_pins_default: main-mcan13-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x0ec, PIN_INPUT, 9) /* (AG25) TIMER_IO1.MCAN13_RX */
J721S2_IOPAD(0x00c, PIN_OUTPUT, 0) /* (AE28) MCAN13_TX */
>;
};
main_mcan16_pins_default: main-mcan16-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */
J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */
>;
};
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
>;
bootph-all;
};
main_spi6_pins_default: main-spi6-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x030, PIN_INPUT, 8) /* (T26) GPIO0_12.SPI6_CLK */
J721S2_IOPAD(0x080, PIN_INPUT, 8) /* (U26) MCASP0_AXR4.SPI6_CS2 */
J721S2_IOPAD(0x0c4, PIN_OUTPUT, 8) /* (AB26) ECAP0_IN_APWM_OUT.SPI6_D0 */
J721S2_IOPAD(0x074, PIN_INPUT, 8) /* (R28) MCAN2_TX.SPI6_D1 */
J721S2_IOPAD(0x0dc, PIN_OUTPUT, 7) /* (AH26) SPI0_D1.GPIO0_55 */
>;
};
main_uart1_pins_default: main-uart1-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x05c, PIN_INPUT, 11) /* (AA26) MCASP2_AXR0.UART1_CTSn */
J721S2_IOPAD(0x060, PIN_OUTPUT, 11) /* (AC27) MCASP2_AXR1.UART1_RTSn */
J721S2_IOPAD(0x054, PIN_INPUT, 11) /* (Y27) MCASP2_ACLKX.UART1_RXD */
J721S2_IOPAD(0x058, PIN_OUTPUT, 11) /* (AA27) MCASP2_AFSX.UART1_TXD */
>;
};
main_uart2_pins_default: main-uart2-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x0d8, PIN_INPUT, 11) /* (AG26) SPI0_D0.UART2_RXD */
J721S2_IOPAD(0x068, PIN_OUTPUT, 11) /* (U28) MCAN0_RX.UART2_TXD */
>;
};
main_uart8_pins_default: main-uart8-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
>;
bootph-all;
};
};
&wkup_pmx1 {
mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */
J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */
J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */
J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */
J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */
J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */
>;
};
};
&wkup_pmx2 {
mcu_cpsw_pins_default: mcu-cpsw-default-pins {
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
J721S2_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
>;
};
mcu_i2c1_pins_default: mcu-i2c1-default-pins {
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */
J721S2_WKUP_IOPAD(0x07c, PIN_INPUT_PULLUP, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */
>;
};
mcu_mcan0_pins_default: mcu-mcan0-default-pins {
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
>;
};
mcu_mdio_pins_default: mcu-mdio-default-pins {
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
>;
};
mcu_spi0_pins_default: mcu-spi0-default-pins {
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x038, PIN_INPUT, 0) /* (B27) MCU_SPI0_CLK */
J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B26) MCU_SPI0_CS0 */
J721S2_WKUP_IOPAD(0x068, PIN_INPUT, 2) /* (C23) WKUP_GPIO0_4.MCU_SPI0_CS3 */
J721S2_WKUP_IOPAD(0x03c, PIN_INPUT, 0) /* (D24) MCU_SPI0_D0 */
J721S2_WKUP_IOPAD(0x040, PIN_INPUT, 0) /* (B25) MCU_SPI0_D1 */
>;
};
mcu_uart0_pins_default: mcu-uart0-default-pins {
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B24) WKUP_GPIO0_14.MCU_UART0_CTSn */
J721S2_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */
J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */
J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */
>;
};
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
>;
bootph-all;
};
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&phy0>;
};
&davinci_mdio {
pinctrl-names = "default";
pinctrl-0 = <&mcu_mdio_pins_default>;
phy0: ethernet-phy@0 {
reg = <0>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
};
};
&i2c_som_rtc {
trickle-resistor-ohms = <3000>;
};
&main_i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c2_pins_default>;
status = "okay";
exp1: gpio@20 {
compatible = "nxp,pca9672";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "HALF/nFULL_EN", "RS485/nRS232_EN", "MCU_ETH_nRESET", "",
"PCIe_nRESET", "USB2.0-Hub_nRESET", "USB3.0-Hub_nRESET", "PEB_AV_BL_EN";
interrupt-parent = <&main_gpio0>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
};
exp2: gpio@22 {
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "RPI_GPIO4", "RPI_GPIO5", "RPI_GPIO6", "RPI_GPIO19",
"RPI_GPIO20", "RPI_GPIO21", "RPI_GPIO22", "RPI_GPIO23",
"RPI_GPIO24", "RPI_GPIO25", "RPI_GPIO26", "RPI_GPIO20",
"LVDS_BL_nEN", "LVDS_REG_nEN", "CSI_CAM0_nRESET", "CSI_CAM1_nRESET",
"CSI0_CTRL1", "CSI0_CTRL2", "CSI0_CTRL3", "CSI0_CTRL4",
"CSI1_CTRL1", "CSI1_CTRL2", "CSI1_CTRL3", "CSI1_CTRL4";
interrupt-parent = <&main_gpio0>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&main_gpio0_ioexp_intr_pins_default>;
};
};
/* CSI0 + RPI */
&main_i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c4_pins_default>;
};
/* CSI1 + PCIe */
&main_i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c5_pins_default>;
};
&main_mcan1 {
pinctrl-names = "default";
pinctrl-0 = <&main_mcan1_pins_default>;
phys = <&transceiver1>;
status = "okay";
};
&main_mcan13 {
pinctrl-names = "default";
pinctrl-0 = <&main_mcan13_pins_default>;
phys = <&transceiver2>;
status = "okay";
};
&main_mcan16 {
pinctrl-names = "default";
pinctrl-0 = <&main_mcan16_pins_default>;
phys = <&transceiver3>;
status = "okay";
};
/* SD-Card */
&main_sdhci1 {
pinctrl-0 = <&main_mmc1_pins_default>;
pinctrl-names = "default";
disable-wp;
vmmc-supply = <&vcc_3v3>;
status = "okay";
};
&main_spi6 {
pinctrl-names = "default";
pinctrl-0 = <&main_spi6_pins_default>;
cs-gpios = <&main_gpio0 55 GPIO_ACTIVE_LOW>;
ti,spi-num-cs = <1>;
ti,pindir-d0-out-d1-in;
status = "okay";
tpm@0 {
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
reg = <0>;
spi-max-frequency = <10000000>;
};
};
&main_uart1 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
uart-has-rtscts;
status = "okay";
};
&main_uart2 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart2_pins_default>;
status = "okay";
};
&main_uart8 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart8_pins_default>;
/* Shared with TFA on this platform */
power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
bootph-all;
status = "okay";
};
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>;
};
&mcu_i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_i2c1_pins_default>;
status = "okay";
};
&mcu_mcan0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_mcan0_pins_default>;
phys = <&transceiver4>;
status = "okay";
};
/* RPI-Header */
&mcu_spi0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_spi0_pins_default>;
};
/* RPI-Header */
&mcu_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_uart0_pins_default>;
uart-has-rtscts;
status = "okay";
};
&ospi1 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <40000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <2>;
};
};
&pcie1_rc {
num-lanes = <1>;
phys = <&serdes0_pcie_link>;
phy-names = "pcie-phy";
reset-gpios = <&exp1 4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&serdes_ln_ctrl {
idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
<J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
};
&serdes_refclk {
clock-frequency = <100000000>;
};
&serdes0 {
status = "okay";
serdes0_pcie_link: phy@0 {
reg = <0>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
resets = <&serdes_wiz0 1>;
cdns,phy-type = <PHY_TYPE_PCIE>;
};
serdes0_usb_link: phy@1 {
reg = <1>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
resets = <&serdes_wiz0 2>;
cdns,phy-type = <PHY_TYPE_USB3>;
};
};
&tscadc0 {
status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
&tscadc1 {
status = "okay";
adc {
ti,adc-channels = <3 4 5 6 7>;
};
};
&usbss0 {
ti,vbus-divider;
status = "okay";
};
&usb0 {
dr_mode = "host";
phys = <&serdes0_usb_link>;
phy-names = "cdns3,usb3-phy";
};
&usb_serdes_mux {
idle-states = <1>; /* USB0 to SERDES lane 1 */
};
&wkup_i2c0 {
eeprom@57 {
compatible = "atmel,24c32";
reg = <0x57>;
pagesize = <32>;
};
led-controller@62 {
compatible = "nxp,pca9533";
reg = <0x62>;
led-1 {
label = "user-led1";
type = <PCA9532_TYPE_LED>;
};
led-2 {
label = "user-led2";
type = <PCA9532_TYPE_LED>;
};
led-3 {
label = "user-led3";
type = <PCA9532_TYPE_LED>;
};
};
};
/* Shared with TIFS */
&wkup_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
bootph-all;
status = "reserved";
};
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