mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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bootph-all as phase tag was added to dt-schema (dtschema/schemas/bootph.yaml) to describe various node usage during boot phases with DT. Add bootph-all for all nodes that are used in the bootloader on Renesas R-Car SoCs. All SoC require CPG clock and its input clock, RST Reset, PFC pin control and PRR ID register access during all stages of the boot process, those are marked using bootph-all property, and so is the SoC bus node which contains these IP. Each board console UART is also marked as bootph-all to make it available in all stages of the boot process. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250209180616.160253-2-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
242 lines
4.2 KiB
Plaintext
242 lines
4.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device Tree Source for the Spider CPU board
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "r8a779f0.dtsi"
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/ {
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model = "Renesas Spider CPU board";
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compatible = "renesas,spider-cpu", "renesas,r8a779f0";
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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serial0 = &hscif0;
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serial1 = &scif0;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
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stdout-path = "serial0:1843200n8";
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};
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leds {
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compatible = "gpio-leds";
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led-7 {
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gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_INDICATOR;
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function-enumerator = <7>;
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};
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led-8 {
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gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_INDICATOR;
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function-enumerator = <8>;
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};
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};
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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reg = <0x0 0x48000000 0x0 0x78000000>;
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};
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memory@480000000 {
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device_type = "memory";
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reg = <0x4 0x80000000 0x0 0x80000000>;
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};
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rc21012_pci: clk-rc21012-pci {
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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#clock-cells = <0>;
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};
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rc21012_ufs: clk-rc21012-ufs {
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compatible = "fixed-clock";
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clock-frequency = <38400000>;
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#clock-cells = <0>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&extalr_clk {
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clock-frequency = <32768>;
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};
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&hscif0 {
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pinctrl-0 = <&hscif0_pins>;
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pinctrl-names = "default";
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bootph-all;
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uart-has-rtscts;
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status = "okay";
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};
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&i2c0 {
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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gpio_exp_20: gpio@20 {
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compatible = "ti,tca9554";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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rc21012-gpio2-hog {
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gpio-hog;
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gpios = <5 GPIO_ACTIVE_LOW>;
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output-high;
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};
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};
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};
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&i2c4 {
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pinctrl-0 = <&i2c4_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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eeprom@50 {
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compatible = "rohm,br24g01", "atmel,24c01";
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label = "cpu-board";
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reg = <0x50>;
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pagesize = <8>;
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};
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};
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/*
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* This board also has a microSD slot which we will not support upstream
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* because we cannot directly switch voltages in software.
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*/
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&mmc0 {
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pinctrl-0 = <&mmc_pins>;
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pinctrl-1 = <&mmc_pins>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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bus-width = <8>;
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no-sd;
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no-sdio;
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non-removable;
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full-pwr-cycle-in-suspend;
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status = "okay";
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};
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&pcie0_clkref {
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compatible = "gpio-gate-clock";
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clocks = <&rc21012_pci>;
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enable-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
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/delete-property/ clock-frequency;
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};
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&pciec0 {
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reset-gpios = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pfc {
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pinctrl-0 = <&scif_clk_pins>;
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pinctrl-names = "default";
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hscif0_pins: hscif0 {
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groups = "hscif0_data", "hscif0_ctrl";
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function = "hscif0";
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};
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i2c0_pins: i2c0 {
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groups = "i2c0";
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function = "i2c0";
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};
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i2c4_pins: i2c4 {
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groups = "i2c4";
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function = "i2c4";
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};
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mmc_pins: mmc {
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groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
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function = "mmc";
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power-source = <1800>;
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};
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scif0_pins: scif0 {
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groups = "scif0_data", "scif0_ctrl";
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function = "scif0";
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};
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scif_clk_pins: scif_clk {
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groups = "scif_clk";
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function = "scif_clk";
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};
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};
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&rwdt {
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timeout-sec = <60>;
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status = "okay";
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};
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&scif0 {
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pinctrl-0 = <&scif0_pins>;
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pinctrl-names = "default";
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uart-has-rtscts;
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status = "okay";
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};
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&scif_clk {
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clock-frequency = <24000000>;
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};
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&ufs {
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status = "okay";
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};
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&ufs30_clk {
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compatible = "gpio-gate-clock";
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clocks = <&rc21012_ufs>;
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enable-gpios = <&gpio_exp_20 4 GPIO_ACTIVE_LOW>;
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/delete-property/ clock-frequency;
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};
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