mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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e623c6e56b
Document support for the CAN-FD Interface on the RZ/G3E (R9A09G047) SoC, which supports up to six channels. The CAN-FD module on RZ/G3E is very similar to the one on both R-Car V4H and RZ/G2L, but differs in some hardware parameters: * No external clock, but instead has ram clock. * Support up to 6 channels. * 20 interrupts. Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20250417054320.14100-3-biju.das.jz@bp.renesas.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
300 lines
7.7 KiB
YAML
300 lines
7.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car CAN FD Controller
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maintainers:
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- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,r8a774a1-canfd # RZ/G2M
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- renesas,r8a774b1-canfd # RZ/G2N
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- renesas,r8a774c0-canfd # RZ/G2E
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- renesas,r8a774e1-canfd # RZ/G2H
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- renesas,r8a7795-canfd # R-Car H3
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- renesas,r8a7796-canfd # R-Car M3-W
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- renesas,r8a77961-canfd # R-Car M3-W+
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- renesas,r8a77965-canfd # R-Car M3-N
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- renesas,r8a77970-canfd # R-Car V3M
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- renesas,r8a77980-canfd # R-Car V3H
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- renesas,r8a77990-canfd # R-Car E3
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- renesas,r8a77995-canfd # R-Car D3
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- const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
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- items:
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- enum:
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- renesas,r8a779a0-canfd # R-Car V3U
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- renesas,r8a779g0-canfd # R-Car V4H
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- renesas,r8a779h0-canfd # R-Car V4M
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- const: renesas,rcar-gen4-canfd # R-Car Gen4
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- items:
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- enum:
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- renesas,r9a07g043-canfd # RZ/G2UL and RZ/Five
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- renesas,r9a07g044-canfd # RZ/G2{L,LC}
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- renesas,r9a07g054-canfd # RZ/V2L
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- const: renesas,rzg2l-canfd # RZ/G2L family
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- const: renesas,r9a09g047-canfd # RZ/G3E
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reg:
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maxItems: 1
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interrupts:
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oneOf:
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- items:
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- description: Channel interrupt
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- description: Global interrupt
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- items:
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- description: CAN global error interrupt
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- description: CAN receive FIFO interrupt
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- description: CAN0 error interrupt
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- description: CAN0 transmit interrupt
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- description: CAN0 transmit/receive FIFO receive completion interrupt
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- description: CAN1 error interrupt
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- description: CAN1 transmit interrupt
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- description: CAN1 transmit/receive FIFO receive completion interrupt
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- description: CAN2 error interrupt
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- description: CAN2 transmit interrupt
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- description: CAN2 transmit/receive FIFO receive completion interrupt
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- description: CAN3 error interrupt
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- description: CAN3 transmit interrupt
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- description: CAN3 transmit/receive FIFO receive completion interrupt
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- description: CAN4 error interrupt
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- description: CAN4 transmit interrupt
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- description: CAN4 transmit/receive FIFO receive completion interrupt
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- description: CAN5 error interrupt
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- description: CAN5 transmit interrupt
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- description: CAN5 transmit/receive FIFO receive completion interrupt
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minItems: 8
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interrupt-names:
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oneOf:
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- items:
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- const: ch_int
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- const: g_int
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- items:
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- const: g_err
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- const: g_recc
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- const: ch0_err
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- const: ch0_rec
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- const: ch0_trx
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- const: ch1_err
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- const: ch1_rec
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- const: ch1_trx
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- const: ch2_err
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- const: ch2_rec
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- const: ch2_trx
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- const: ch3_err
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- const: ch3_rec
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- const: ch3_trx
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- const: ch4_err
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- const: ch4_rec
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- const: ch4_trx
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- const: ch5_err
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- const: ch5_rec
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- const: ch5_trx
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minItems: 8
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clocks:
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maxItems: 3
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clock-names:
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oneOf:
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- items:
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- const: fck
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- const: canfd
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- const: can_clk
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- items:
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- const: fck
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- const: ram_clk
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- const: can_clk
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power-domains:
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maxItems: 1
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resets: true
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renesas,no-can-fd:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The controller can operate in either CAN FD only mode (default) or
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Classical CAN only mode. The mode is global to all channels.
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Specify this property to put the controller in Classical CAN only mode.
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assigned-clocks:
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description:
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Reference to the CANFD clock. The CANFD clock is a div6 clock and can be
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used by both CAN (if present) and CAN FD controllers at the same time.
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It needs to be scaled to maximum frequency if any of these controllers
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use it.
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assigned-clock-rates:
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description: Maximum frequency of the CANFD clock.
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patternProperties:
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"^channel[0-7]$":
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type: object
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description:
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The controller supports multiple channels and each is represented as a
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child node. Each channel can be enabled/disabled individually.
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properties:
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phys:
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maxItems: 1
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additionalProperties: false
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- power-domains
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- resets
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- assigned-clocks
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- assigned-clock-rates
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- channel0
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- channel1
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allOf:
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- $ref: can-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rzg2l-canfd
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then:
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properties:
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interrupts:
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maxItems: 8
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interrupt-names:
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maxItems: 8
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resets:
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minItems: 2
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maxItems: 2
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reset-names:
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minItems: 2
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maxItems: 2
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required:
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- reset-names
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rcar-gen3-canfd
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- renesas,rcar-gen4-canfd
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then:
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properties:
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interrupts:
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minItems: 2
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maxItems: 2
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interrupt-names:
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minItems: 2
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maxItems: 2
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resets:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r9a09g047-canfd
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then:
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properties:
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interrupts:
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minItems: 20
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interrupt-names:
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minItems: 20
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resets:
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minItems: 2
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maxItems: 2
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reset-names:
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minItems: 2
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maxItems: 2
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required:
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- reset-names
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rcar-gen3-canfd
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- renesas,rzg2l-canfd
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then:
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patternProperties:
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"^channel[2-7]$": false
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r8a779h0-canfd
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then:
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patternProperties:
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"^channel[4-7]$": false
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r9a09g047-canfd
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then:
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patternProperties:
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"^channel[6-7]$": false
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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canfd: can@e66c0000 {
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compatible = "renesas,r8a7795-canfd",
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"renesas,rcar-gen3-canfd";
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reg = <0xe66c0000 0x8000>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "ch_int", "g_int";
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clocks = <&cpg CPG_MOD 914>,
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<&cpg CPG_CORE R8A7795_CLK_CANFD>,
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<&can_clk>;
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clock-names = "fck", "canfd", "can_clk";
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assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
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assigned-clock-rates = <40000000>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 914>;
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channel0 {
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};
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channel1 {
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};
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};
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