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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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94e4fc4004
Add rockchip,rk3562-saradc compatible string. The saradc on rk3562 is v2 controller, with 10bit width which is different with rk3588. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227110343.2342017-1-kever.yang@rock-chips.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
89 lines
2.0 KiB
YAML
89 lines
2.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip Successive Approximation Register (SAR) A/D Converter
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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oneOf:
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- const: rockchip,saradc
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- const: rockchip,rk3066-tsadc
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- const: rockchip,rk3399-saradc
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- const: rockchip,rk3528-saradc
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- const: rockchip,rk3562-saradc
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- const: rockchip,rk3588-saradc
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- items:
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- const: rockchip,rk3576-saradc
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- const: rockchip,rk3588-saradc
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- items:
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- enum:
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- rockchip,px30-saradc
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- rockchip,rk3308-saradc
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- rockchip,rk3328-saradc
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- rockchip,rk3568-saradc
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- rockchip,rv1108-saradc
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- rockchip,rv1126-saradc
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- const: rockchip,rk3399-saradc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: converter clock
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- description: peripheral clock
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clock-names:
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items:
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- const: saradc
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- const: apb_pclk
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resets:
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maxItems: 1
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reset-names:
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const: saradc-apb
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vref-supply:
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description:
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The regulator supply for the ADC reference voltage.
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"#io-channel-cells":
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- vref-supply
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- "#io-channel-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3288-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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saradc: saradc@2006c000 {
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compatible = "rockchip,saradc";
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reg = <0x2006c000 0x100>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
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clock-names = "saradc", "apb_pclk";
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resets = <&cru SRST_SARADC>;
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reset-names = "saradc-apb";
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vref-supply = <&vcc18>;
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#io-channel-cells = <1>;
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};
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