Commit Graph

7407 Commits

Author SHA1 Message Date
Matthijs Kooijman
b5fe46efc1 pinctrl: single: Fix PIN_CONFIG_BIAS_DISABLE handling
The pinctrl-single driver handles pin_config_set by looking up the
requested setting in a DT-defined lookup table, which defines what bits
correspond to each setting. There is no way to add
PIN_CONFIG_BIAS_DISABLE entries to the table, since there is instead
code to disable the bias by applying the disable values of both the
pullup and pulldown entries in the table.

However, this code is inside the table-lookup loop, so it would only
execute if there is an entry for PIN_CONFIG_BIAS_DISABLE in the table,
which can never exist, so this code never runs.

This commit lifts the offending code out of the loop, so it just
executes directly whenever PIN_CONFIG_BIAS_DISABLE is requested,
skippipng the table lookup loop.

This also introduces a new `param` variable to make the code slightly
more readable.

This bug seems to have existed when this code was first merged in commit
9dddb4df90 ("pinctrl: single: support generic pinconf"). Earlier
versions of this patch did have an entry for PIN_CONFIG_BIAS_DISABLE in
the lookup table, but that was removed, which is probably how this bug
was introduced.

Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Message-ID: <20240319110633.230329-1-matthijs@stdin.nl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 21:03:25 +02:00
Christophe JAILLET
a95e2bc817 pinctrl: pinctrl-single: Remove some unused fields in struct pcs_function
In "struct pcs_function", the 'pgnames' and 'npgnames' fields are unused.
This is a left-over from commit 571aec4df5 ("pinctrl: single: Use generic
pinmux helpers for managing functions");

Remove them.

Found with cppcheck, unusedStructMember.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Message-ID: <a6b653642298d35b1e3656e9bfc6d1b322fbbe68.1712004518.git.christophe.jaillet@wanadoo.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 21:03:25 +02:00
Christophe JAILLET
922c86f8d3 pinctrl: max77620: Remove an unused fields in struct max77620_pin_info and max77620_pctrl_info
In "struct max77620_pin_info", the 'pull_config' field is unused.
In "struct max77620_pctrl_info", the 'pins_current_opt' field is unused.

Remove them.

On my x86_64 config, with allmodconfig, this shrinks the struct
max77620_pctrl_info from 360 bytes to 296.

Found with cppcheck, unusedStructMember.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Message-ID: <60af8968864ae4a83a76e589b39a2b1e1f65c9db.1711992588.git.christophe.jaillet@wanadoo.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 21:03:25 +02:00
Chen-Yu Tsai
c5d3b64c56 pinctrl: mediatek: paris: Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLE
There is a misinterpretation of some of the PIN_CONFIG_* options in this
driver library. PIN_CONFIG_OUTPUT_ENABLE should refer to a buffer or
switch in the output direction of the electrical path. The MediaTek
hardware does not have such a thing. The driver incorrectly maps this
option to the GPIO function's direction.

Likewise, PIN_CONFIG_INPUT_ENABLE should refer to a buffer or switch in
the input direction. The hardware does have such a mechanism, and is
mapped to the IES bit. The driver however sets the direction in addition
to the IES bit, which is incorrect. On readback, the IES bit isn't even
considered.

Ironically, the driver does not support readback for PIN_CONFIG_OUTPUT,
while its readback of PIN_CONFIG_{INPUT,OUTPUT}_ENABLE is what it should
be doing for PIN_CONFIG_OUTPUT.

Rework support for these three options, so that PIN_CONFIG_OUTPUT_ENABLE
is completely removed, PIN_CONFIG_INPUT_ENABLE is only linked to the IES
bit, and PIN_CONFIG_OUTPUT is linked to the GPIO function's direction
and output level.

Fixes: 805250982b ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Message-ID: <20240327091336.3434141-3-wenst@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 15:27:35 +02:00
Chen-Yu Tsai
08f66a8edd pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readback
In the generic pin config library, readback of some options are handled
differently compared to the setting of those options: the argument value
is used to convey enable/disable of an option in the set path, but
success or -EINVAL is used to convey if an option is enabled or disabled
in the debugfs readback path.

PIN_CONFIG_INPUT_SCHMITT_ENABLE is one such option. Fix the readback of
the option in the mediatek-paris library, so that the debugfs dump is
not showing "input schmitt enabled" for pins that don't have it enabled.

Fixes: 1bea6afbc8 ("pinctrl: mediatek: Refine mtk_pinconf_get()")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Message-ID: <20240327091336.3434141-2-wenst@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 15:27:18 +02:00
Krzysztof Kozlowski
e798845d68 pinctrl: sunxi: sun9i-a80-r: drop driver owner assignment
Core in platform_driver_register() already sets the .owner, so driver
does not need to.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Message-ID: <20240330210954.100842-1-krzysztof.kozlowski@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:39:47 +02:00
Andy Shevchenko
4aad0ad20f pinctrl: aw9523: Fix indentation in a few places
In the comment, function prototype, and array of strings indentation
is kinda broken. Reindent that.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-11-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
7b8b9b5450 pinctrl: aw9523: Sort headers and group pinctrl/*
One header was misplaced and group pinctrl/* ones to show the relation
with the pin control subsystem.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-10-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
c567b00cc3 pinctrl: aw9523: Make use of dev_err_probe()
Simplify the error handling in probe function by switching from
dev_err() to dev_err_probe().

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-9-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
6bf270863a pinctrl: aw9523: Remove unused irqchip field in struct aw9523_irq
The irqchip field is allocated, assigned but never used. Remove it.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-8-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
4210ef801a pinctrl: aw9523: Get rid of redundant ' & U8_MAX' pieces
When the variable is declared as u8, no need to perform ' & U8_MAX'
as it's implied anyway.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-7-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
66413f0468 pinctrl: aw9523: Use temporary variable for HW IRQ number
There are two different ways on how to get HW IRQ number in some functions.
Unify that by using temporary variable and irqd_to_hwirq() call.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-6-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
418ee9488f pinctrl: aw9523: Make use of struct pinfunction and PINCTRL_PINFUNCTION()
Since pin control provides a generic data type and a macro for
the pin function definition, use them in the driver.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-5-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
091655b928 pinctrl: aw9523: Always try both ports in aw9523_gpio_set_multiple()
The ports are equivalent from the user's point of view. Don't limit
trying them both if writing to one fails.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-4-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
f91eafcb18 pinctrl: aw9523: Use correct error code for not supported functionality
The pin control subsystem internally uses ENOTSUPP for the not supported
functionality. The checkpatch is false positive about this error code.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-3-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:46 +02:00
Andy Shevchenko
e5e8a58023 pinctrl: aw9523: Destroy mutex on ->remove()
If aw9523_hw_init() fails on ->remove() the mutex left alive.
Destroy it in that case as well. While at it, remove never
true check at the beginning of the function.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Message-ID: <20240329105634.712457-2-andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04 13:16:45 +02:00
Arnd Bergmann
d303735ce5 pinctrl: armada-37xx: remove an unused variable
This variable has never been used and can be removed to avoid a W=1 warning:

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:837:6: error: variable 'i' set but not used [-Werror,-Wunused-but-set-variable]
  837 |         int i = 0;

Fixes: 87466ccd94 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Message-ID: <20240322132205.906729-1-arnd@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-02 14:27:13 +02:00
Linus Torvalds
7e40c2100c Kbuild fixes for v6.9
- Deduplicate Kconfig entries for CONFIG_CXL_PMU
 
  - Fix unselectable choice entry in MIPS Kconfig, and forbid this
    structure
 
  - Remove unused include/asm-generic/export.h
 
  - Fix a NULL pointer dereference bug in modpost
 
  - Enable -Woverride-init warning consistently with W=1
 
  - Drop KCSAN flags from *.mod.c files
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Merge tag 'kbuild-fixes-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild

Pull Kbuild fixes from Masahiro Yamada:

 - Deduplicate Kconfig entries for CONFIG_CXL_PMU

 - Fix unselectable choice entry in MIPS Kconfig, and forbid this
   structure

 - Remove unused include/asm-generic/export.h

 - Fix a NULL pointer dereference bug in modpost

 - Enable -Woverride-init warning consistently with W=1

 - Drop KCSAN flags from *.mod.c files

* tag 'kbuild-fixes-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
  kconfig: Fix typo HEIGTH to HEIGHT
  Documentation/llvm: Note s390 LLVM=1 support with LLVM 18.1.0 and newer
  kbuild: Disable KCSAN for autogenerated *.mod.c intermediaries
  kbuild: make -Woverride-init warnings more consistent
  modpost: do not make find_tosym() return NULL
  export.h: remove include/asm-generic/export.h
  kconfig: do not reparent the menu inside a choice block
  MIPS: move unselectable FIT_IMAGE_FDT_EPM5 out of the "System type" choice
  cxl: remove CONFIG_CXL_PMU entry in drivers/cxl/Kconfig
2024-03-31 11:23:51 -07:00
Arnd Bergmann
c40845e319 kbuild: make -Woverride-init warnings more consistent
The -Woverride-init warn about code that may be intentional or not,
but the inintentional ones tend to be real bugs, so there is a bit of
disagreement on whether this warning option should be enabled by default
and we have multiple settings in scripts/Makefile.extrawarn as well as
individual subsystems.

Older versions of clang only supported -Wno-initializer-overrides with
the same meaning as gcc's -Woverride-init, though all supported versions
now work with both. Because of this difference, an earlier cleanup of
mine accidentally turned the clang warning off for W=1 builds and only
left it on for W=2, while it's still enabled for gcc with W=1.

There is also one driver that only turns the warning off for newer
versions of gcc but not other compilers, and some but not all the
Makefiles still use a cc-disable-warning conditional that is no
longer needed with supported compilers here.

Address all of the above by removing the special cases for clang
and always turning the warning off unconditionally where it got
in the way, using the syntax that is supported by both compilers.

Fixes: 2cd3271b7a ("kbuild: avoid duplicate warning options")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2024-03-31 11:32:26 +09:00
Dan Carpenter
5038a66dad pinctrl: core: delete incorrect free in pinctrl_enable()
The "pctldev" struct is allocated in devm_pinctrl_register_and_init().
It's a devm_ managed pointer that is freed by devm_pinctrl_dev_release(),
so freeing it in pinctrl_enable() will lead to a double free.

The devm_pinctrl_dev_release() function frees the pindescs and destroys
the mutex as well.

Fixes: 6118714275 ("pinctrl: core: Fix pinctrl_register_and_init() with pinctrl_enable()")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Message-ID: <578fbe56-44e9-487c-ae95-29b695650f7c@moroto.mountain>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-29 00:04:16 +01:00
Thomas Richard
85dfe45837 pinctrl: pinctrl-single: move suspend()/resume() callbacks to noirq
The goal is to extend the active period of pinctrl.
Some devices may need active pinctrl after suspend() and/or before
resume().
So move suspend()/resume() to suspend_noirq()/resume_noirq() in order to
have active pinctrl until suspend_noirq() (included), and from
resume_noirq() (included).

The deprecated API has been removed to use the new one (dev_pm_ops struct).

No need to check the pointer returned by dev_get_drvdata(), as
platform_set_drvdata() is called during the probe.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Message-ID: <20240102-j7200-pcie-s2r-v4-2-6f1f53390c85@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 22:05:31 +01:00
Jan Dakinevich
368a90e651 pinctrl/meson: fix typo in PDM's pin name
Other pins have _a or _x suffix, but this one doesn't have any. Most
likely this is a typo.

Fixes: dabad1ff85 ("pinctrl: meson: add pinctrl driver support for Meson-A1 SoC")
Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Message-ID: <20240325113058.248022-1-jan.dakinevich@salutedevices.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 10:42:41 +01:00
Anjelique Melendez
b5658c7ab9 pinctrl: qcom: spmi-gpio: Add PMIH0108 and PMD8028 support
Add support for qcom,pmih0108-gpio and qcom,pmd8028-gpio.

Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Message-ID: <20240326220628.2392802-5-quic_amelende@quicinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 10:25:11 +01:00
Anjelique Melendez
e5c7b013cb pinctrl: qcom: spmi-gpio: Add PMXR2230 and PM6450 support
Add support for qcom,pmxr2230-gpio and qcom,pm6450-gpio.

Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Message-ID: <20240326220628.2392802-4-quic_amelende@quicinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 10:25:11 +01:00
Billy Tsai
c10cd03d69 pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T
The register offset to disable the internal pull-down of GPIOR~T is 0x630
instead of 0x620, as specified in the Ast2600 datasheet v15
The datasheet can download from the official Aspeed website.

Fixes: 15711ba6ff ("pinctrl: aspeed-g6: Add AST2600 pinconf support")
Reported-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Message-ID: <20240313092809.2596644-1-billy_tsai@aspeedtech.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 10:15:15 +01:00
Stefan Wahren
d54e4cda29 pinctrl: bcm2835: Implement bcm2711_pinconf_get
The BCM2711 allows to read the bias config. So implement pin_conf_get
accordingly. The pull resistor values has been taken from the
BCM2711/7211 datasheet.

This implementation assumes that BCM7211 behaves the same way.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Message-ID: <20240307070113.4888-3-wahrenst@gmx.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 09:52:25 +01:00
Stefan Wahren
85b02bc078 pinctrl: bcm2835: Implement bcm2835_pinconf_get
Even the driver already has implemented pin_dbg_show, it could
be helpful to implement pin_conf_get for a more generic behavior.
Contrary to the BCM2711, the BCM2835 SOC doesn't allow to read
the bias config, so the implementation is limited to the basics.

Keep ENOTSUPP here, because it's only used internally.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Message-ID: <20240307070113.4888-2-wahrenst@gmx.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 09:52:25 +01:00
Andy Shevchenko
76c22f0941 pinctrl: pxa2xx: Make use of struct pingroup
Since pin control provides a generic data type for the pin group,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Message-ID: <20240311142346.1261203-1-andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 09:44:20 +01:00
Andy Shevchenko
ea217fefef pinctrl: pxa2xx: Make use of struct pinfunction
Since pin control provides a generic data type for the pin function,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Message-ID: <20240311140833.1168742-1-andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-28 09:43:28 +01:00
Claudiu Beznea
aa43c15a79 pinctrl: renesas: rzg2l: Execute atomically the interrupt configuration
Lockdep detects a possible deadlock as listed below. This is because it
detects the IA55 interrupt controller .irq_eoi() API is called from
interrupt context while configuration-specific API (e.g., .irq_enable())
could be called from process context on resume path (by calling
rzg2l_gpio_irq_restore()). To avoid this, protect the call of
rzg2l_gpio_irq_enable() with spin_lock_irqsave()/spin_unlock_irqrestore().
With this the same approach that is available in __setup_irq() is mimicked
to pinctrl IRQ resume function.

Below is the lockdep report:

    WARNING: inconsistent lock state
    6.8.0-rc5-next-20240219-arm64-renesas-00030-gb17a289abf1f #90 Not tainted
    --------------------------------
    inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage.
    str_rwdt_t_001./159 [HC0[0]:SC0[0]:HE1:SE1] takes:
    ffff00000b001d70 (&rzg2l_irqc_data->lock){?...}-{2:2}, at: rzg2l_irqc_irq_enable+0x60/0xa4
    {IN-HARDIRQ-W} state was registered at:
    lock_acquire+0x1e0/0x310
    _raw_spin_lock+0x44/0x58
    rzg2l_irqc_eoi+0x2c/0x130
    irq_chip_eoi_parent+0x18/0x20
    rzg2l_gpio_irqc_eoi+0xc/0x14
    handle_fasteoi_irq+0x134/0x230
    generic_handle_domain_irq+0x28/0x3c
    gic_handle_irq+0x4c/0xbc
    call_on_irq_stack+0x24/0x34
    do_interrupt_handler+0x78/0x7c
    el1_interrupt+0x30/0x5c
    el1h_64_irq_handler+0x14/0x1c
    el1h_64_irq+0x64/0x68
    _raw_spin_unlock_irqrestore+0x34/0x70
    __setup_irq+0x4d4/0x6b8
    request_threaded_irq+0xe8/0x1a0
    request_any_context_irq+0x60/0xb8
    devm_request_any_context_irq+0x74/0x104
    gpio_keys_probe+0x374/0xb08
    platform_probe+0x64/0xcc
    really_probe+0x140/0x2ac
    __driver_probe_device+0x74/0x124
    driver_probe_device+0x3c/0x15c
    __driver_attach+0xec/0x1c4
    bus_for_each_dev+0x70/0xcc
    driver_attach+0x20/0x28
    bus_add_driver+0xdc/0x1d0
    driver_register+0x5c/0x118
    __platform_driver_register+0x24/0x2c
    gpio_keys_init+0x18/0x20
    do_one_initcall+0x70/0x290
    kernel_init_freeable+0x294/0x504
    kernel_init+0x20/0x1cc
    ret_from_fork+0x10/0x20
    irq event stamp: 69071
    hardirqs last enabled at (69071): [<ffff800080e0dafc>] _raw_spin_unlock_irqrestore+0x6c/0x70
    hardirqs last disabled at (69070): [<ffff800080e0cfec>] _raw_spin_lock_irqsave+0x7c/0x80
    softirqs last enabled at (67654): [<ffff800080010614>] __do_softirq+0x494/0x4dc
    softirqs last disabled at (67645): [<ffff800080015238>] ____do_softirq+0xc/0x14

    other info that might help us debug this:
    Possible unsafe locking scenario:

    CPU0
    ----
    lock(&rzg2l_irqc_data->lock);
    <Interrupt>
    lock(&rzg2l_irqc_data->lock);

    *** DEADLOCK ***

    4 locks held by str_rwdt_t_001./159:
    #0: ffff00000b10f3f0 (sb_writers#4){.+.+}-{0:0}, at: vfs_write+0x1a4/0x35c
    #1: ffff00000e43ba88 (&of->mutex){+.+.}-{3:3}, at: kernfs_fop_write_iter+0xe8/0x1a8
    #2: ffff00000aa21dc8 (kn->active#40){.+.+}-{0:0}, at: kernfs_fop_write_iter+0xf0/0x1a8
    #3: ffff80008179d970 (system_transition_mutex){+.+.}-{3:3}, at: pm_suspend+0x9c/0x278

    stack backtrace:
    CPU: 0 PID: 159 Comm: str_rwdt_t_001. Not tainted 6.8.0-rc5-next-20240219-arm64-renesas-00030-gb17a289abf1f #90
    Hardware name: Renesas SMARC EVK version 2 based on r9a08g045s33 (DT)
    Call trace:
    dump_backtrace+0x94/0xe8
    show_stack+0x14/0x1c
    dump_stack_lvl+0x88/0xc4
    dump_stack+0x14/0x1c
    print_usage_bug.part.0+0x294/0x348
    mark_lock+0x6b0/0x948
    __lock_acquire+0x750/0x20b0
    lock_acquire+0x1e0/0x310
    _raw_spin_lock+0x44/0x58
    rzg2l_irqc_irq_enable+0x60/0xa4
    irq_chip_enable_parent+0x1c/0x34
    rzg2l_gpio_irq_enable+0xc4/0xd8
    rzg2l_pinctrl_resume_noirq+0x4cc/0x520
    pm_generic_resume_noirq+0x28/0x3c
    genpd_finish_resume+0xc0/0xdc
    genpd_resume_noirq+0x14/0x1c
    dpm_run_callback+0x34/0x90
    device_resume_noirq+0xa8/0x268
    dpm_noirq_resume_devices+0x13c/0x160
    dpm_resume_noirq+0xc/0x1c
    suspend_devices_and_enter+0x2c8/0x570
    pm_suspend+0x1ac/0x278
    state_store+0x88/0x124
    kobj_attr_store+0x14/0x24
    sysfs_kf_write+0x48/0x6c
    kernfs_fop_write_iter+0x118/0x1a8
    vfs_write+0x270/0x35c
    ksys_write+0x64/0xec
    __arm64_sys_write+0x18/0x20
    invoke_syscall+0x44/0x108
    el0_svc_common.constprop.0+0xb4/0xd4
    do_el0_svc+0x18/0x20
    el0_svc+0x3c/0xb8
    el0t_64_sync_handler+0xb8/0xbc
    el0t_64_sync+0x14c/0x150

Fixes: 254203f9a9 ("pinctrl: renesas: rzg2l: Add suspend/resume support")
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240320104230.446400-2-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-03-26 09:42:37 +01:00
Rafael J. Wysocki
c2ddeb2961 genirq: Introduce IRQF_COND_ONESHOT and use it in pinctrl-amd
There is a problem when a driver requests a shared interrupt line to run a
threaded handler on it without IRQF_ONESHOT set if that flag has been set
already for the IRQ in question by somebody else.  Namely, the request
fails which usually leads to a probe failure even though the driver might
have worked just fine with IRQF_ONESHOT, but it does not want to use it by
default.  Currently, the only way to handle this is to try to request the
IRQ without IRQF_ONESHOT, but with IRQF_PROBE_SHARED set and if this fails,
try again with IRQF_ONESHOT set.  However, this is a bit cumbersome and not
very clean.

When commit 7a36b901a6 ("ACPI: OSL: Use a threaded interrupt handler for
SCI") switched the ACPI subsystem over to using a threaded interrupt
handler for the SCI, it had to use IRQF_ONESHOT for it because that's
required due to the way the SCI handler works (it needs to walk all of the
enabled GPEs before the interrupt line can be unmasked). The SCI interrupt
line is not shared with other users very often due to the SCI handling
overhead, but on sone systems it is shared and when the other user of it
attempts to install a threaded handler, a flags mismatch related to
IRQF_ONESHOT may occur.

As it turned out, that happened to the pinctrl-amd driver and so commit
4451e8e841 ("pinctrl: amd: Add IRQF_ONESHOT to the interrupt request")
attempted to address the issue by adding IRQF_ONESHOT to the interrupt
flags in that driver, but this is now causing an IRQF_ONESHOT-related
mismatch to occur on another system which cannot boot as a result of it.

Clearly, pinctrl-amd can work with IRQF_ONESHOT if need be, but it should
not set that flag by default, so it needs a way to indicate that to the
interrupt subsystem.

To that end, introdcuce a new interrupt flag, IRQF_COND_ONESHOT, which will
only have effect when the IRQ line is shared and IRQF_ONESHOT has been set
for it already, in which case it will be promoted to the latter.

This is sufficient for drivers sharing the interrupt line with the SCI as
it is requested by the ACPI subsystem before any drivers are probed, so
they will always see IRQF_ONESHOT set for the interrupt in question.

Fixes: 4451e8e841 ("pinctrl: amd: Add IRQF_ONESHOT to the interrupt request")
Reported-by: Francisco Ayala Le Brun <francisco@videowindow.eu>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: 6.8+ <stable@vger.kernel.org> # 6.8+
Closes: https://lore.kernel.org/lkml/CAN-StX1HqWqi+YW=t+V52-38Mfp5fAz7YHx4aH-CQjgyNiKx3g@mail.gmail.com/
Link: https://lore.kernel.org/r/12417336.O9o76ZdvQC@kreacher
2024-03-25 23:45:21 +01:00
Linus Torvalds
90a498f294 phy-for-6.9
- New Support
   - Qualcomm X1E80100 PCIe phy support, SM8550 PCIe1 PHY, SC7180 UFS PHY
     and SDM630 USBC support
   - Rockchip HDMI/eDP Combo PHY driver
   - Mediatek MT8365 CSI phy driver
 
 - Updates
   - Rework on Qualcomm phy PCS registers and type-c handling
   - Cadence torrent phy updates for multilink configuration
   - TI gmii resume support
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Merge tag 'phy-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
 "New hardware support:

   - Qualcomm X1E80100 PCIe phy support, SM8550 PCIe1 PHY, SC7180 UFS
     PHY and SDM630 USBC support

   - Rockchip HDMI/eDP Combo PHY driver

   - Mediatek MT8365 CSI phy driver

  Updates:

   - Rework on Qualcomm phy PCS registers and type-c handling

   - Cadence torrent phy updates for multilink configuration

   - TI gmii resume support"

* tag 'phy-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (41 commits)
  phy: constify of_phandle_args in xlate
  phy: ti: tusb1210: Define device IDs
  phy: ti: tusb1210: Use temporary variable for struct device
  phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver
  dt-bindings: phy: Add Rockchip HDMI/eDP Combo PHY schema
  phy: ti: gmii-sel: add resume support
  phy: mtk-mipi-csi: add driver for CSI phy
  dt-bindings: phy: add mediatek MIPI CD-PHY module v0.5
  phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200
  dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200
  phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink configuration
  phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration
  dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1
  phy: qcom-qmp-ufs: Switch to devm_clk_bulk_get_all() API
  dt-bindings: phy: qmp-ufs: Fix PHY clocks
  phy: qcom: sgmii-eth: move PCS registers to separate header
  phy: qcom: sgmii-eth: use existing register definitions
  phy: qcom: qmp-usbc: drop has_pwrdn_delay handling
  phy: qcom: qmp: move common bits definitions to common header
  phy: qcom: qmp: split DP PHY registers to separate headers
  ...
2024-03-16 11:24:51 -07:00
Linus Torvalds
a3df5d5422 Pin control changes for the v6.9 kernel cycle:
No core changes this time around.
 
 New drivers:
 
 - New driver for Renesas R8A779H0 also known as R-Car V4M.
 
 - New driver for the Awinic AW9523/B I2C GPIO expander.
   I found this living out-of-tree in OpenWrt as an upstream
   attempt had stalled on the finishing line, so I picked it
   up and finished the job.
 
 Improvements:
 
 - The Nomadik pin control driver was for years re-used out of
   tree for the ST STA chips, and now the IP was re-used in a
   MIPS automotive SoC called MobilEyeq5, so it has been split
   in pin control and GPIO drivers so the latter can be reused
   by MobilEyeq5. (Along with a long list of cleanups.)
 
 - A lot of overall cleanup and tidying up.
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Merge tag 'pinctrl-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No core changes this time around.

  New drivers:

   - New driver for Renesas R8A779H0 also known as R-Car V4M.

   - New driver for the Awinic AW9523/B I2C GPIO expander. I found this
     living out-of-tree in OpenWrt as an upstream attempt had stalled on
     the finishing line, so I picked it up and finished the job.

  Improvements:

   - The Nomadik pin control driver was for years re-used out of tree
     for the ST STA chips, and now the IP was re-used in a MIPS
     automotive SoC called MobilEyeq5, so it has been split in pin
     control and GPIO drivers so the latter can be reused by MobilEyeq5.
     (Along with a long list of cleanups)

   - A lot of overall cleanup and tidying up"

* tag 'pinctrl-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (87 commits)
  drivers/gpio/nomadik: move dummy nmk_gpio_dbg_show_one() to header
  gpio: nomadik: remove BUG_ON() in nmk_gpio_populate_chip()
  dt-bindings: pinctrl: qcom: update compatible name for match with driver
  pinctrl: aw9523: Make the driver tristate
  pinctrl: nomadik: fix dereference of error pointer
  gpio: nomadik: Back out some managed resources
  pinctrl: aw9523: Add proper terminator
  pinctrl: core: comment that pinctrl_add_gpio_range() is deprecated
  pinctrl: pinmux: Suppress error message for -EPROBE_DEFER
  pinctrl: Add driver for Awinic AW9523/B I2C GPIO Expander
  dt-bindings: pinctrl: Add bindings for Awinic AW9523/AW9523B
  gpio: nomadik: Finish conversion to use firmware node APIs
  gpio: nomadik: fix Kconfig dependencies inbetween pinctrl & GPIO
  pinctrl: da9062: Add OF table
  dt-bindings: pinctrl: at91: add sam9x7
  pinctrl: ocelot: remove redundant assignment to variable ret
  gpio: nomadik: grab optional reset control and deassert it at probe
  gpio: nomadik: support mobileye,eyeq5-gpio
  gpio: nomadik: handle variadic GPIO count
  gpio: nomadik: support shared GPIO IRQs
  ...
2024-03-14 10:22:26 -07:00
Linus Torvalds
aeb152910a pwm: Changes for v6.9-rc1
This contains the usual amount of driver and device tree changes.
 Additionally there is a big rework of how pwm lowlevel drivers are
 registered to prepare adding character device support.
 
 Thanks to Dharma Balasubiramani, Dong Aisheng, Duje Mihanović, Jerome
 Brunet, Raag Jadav and Rafał Miłecki for their contributions. And sorry
 for those who still need some patience because I didn't manage to empty
 my review queue.
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Merge tag 'pwm/for-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux

Pull pwm updates from Uwe Kleine-König:
 "This contains the usual amount of driver and device tree changes.
  Additionally there is a big rework of how pwm lowlevel drivers are
  registered to prepare adding character device support.

  Thanks to Dharma Balasubiramani, Dong Aisheng, Duje Mihanović, Jerome
  Brunet, Raag Jadav and Rafał Miłecki for their contributions. And
  sorry for those who still need some patience because I didn't manage
  to empty my review queue"

* tag 'pwm/for-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux: (185 commits)
  pwm: imx-tpm: fix probe crash due to access registers without clock
  pwm: meson: generalize 4 inputs clock on meson8 pwm type
  dt-bindings: pwm: amlogic: Add a new binding for meson8 pwm types
  dt-bindings: pwm: amlogic: fix s4 bindings
  pwm: dwc: simplify error handling
  pwm: dwc: Add 16 channel support for Intel Elkhart Lake
  pwm: dwc: drop redundant error check
  staging: greybus: pwm: Make use of devm_pwmchip_alloc() function
  staging: greybus: pwm: Rework how the number of PWM lines is determined
  staging: greybus: pwm: Drop unused gb_connection_set_data()
  staging: greybus: pwm: Rely on pwm framework to pass a valid hwpwm
  staging: greybus: pwm: Make use of pwmchip_parent() accessor
  staging: greybus: pwm: Change prototype of helpers to prepare further changes
  leds: qcom-lpg: Make use of devm_pwmchip_alloc() function
  drm/bridge: ti-sn65dsi86: Make use of devm_pwmchip_alloc() function
  drm/bridge: ti-sn65dsi86: Make use of pwmchip_parent() accessor
  gpio: mvebu: Make use of devm_pwmchip_alloc() function
  pwm: xilinx: Make use of devm_pwmchip_alloc() function
  pwm: xilinx: Prepare removing pwm_chip from driver data
  pwm: vt8500: Make use of devm_pwmchip_alloc() function
  ...
2024-03-13 10:51:39 -07:00
Linus Walleij
d295ad7ef0 pinctrl: aw9523: Make the driver tristate
The AW9523 driver fails to build in some allmod configs since the
I2C core can be a module, but AW9523 can not. Fix it up by allowing
AW9523 to be a module (tristate).

Fixes: 576623d706 ("pinctrl: Add driver for Awinic AW9523/B I2C GPIO Expander")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202403050916.KBtE6eEj-lkp@intel.com/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240305-fix-aw9523-v2-1-2dc50bab2b17@linaro.org
2024-03-07 23:09:01 +01:00
Linus Walleij
64df5ea971 Merge branch 'ib-nomadik-gpio' into devel 2024-03-07 09:08:57 +01:00
Théo Lebrun
a0c807b5b6 pinctrl: nomadik: fix dereference of error pointer
If nmk_gpio_populate_chip() returns an error, avoid deferencing its
return value.

Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/linux-gpio/5ee722f8-7582-420d-8477-45be6acde90f@moroto.mountain/
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240306-mbly-gpio-err-fix-v1-1-a3605ba2336f@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-06 20:47:14 +01:00
Linus Walleij
52279c3d50 pinctrl: aw9523: Add proper terminator
The of_device_id array needs to be terminated with a NULL
entry.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202403061147.85XYVsk3-lkp@intel.com/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240306-fix-aw9523-terminator-v1-1-13f90f87a7f6@linaro.org
2024-03-06 08:56:24 +01:00
Dan Carpenter
3ded216936 pinctrl: core: comment that pinctrl_add_gpio_range() is deprecated
The pinctrl_add_gpio_range() function is deprecated add a comment so
people don't accidentally use it in new code.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/533a7a10-c6eb-4ebe-adf1-f8dc95ae8d33@moroto.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-05 23:30:45 +01:00
Andre Przywara
4f74a3b307 pinctrl: pinmux: Suppress error message for -EPROBE_DEFER
EPROBE_DEFER error returns are not really critical, since they cancel
the probe process, but the kernel will return later and retry.
However, depending on the probe order, this might issue quite some
verbatim and scary, though pointless messages:

[    2.388731] 300b000.pinctrl: pin-224 (5000000.serial) status -517
[    2.397321] 300b000.pinctrl: could not request pin 224 (PH0) from group PH0  on device 300b000.pinctrl

Replace dev_err() with dev_err_probe(), which not only drops the
priority of the message from error to debug, but also puts some text
into debugfs' devices_deferred file, for later reference.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20240305143859.2449147-1-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-05 23:29:29 +01:00
AngeloGioacchino Del Regno
576623d706 pinctrl: Add driver for Awinic AW9523/B I2C GPIO Expander
The Awinic AW9523(B) is a multi-function I2C gpio expander in a
TQFN-24L package, featuring PWM (max 37mA per pin, or total max
power 3.2Watts) for LED driving capability.

It has two ports with 8 pins per port (for a total of 16 pins),
configurable as either PWM with 1/256 stepping or GPIO input/output,
1.8V logic input; each GPIO can be configured as input or output
independently from each other.

This IC also has an internal interrupt controller, which is capable
of generating an interrupt for each GPIO, depending on the
configuration, and will raise an interrupt on the INTN pin to
advertise this to an external interrupt controller.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: David Bauer <mail@david-bauer.net>
Link: https://lore.kernel.org/r/20210624214458.68716-2-mail@david-bauer.net
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240301-awinic-aw9523-v8-1-7ec572f5dfb4@linaro.org
2024-03-05 23:26:31 +01:00
Andy Shevchenko
caddc92c57 gpio: nomadik: Finish conversion to use firmware node APIs
Previously driver got a few updates in order to replace OF APIs by
respective firmware node, however it was not finished to the logical
end, e.g., some APIs that has been used are still require OF node
to be passed. Finish that job by converting leftovers to use firmware
node APIs.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240302173401.217830-1-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-03 09:43:10 +01:00
Théo Lebrun
b824f841a4 gpio: nomadik: fix Kconfig dependencies inbetween pinctrl & GPIO
PINCTRL_NOMADIK cannot select GPIO_NOMADIK without first selecting
GPIOLIB on which GPIO_NOMADIK depends. GPIO_NOMADIK depends on OF_GPIO,
it is a direct dependency.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202403010917.pnDhdS1Y-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202403011102.v8w2zPOU-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202403011329.1VnABMRz-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202403011546.Hpt8sBTa-lkp@intel.com/
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240301-mbly-gpio-kconfig-fix-v1-1-2785cebd475d@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-03-01 14:30:28 +01:00
Biju Das
26fea220ad pinctrl: da9062: Add OF table
Add OF table as per the binding so that driver get instantiated and
bind automatically when the driver is built as a module.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20240226191607.397386-1-biju.das.jz@bp.renesas.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 14:44:08 +01:00
Colin Ian King
170c96246f pinctrl: ocelot: remove redundant assignment to variable ret
The variable ret is being assigned a value that is never read, it
is being re-assigned a value in every case statement in the following
switch statement. The assignment is redundant and can be removed.

Cleans up clang scan build warning:
drivers/pinctrl/pinctrl-ocelot.c:1404:3: warning: Value stored to 'ret'
is never read [deadcode.DeadStores]

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Link: https://lore.kernel.org/r/20240223162850.3914349-1-colin.i.king@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 14:38:09 +01:00
Bartosz Golaszewski
f6443e0177 pinctrl: don't put the reference to GPIO device in pinctrl_pins_show()
The call to gpiod_to_gpio_device() does not increase the reference count
of the GPIO device struct so it must not be decreased. Remove the buggy
__free() decorator.

Fixes: 524fc108b8 ("pinctrl: stop using gpiod_to_chip()")
Reported-by: David Arcari <darcari@redhat.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20240223123214.288181-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 14:36:40 +01:00
Théo Lebrun
3c30cc26df gpio: nomadik: support mobileye,eyeq5-gpio
We create a custom compatible for the STA2X11 IP block as integrated
into the Mobileye EyeQ5 platform. Its wake and alternate functions have
been disabled, we want to avoid touching those registers.

We both do: (1) early return in functions that do not support the
platform, but with warnings, and (2) avoid calling those functions in
the first place.

We ensure that pinctrl-nomadik is not used with this STA2X11 variant.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-24-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:36:55 +01:00
Théo Lebrun
75d270fda6 gpio: nomadik: request dynamic ID allocation
Move away from statically allocated GPIO IDs. Switch to dynamic ID
allocation. Static IDs are deprecated because they cause issues when
multiple GPIO controllers are to be found on the same platform.

Add a bit of complexity to do pin number -> GPIO chip + offset.
Previously, bank number and offsets were retrieved using division and
remainder (bank size being constant 32). Now, to get the pin number
matching a bank base, we must know the sum of ngpios of previous banks.
This is done in find_nmk_gpio_from_pin() which also exposes the offset
inside the bank.

Also remove the assumption that bank sizes are constant. Instead of
using NMK_GPIO_PER_CHIP as bank size, use nmk_gpio_chips[i]->ngpio.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-19-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:32:39 +01:00
Théo Lebrun
cbb24db148 pinctrl: nomadik: follow conditional kernel coding conventions
Fix strict checkpatch warnings relative to if-else blocks and bool
expressions. Message types addressed:

   CHECK: Comparison to NULL could be written "!nmk_cfg_params[index].choice"
   CHECK: Unbalanced braces around else statement
   CHECK: Using comparison to false is error prone
   CHECK: Using comparison to true is error prone
   CHECK: braces {} should be used on all arms of this statement

Before: 0 errors, 1 warnings, 16 checks.
After:  0 errors, 1 warnings,  7 checks.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-13-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:28:21 +01:00
Théo Lebrun
8e48230d6d pinctrl: nomadik: follow whitespace kernel coding conventions
Fix strict checkpatch warnings relative to whitespace. Message types
addressed:

   ERROR: space required before the open parenthesis '('
   WARNING: quoted string split across lines
   CHECK: Alignment should match open parenthesis
   CHECK: Please don't use multiple blank lines
   CHECK: line length of 103 exceeds 100 columns
   CHECK: spaces preferred around that '+' (ctx:VxV)

Before: 1 errors, 2 warnings, 38 checks.
After:  0 errors, 1 warnings, 16 checks.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-12-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:27:39 +01:00
Théo Lebrun
1a656a80ea pinctrl: nomadik: follow type-system kernel coding conventions
Fix strict checkpatch warnings relative to types. Warning types
addressed:

   WARNING: do not add new typedefs
   WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
   WARNING: static const char * array should probably be static const
            char * const

Total messages before: 1 errors, 40 warnings, 39 checks.
Total messages after:  1 errors,  2 warnings, 38 checks.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-11-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:27:02 +01:00
Théo Lebrun
dfeaf5e7f3 pinctrl: nomadik: minimise indentation in probe
nmk_pinctrl_probe() iterates over each GPIO block. Use an early
conditional continue to skip to the next iteration rather than indent
all the loop code block.

Do not change code logic. The block is changed from:

	for (i = 0; i < NMK_MAX_BANKS; i++) {
		x = of_parse_phandle(...);
		if (x) {
			... do work ...
		}
	}

To:

	for (i = 0; i < NMK_MAX_BANKS; i++) {
		x = of_parse_phandle(...);
		if (!x)
			continue;

		... do work ...
	}

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-10-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:26:09 +01:00
Théo Lebrun
af76822683 pinctrl: nomadik: fix build warning (-Wpointer-to-int-cast)
Fix compiler warning found in the pinctrl-nomadik platform driver. GCC
message is as such:

drivers/pinctrl/nomadik/pinctrl-nomadik.c:1169:12: warning: cast from
pointer to integer of different size [-Wpointer-to-int-cast]

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-9-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:25:31 +01:00
Théo Lebrun
8a10b1a36d pinctrl: nomadik: fix build warning (-Wformat)
Fix compiler warning found in the pinctrl-nomadik platform driver. GCC
message is as such:

drivers/pinctrl/nomadik/pinctrl-nomadik.c:855:21: warning:
format ‘%u’ expects argument of type ‘unsigned int’, but argument 5
has type ‘size_t {aka const long unsigned int}’ [-Wformat=]

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-8-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:24:51 +01:00
Théo Lebrun
ae82f5d2b1 pinctrl: nomadik: Kconfig: allow building with COMPILE_TEST
PINCTRL_NOMADIK, PINCTRL_STN8815 and PINCTRL_DB8500 depend on ARCH_U8500
or ARCH_NOMADIK. Add COMPILE_TEST as an option to allow test building
the driver.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-7-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:24:16 +01:00
Théo Lebrun
966942ae49 gpio: nomadik: extract GPIO platform driver from drivers/pinctrl/nomadik/
Previously, drivers/pinctrl/nomadik/pinctrl-nomadik.c registered two
platform drivers: pinctrl & GPIO. Move the GPIO aspect to the
drivers/gpio/ folder, as would be expected.

Both drivers are intertwined for a reason; pinctrl requires access to
GPIO registers for pinmuxing, pull-disable, disabling interrupts while
setting the muxing and wakeup control. Information sharing is done
through a shared array containing GPIO chips and a few helper
functions. That shared array is not touched from gpio-nomadik when
CONFIG_PINCTRL_NOMADIK is not defined.

Make no change to the code that moved into gpio-nomadik; there should be
no behavior change following. A few functions are shared and header
comments are added. Checkpatch warnings are addressed. NUM_BANKS is
renamed to NMK_MAX_BANKS.

It is supported to compile gpio-nomadik without pinctrl-nomadik. The
opposite is not true.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-6-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:22:33 +01:00
Théo Lebrun
53cf6b72e0 gpio: nomadik: fix offset bug in nmk_pmx_set()
Previously, the statement looked like:

    slpm[x] &= ~BIT(g->grp.pins[i]);

Where:
 - slpm is a unsigned int pointer;
 - g->grp.pins[i] is a pin number. It can grow to more than 32.

The expected shift amount is a pin bank offset.

This bug does not occur on every group or pin: the altsetting must be
NMK_GPIO_ALT_C and the pin must be 32 or above. It might have occured.
For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the
right altsetting and pins 229 and 230.

Fixes: dbfe8ca259 ("pinctrl/nomadik: implement pin multiplexing")
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-5-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-29 10:20:23 +01:00
Linus Walleij
4432d416ba pinctrl: renesas: Updates for v6.9 (take two)
- Add support for the R-Car V4M (R8A779H0) SoC,
   - Add support for suspend/resume on the RZ/G2L family,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.9 (take two)

  - Add support for the R-Car V4M (R8A779H0) SoC,
  - Add support for suspend/resume on the RZ/G2L family,
  - Miscellaneous fixes and improvements.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-26 15:28:42 +01:00
Krzysztof Kozlowski
00ca8a15da phy: constify of_phandle_args in xlate
The xlate callbacks are supposed to translate of_phandle_args to proper
provider without modifying the of_phandle_args.  Make the argument
pointer to const for code safety and readability.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom
Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-23 17:43:14 +05:30
Krzysztof Kozlowski
47847b9bcd pinctrl: qcom: sm8650-lpass-lpi: correct Kconfig name
Use proper model name in SM8650 LPASS pin controller Kconfig entry.

Cc:  <stable@vger.kernel.org>
Fixes: c4e4767385 ("pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240216102435.89867-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-21 23:00:57 +01:00
Geert Uytterhoeven
a6f06b909f pinctrl: renesas: Allow the compiler to optimize away sh_pfc_pm
The conversion to DEFINE_NOIRQ_DEV_PM_OPS() lost the ability of the
compiler to optimize away the struct dev_pm_ops object when it is not
needed.

Fix this by replacing the use of pm_sleep_ptr() by a custom wrapper.

Fixes: 727eb02eb7 ("pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/6238a78e32fa21f0c795406b6cba7bce7af92577.1708513940.git.geert+renesas@glider.be
2024-02-21 16:34:33 +01:00
Claudiu Beznea
254203f9a9 pinctrl: renesas: rzg2l: Add suspend/resume support
pinctrl-rzg2l driver is used on RZ/G3S which support deep sleep states
where power to most of the SoC components is turned off.

For this add suspend/resume support. This involves saving and restoring
configured registers along with disabling clock in case there is no pin
configured as wakeup sources.

To save/restore registers 2 caches were allocated: one for GPIO pins and
one for dedicated pins.

On suspend path the pin controller registers are saved and if none of the
pins are configured as wakeup sources the pinctrl clock is disabled.
Otherwise it remains on.

On resume path the configuration is done as follows:
1/ setup PFCs by writing to registers on pin based accesses
2/ setup GPIOs by writing to registers on port based accesses and
   following configuration steps specified in hardware manual
3/ setup dedicated pins by writing to registers on port based accesses
4/ setup interrupts.

Because interrupt signals are routed to IA55 interrupt controller and
IA55 interrupt controller resumes before pin controller, patch restores
also the configured interrupts just after pin settings are restored to
avoid invalid interrupts while resuming.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240215124112.2259103-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-21 16:34:32 +01:00
Claudiu Beznea
fda5edd7d6 pinctrl: renesas: rzg2l: Select GPIOLIB_IRQCHIP and IRQ_DOMAIN_HIERARCHY
The pinctrl-rzg2l driver accesses gpio_chip.irq, which is available only
if CONFIG_GPIOLIB_IRQCHIP=y, and uses APIs that are defined only if
CONFIG_IRQ_DOMAIN_HIERARCHY=y (irq_chip_*_parent() APIs).

On ARCH_RZG2L, CONFIG_IRQ_DOMAIN_HIERARCHY is selected anyway, e.g. by
CONFIG_ARM_GIC_V3, but CONFIG_GPIOLIB_IRQCHIP is not (it is on R-Car).
Make this explicit at the driver level for a clearer view of the
dependencies.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240215124112.2259103-2-claudiu.beznea.uj@bp.renesas.com
[geert: select GPIOLIB_IRQCHIP, too]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-21 16:34:32 +01:00
Biju Das
1d2da79708 pinctrl: renesas: rzg2l: Avoid configuring ISEL in gpio_irq_{en,dis}able*(
Currently on irq_disable(), we are disabling gpio interrupt enable(ISEL).
That means the pin is just gpio input and not gpio input interrupt any
more.  So, move configuring ISEL in rzg2l_gpio_child_to_parent_hwirq()/
rzg2l_gpio_irq_domain_free() so that the pin will be gpioint always even
during irq_disable().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240206135318.165426-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-21 16:34:05 +01:00
Biju Das
d3c4929933 pinctrl: renesas: rzg2l: Simplify rzg2l_gpio_irq_{en,dis}able()
Simplify rzg2l_gpio_irq_{en,dis}able() by adding a helper function
rzg2l_gpio_irq_endisable().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240206135115.151218-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-21 16:33:55 +01:00
Biju Das
2fd4fe19d0 pinctrl: renesas: rzg2l: Configure interrupt input mode
Configure GPIO interrupt as input mode. Also if the bootloader sets
gpio interrupt pin as function, override it as gpio.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240206135115.151218-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-21 16:22:17 +01:00
Cong Dang
97191e536c pinctrl: renesas: r8a779h0: Add Audio pins, groups, functions
Add pins, groups and functions for Audio on the Renesas R-Car V4M
(R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e7d5024c23929d2eccb02bb5daf44c914db07d80.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:49 +01:00
Cong Dang
1604b9788e pinctrl: renesas: r8a779h0: Add PCIe pins, groups, functions
Add pins, groups and functions for the PCIe Controller on the Renesas
R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d32909f5197fa2df0ca6bd6e5fda7cae8863101e.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:49 +01:00
Cong Dang
2acf13cec9 pinctrl: renesas: r8a779h0: Add CANFD pins, groups, functions
Add pins, groups and functions for the CAN-FD interfaces on the Renesas
R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/fd380a402ec4c6238aa8cafc2e602d9e0f1c8cf2.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:49 +01:00
Cong Dang
4759b702d0 pinctrl: renesas: r8a779h0: Add PWM/TPU pins, groups, functions
Add pins, groups and functions for the PWM and 16-Bit Timer Pulse Units
(TPU) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ddbd37b1815169a8b18c5026bc4fd957f0b25dde.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:49 +01:00
Cong Dang
b33c4b4b84 pinctrl: renesas: r8a779h0: Add MSIOF pins, groups, functions
Add pins, groups and functions for the Clock-Synchronized Serial
Interfaces with FIFO (MSIOF) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cbfc61f0c02e9dbeec0ea689e10bdd5ebf5bf1e3.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:49 +01:00
Cong Dang
2a9d0273d1 pinctrl: renesas: r8a779h0: Add I2C pins, groups, functions
Add pins, groups and functions for the I2C Bus Interfaces on the Renesas
R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/23fc01c6e97e544abd23168439f5d45d3ac8fa5b.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:49 +01:00
Cong Dang
a0974d843d pinctrl: renesas: r8a779h0: Add HSCIF pins, groups, functions
Add pins, groups and functions for the High Speed Serial Communication
Interfaces with FIFO (HSCIF) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/27577af0042928e4b673a2774c68a14c4ea7c157.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:49 +01:00
Cong Dang
fbaff0364a pinctrl: renesas: r8a779h0: Add SCIF_CLK pins, groups, functions
Add pins, groups and functions for the baud rate generation clock pins
(SCIF_CLK) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ee056d78d3a339bdbcca2cc5281f1fe01bbc3953.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:48 +01:00
Cong Dang
bc56b11cd7 pinctrl: renesas: r8a779h0: Add SCIF pins, groups, functions
Add pins, groups and functions for the Serial Communication Interfaces
with FIFO (SCIF) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4ad8127a54fb36044ae85db07ff30be05fa5d0f0.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:48 +01:00
Cong Dang
e79da260fc pinctrl: renesas: r8a779h0: Add QSPI pins, groups, functions
Add pins, groups and functions for the QSPI functionality proviced by
the SPI Multi I/O Bus Controller (RPC-IF) on the Renesas R-Car V4M
(R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ebe123bca4888382bc76ccf1a3a9e85ced31f3f3.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:48 +01:00
Cong Dang
4ab1ee6f4f pinctrl: renesas: r8a779h0: Add SD/MMC pins, groups, functions
Add pins, groups and functions for the SD Card/MMC Interface on the
Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c4c06f5be8ffeb32c48993c138f89c8f463751f4.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:48 +01:00
Cong Dang
73f35ebbf4 pinctrl: renesas: r8a779h0: Add Ethernet AVB pins, groups, functions
Add pins, groups and functions for Ethernet AVB on the Renesas R-Car V4M
(R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f79d8f75582f44a7441faed550fb37e44a917558.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:48 +01:00
Cong Dang
291f7856fc pinctrl: renesas: Initial R8A779H0 (R-Car V4M) PFC support
Add initial pin control support for the R-Car V4M (R8A779H0) SoC,
including bias, drive strength and voltage control.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
[geert: Fixes and cleanups]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5f59263e75be713dc954007cfeb2c99274c9d761.1706264667.git.geert+renesas@glider.be
2024-02-20 11:43:48 +01:00
Uwe Kleine-König
05013062a8 pwm: lpss-*: Make use of devm_pwmchip_alloc() function
This prepares the pwm-lpss drivers to further changes of the pwm core
outlined in the commit introducing devm_pwmchip_alloc(). There is no
intended semantical change and the driver should behave as before.

Reviewed-by: Andy Shevchenko <andy@kernel.org>
Link: https://lore.kernel.org/r/b567ab5dd992e361eb884fa6c2cac11be9c7dde3.1707900770.git.u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2024-02-19 11:04:11 +01:00
Antonio Borneo
cb4443f26b pinctrl: stm32: fix PM support for stm32mp257
The driver for stm32mp257 is missing the suspend callback in
struct dev_pm_ops.

Add the callback, using the common stm32_pinctrl_suspend()
function.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Fixes: 619f8ca4a7 ("pinctrl: stm32: add stm32mp257 pinctrl support")
Link: https://lore.kernel.org/r/20240207104604.174843-1-antonio.borneo@foss.st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-13 09:42:22 +01:00
Linus Walleij
fd141e173a pinctrl: renesas: Updates for v6.9
- Add pin groups for SCIF_CLK2 on R-Car V4H,
   - Add support for port pins P19 to P28 on RZ/Five,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.9

  - Add pin groups for SCIF_CLK2 on R-Car V4H,
  - Add support for port pins P19 to P28 on RZ/Five,
  - Miscellaneous fixes and improvements.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-13 09:40:55 +01:00
Arturas Moskvinas
2c0aafdf4a pinctrl: mcp23s08: Check only GPIOs which have interrupts enabled
GPINTEN register contains information about GPIOs with enabled
interrupts no need to check other GPIOs for changes.

Signed-off-by: Arturas Moskvinas <arturas.moskvinas@gmail.com>
Link: https://lore.kernel.org/r/20240201141406.32484-2-arturas.moskvinas@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-09 14:32:47 +01:00
Chen-Yu Tsai
e15ab05a6b pinctrl: mediatek: Drop bogus slew rate register range for MT8192
The MT8192 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: d32f38f2a8 ("pinctrl: mediatek: Add pinctrl driver for mt8192")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240131071910.3950450-2-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-07 11:47:49 +01:00
Chen-Yu Tsai
3a29c87548 pinctrl: mediatek: Drop bogus slew rate register range for MT8186
The MT8186 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: 8b483bda1e ("pinctrl: add pinctrl driver on mt8186")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240131071910.3950450-1-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-07 11:47:49 +01:00
Andy Shevchenko
1a7a7aa1e4 pinctrl: nuvoton: Constify wpcm450_groups
There is no modifications are assumed for wpcm450_groups. Constify it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211154239.4190429-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-07 11:46:02 +01:00
Lad Prabhakar
fea58424e2 pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
Add the missing port pins P19 to P28 for RZ/Five SoC. These additional
pins provide expanded capabilities and are exclusive to the RZ/Five SoC.

Couple of port pins have different configuration and are not identical for
the complete port so introduce struct rzg2l_variable_pin_cfg to handle
such cases and introduce the PIN_CFG_VARIABLE macro. The actual pin config
is then assigned in rzg2l_pinctrl_get_variable_pin_cfg().

Add an additional check in rzg2l_gpio_get_gpioint() to only allow GPIO pins
which support interrupt facility.

While at define RZG2L_GPIO_PORT_PACK() using RZG2L_GPIO_PORT_SPARSE_PACK().

Update the gpio-ranges property in the RZ/Five SoC DTSI, as it must
match the driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129135556.63466-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Link: https://lore.kernel.org/r/20240129135556.63466-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-01-31 14:50:44 +01:00
Lad Prabhakar
15e4ae4f9a pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro
Currently we assume all the port pins are sequential ie always PX_0 to
PX_n (n=1..7) exist, but on RZ/Five SoC we have additional pins P19_1 to
P28_5 which have holes in them, for example only one pin on port19 is
available and that is P19_1 and not P19_0. So to handle such cases
include pinmap for each port which would indicate the pin availability
on each port. As the pincount can be calculated based on pinmap drop this
from RZG2L_GPIO_PORT_PACK() macro.

Previously we had a max of 7 pins on each port but on RZ/Five Port-20
has 8 pins, so move the single pin configuration to BIT(63).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129135556.63466-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-01-31 11:28:56 +01:00
Lad Prabhakar
04d231b90e pinctrl: renesas: rzg2l: Improve code for readability
As the RZ/G2L pinctrl driver is extensively utilized by numerous SoCs and
has experienced substantial growth, enhance code readability by
incorporating FIELD_PREP_CONST/FIELD_GET macros wherever necessary.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129135556.63466-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-01-31 11:28:54 +01:00
Geert Uytterhoeven
3803584a4e pinctrl: renesas: checker: Limit cfg reg enum checks to provided IDs
If the number of provided enum IDs in a variable width config register
description does not match the expected number, the checker uses the
expected number for validating the individual enum IDs.

However, this may cause out-of-bounds accesses on the array holding the
enum IDs, leading to bogus enum_id conflict warnings.  Worse, if the bug
is an incorrect bit field description (e.g. accidentally using "12"
instead of "-12" for a reserved field), thousands of warnings may be
printed, overflowing the kernel log buffer.

Fix this by limiting the enum ID check to the number of provided enum
IDs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c7385f44f2faebb8856bcbb4e908d846fc1531fb.1705930809.git.geert+renesas@glider.be
2024-01-31 11:26:54 +01:00
Geert Uytterhoeven
68540257cd pinctrl: renesas: r8a779g0: Add missing SCIF_CLK2 pin group/function
R-Car V4H actually has two SCIF_CLK pins.
The second pin provides the SCIF_CLK signal for HSCIF2 and SCIF4.

Fixes: 050442ae4c ("pinctrl: renesas: r8a779g0: Add pins, groups and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6352ec9b63fdd38c2c70d8d203e46f21fbfeccdc.1705589612.git.geert+renesas@glider.be
2024-01-31 11:26:49 +01:00
Claudiu Beznea
bd433c25ca pinctrl: renesas: rzg2l: Fix locking in rzg2l_dt_subnode_to_map()
Commit d3aaa7203a ("pinctrl: renesas: rzg2l: Add pin configuration
support for pinmux groups") introduced the possibility to parse pin
configuration for pinmux groups. It did that by calling
rzg2l_map_add_config() at the end of rzg2l_dt_subnode_to_map() and
jumping to the remove_group label in case rzg2l_map_add_config() failed.
But if that happens, the mutex will already be unlocked, thus this it will
lead to double mutex unlock operation. To fix this move the
rzg2l_map_add_config() call just after all the name argument is ready and
before the mutex is locked. There is no harm in doing this, as this only
parses the data from device tree that will be further processed by
pinctrl core code.

Fixes: d3aaa7203a ("pinctrl: renesas: rzg2l: Add pin configuration support for pinmux groups")
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/all/f8c3a3a0-7c48-4e40-8af0-ed4e9d9b049f@moroto.mountain
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240115153453.99226-1-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-01-31 11:26:38 +01:00
Mario Limonciello
4451e8e841 pinctrl: amd: Add IRQF_ONESHOT to the interrupt request
On some systems the interrupt is shared between GPIO controller
and ACPI SCI. When the interrupt is shared with the ACPI SCI the
flags need to be identical.

This should fix the GPIO controller failing to work after commit
7a36b901a6 ("ACPI: OSL: Use a threaded interrupt handler for SCI").
```
[    0.417335] genirq: Flags mismatch irq 9. 00000088 (pinctrl_amd) vs. 00002080 (acpi)
[    0.420073] amd_gpio: probe of AMDI0030:00 failed with error -16
```

Cc: Rafael J. Wysocki <rafael@kernel.org>
Reported-by: Christian Heusel <christian@heusel.eu>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218407
Fixes: 7a36b901a6 ("ACPI: OSL: Use a threaded interrupt handler for SCI")
Link: https://lore.kernel.org/linux-acpi/CAJZ5v0iRqUXeuKmC_+dAJtDBLWQ3x15n4gRH48y7MEaLoXF+UA@mail.gmail.com/T/#mc5506014141b61e472b24e095889535a04458083
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Rafael J. Wysocki <rafael@kernel.org>
Tested-by: Christian Heusel <christian@heusel.eu>
Link: https://lore.kernel.org/r/20240123180818.3994-1-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-31 10:06:07 +01:00
Charles Keepax
b96e00a474 pinctrl: cs42l43: Use str_high_low()
Use str_high_low() rather than open coding.

Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20240129153138.3221604-3-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-31 09:11:14 +01:00
Charles Keepax
ac98dd1cf0 pinctrl: cs42l43: Remove some needless inlines
Remove some pointless inline declarations, no reason not to let the
compiler decide.

Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20240129153138.3221604-2-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-31 09:11:14 +01:00
Charles Keepax
6bdf332a08 pinctrl: cs42l43: Tidy up header includes
Fixup a couple of incorrect header includes.

Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20240129153138.3221604-1-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-31 09:11:14 +01:00
Erick Archer
f6f62a9a93 pinctrl: pinctrl-zynqmp: Use devm_kcalloc() instead of devm_kzalloc()
As noted in the "Deprecated Interfaces, Language Features, Attributes,
and Conventions" documentation [1], size calculations (especially
multiplication) should not be performed in memory allocator (or similar)
function arguments due to the risk of them overflowing. This could lead
to values wrapping around and a smaller allocation being made than the
caller was expecting. Using those allocations could lead to linear
overflows of heap memory and other misbehaviors.

So, use the purpose specific devm_kcalloc() function instead of the
argument size * count in the devm_kzalloc() function.

Link: https://www.kernel.org/doc/html/next/process/deprecated.html#open-coded-arithmetic-in-allocator-arguments [1]
Link: https://github.com/KSPP/linux/issues/162
Signed-off-by: Erick Archer <erick.archer@gmx.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/20240119181909.7079-1-erick.archer@gmx.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-28 01:17:26 +01:00
Jean Thomas
8714b3414d pinctrl: mediatek: mt7981: add additional emmc groups
Add new emmc groups in the pinctrl driver for the
MediaTek MT7981 SoC:
* emmc reset, with pin 15.
* emmc 4-bit bus-width, with pins 16 to 19, and 24 to 25.
* emmc 8-bit bus-width, with pins 16 to 25.

The existing emmc_45 group is kept for legacy reasons, even
if this is the union of emmc_reset and emmc_8 groups.

Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20240117145547.3354242-1-jean.thomas@wifirst.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-28 00:52:31 +01:00
Jean Thomas
398f914bf0 pinctrl: mediatek: mt7981: add additional uart group
Add uart1_3 (pins 26, 27) group to the pinctrl driver for the
MediaTek MT7981 SoC.

Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20240117124234.3137050-1-jean.thomas@wifirst.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-28 00:52:08 +01:00
Randy Dunlap
13931e5d8f pinctrl: mt7986: excise kernel-doc warnings
Fix kernel-doc warnings for enum (anonymous): the enum values are not
documented, so don't indicate that the comment contains kernel-doc
notation.

pinctrl-mt7986.c:68: warning: Enum value 'GPIO_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_RT_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_RB_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_LT_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_LB_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_TR_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_TL_BASE' not described in enum '(anonymous)'

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202312110210.x3vxq42A-lkp@intel.com/
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc:  <linux-gpio@vger.kernel.org>
Cc: Sean Wang <sean.wang@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc:  <linux-mediatek@lists.infradead.org>
Cc:  <linux-arm-kernel@lists.infradead.org>
Link: https://lore.kernel.org/r/20240111045126.13768-1-rdunlap@infradead.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-28 00:36:50 +01:00
Chen Ni
2248bee3ea pinctrl: st: Return pinctrl_gpio_direction_output to transfer the error
Return pinctrl_gpio_direction_output() in order to transfer the error
if it fails.

Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20240103085058.3771653-1-nichen@iscas.ac.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-01-27 23:45:22 +01:00
Linus Torvalds
ed6c23b175 This is the main pin control pull request for the v6.8 kernel series.
Core changes:
 
 - A new PINCTRL_GROUP_DESC() infrastructure macro is added and
   used in different drivers, generic group description struct
   group_desc is now used all over the place.
 
 New drivers:
 
 - New driver for the Texas Instruments TPS6494 Power Management IC.
 
 - New driver for the Lantic PEF2256 framer pin multiplexer.
   This IC has some pins that can be reconfigured in different
   ways. The actual driver comes on an immutable branch with the
   net WAN parts, the IC is some latest-and-greatest serial line
   funnel for e.g. wireless access points.
 
 - New subdriver for the Samsung Exynos Auto V920 pin controller,
   used for automotive applications.
 
 - New subdriver for the Samsung "GS101" SoC pin controller, this
   is the Google "Tensor" SoC used in the Google Pixel 6.
 
 - New subdriver for the Intel Meteor Point SoC pin controller.
 
 - New subdriver for the Qualcomm SM8650 top level (TLMM) and LPASS pin
   controllers.
 
 - New subdriver for the Qualcomm X1E80100 top level (TLMM) pin
   controller.
 
 - New subdriver for the Qualcomm SM4450 top level (TLMM) pin
   controller.
 
 - The "single" pin controller now supports the Texas Instruments
   J7200 SoC.
 
 Improvements:
 
 - Intel has created a new (Intel-)generic pin controller driver that
   is now used by all contemporary Intel platforms.
 
 - Intel is now also making use of some cleanup helpers.
 
 - Enble 910 Ohm bias in the Intel Tangier driver.
 
 - The Samsung driver now suppors irq_set_affinity() in it's IRQ chip
   giving support for non wake up external gpio interrupts.
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Merge tag 'pinctrl-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "For this kernel cycle I managed an immutable branch for the PEF2256
  WAN framer that has some pin control portions. It already landed in
  your tree through the net pull request but here it is mentioned again.

  The most interesting is perhaps the Samsung Exynos subdrivers for the
  Tensor SoC used in Google Pixel 6 and the ExynosAuto subdriver for
  automotive. Along with the earlier merged Tesla FSD subdriver it shows
  some of the versatile uses of the Samsung Exynos silicon. It is also
  used in the latest version of Axis Communications ARTPEC chips so it
  is a very widely deployed SoC family.

  We also have the Intel Meteor Lake SoC which I think is for laptops.
  It's a pretty interesting chip with Xe graphics and integrated PCH.

  Core changes:

   - A new PINCTRL_GROUP_DESC() infrastructure macro is added and used
     in different drivers, generic group description struct group_desc
     is now used all over the place.

  New drivers:

   - New driver for the Texas Instruments TPS6494 Power Management IC.

   - New driver for the Lantic PEF2256 framer pin multiplexer. This IC
     has some pins that can be reconfigured in different ways. The
     actual driver comes on an immutable branch with the net WAN parts,
     the IC is some latest-and-greatest serial line funnel for e.g.
     wireless access points.

   - New subdriver for the Samsung Exynos Auto V920 pin controller, used
     for automotive applications.

   - New subdriver for the Samsung "GS101" SoC pin controller, this is
     the Google "Tensor" SoC used in the Google Pixel 6.

   - New subdriver for the Intel Meteor Point SoC pin controller.

   - New subdriver for the Qualcomm SM8650 top level (TLMM) and LPASS
     pin controllers.

   - New subdriver for the Qualcomm X1E80100 top level (TLMM) pin
     controller.

   - New subdriver for the Qualcomm SM4450 top level (TLMM) pin
     controller.

   - The "single" pin controller now supports the Texas Instruments
     J7200 SoC.

  Improvements:

   - Intel has created a new (Intel-)generic pin controller driver that
     is now used by all contemporary Intel platforms.

   - Intel is now also making use of some cleanup helpers.

   - Enble 910 Ohm bias in the Intel Tangier driver.

   - The Samsung driver now suppors irq_set_affinity() in it's IRQ chip
     giving support for non wake up external gpio interrupts"

* tag 'pinctrl-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits)
  pinctrl: samsung: constify iomem pointers
  pinctrl: cy8c95x0: Cache muxed registers
  dt-bindings: pinctrl: xilinx: Rename *gpio to *gpio-grp
  pinctrl: qcom: lpass-lpi: remove duplicated include
  dt-bindings: pinctrl: qcom: drop common properties and allow wakeup-parent
  dt-bindings: pinctrl: qcom: drop common properties
  dt-bindings: pinctrl: qcom,ipq5018-tlmm: use common TLMM bindings
  dt-bindings: pinctrl: qcom,x1e80100-tlmm: restrict number of interrupts
  dt-bindings: pinctrl: qcom,sm8650-tlmm: restrict number of interrupts
  dt-bindings: pinctrl: qcom,sm8550-tlmm: restrict number of interrupts
  dt-bindings: pinctrl: qcom,sdx75-tlmm: restrict number of interrupts
  dt-bindings: pinctrl: qcom,sa8775p-tlmm: restrict number of interrupts
  dt-bindings: pinctrl: qcom,qdu1000-tlmm: restrict number of interrupts
  dt-bindings: pinctrl: qcom: create common LPASS LPI schema
  pinctrl: qcom: sm4450: dd SM4450 pinctrl driver
  dt-bindings: pinctrl: qcom: Add SM4450 pinctrl
  dt-bindings: pinctrl: qcom,pmic-mpp: clean up example
  pinctrl: intel: Add Intel Meteor Point pin controller and GPIO support
  pinctrl: renesas: rzg2l: Add input enable to the Ethernet pins
  pinctrl: renesas: rzg2l: Add output enable support
  ...
2024-01-17 15:55:33 -08:00
Linus Torvalds
576db73424 gpio updates for v6.8
Core GPIOLIB:
 - protect the global list of GPIO devices with a read-write semaphore as
   it is rarely modified but can be traversed by multiple readers at once
 - remove GPIO devices from the global list when they are *unregistered*
   and not when they are *released* (which only happens when the last
   reference is dropped) as this may lead to a successful lookup of an
   unregistered device
 - remove the unnecessary "extra_checks" switch
 - rename functions that are called with a lock taken
 - remove duplicate includes
 
 Character device handling:
 - use locking guards to reduce the code size
 - allocate the big linereq structure using the more suitable kvzalloc()
 - redulce the size of critical sections
 - improve documentation
 - move the debounce_period_us field out of struct gpio_desc
 
 New drivers:
 - Nuvoton NPCM SGPIO driver for BMC NPCM7xx/NPCM8xx
 - Realtek DHC (Digital Home Center) SoC GPIO driver
 
 Driver improvements:
 - replace gpiochip_is_requested() with a safer alternative in the form of
   gpiochip_dup_line_label() as the former returns a pointer to a string that
   can be deleted
 - implement the dbg_show() callback in gpio-sim
 - improve the coding style for local variables by removing unnecessary tabs
 - use generic device properties instead of OF variants in gpio-mmio
 - use the preferred coding style for __free() in gpio-mockup
 - reuse PM ops from the gpio-tangier in gpio-elkhartlake
 - rework PM and use cleanup helpers in gpio-tangier
 - fix the EIC configuration in gpio-pmic-eic-sprd
 - remove the unneeded call to platform_set_drvdata() in gpio-sifive
 - use generic GPIO helpers for driver callbacks in gpio-dwapb
 - add clock support on certain pins of gpio-ixp4xx
 - don't use the core-specific DEBUG_GPIO switch in drivers
 - kerneldoc improvements
 
 DT bindings:
 - add bindings for the new Realtek and Nuvoton devices
 - allow gpio-ranges in gpio-dwapb
 - support GPIO hogs in gpio-rockchip
 - describe the label property in gpio-zynqmp-modepin
 
 Other:
 - header cleanups
 - forward declarations cleanups
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Merge tag 'gpio-updates-for-v6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "We have two new drivers, an assortment of updates and cleanups to many
  others, and first part of the big rework of the core GPIOLIB that's
  currently underway.

  Add to that some code shrink in the character device module and
  updates to DT bindings and that's pretty much it.

  Core GPIOLIB:
   - protect the global list of GPIO devices with a read-write semaphore
     as it is rarely modified but can be traversed by multiple readers
     at once
   - remove GPIO devices from the global list when they are
     *unregistered* and not when they are *released* (which only happens
     when the last reference is dropped) as this may lead to a
     successful lookup of an unregistered device
   - remove the unnecessary "extra_checks" switch
   - rename functions that are called with a lock taken
   - remove duplicate includes

  Character device handling:
   - use locking guards to reduce the code size
   - allocate the big linereq structure using the more suitable
     kvzalloc()
   - redulce the size of critical sections
   - improve documentation
   - move the debounce_period_us field out of struct gpio_desc

  New drivers:
   - Nuvoton NPCM SGPIO driver for BMC NPCM7xx/NPCM8xx
   - Realtek DHC (Digital Home Center) SoC GPIO driver

  Driver improvements:
   - replace gpiochip_is_requested() with a safer alternative in the
     form of gpiochip_dup_line_label() as the former returns a pointer
     to a string that can be deleted
   - implement the dbg_show() callback in gpio-sim
   - improve the coding style for local variables by removing
     unnecessary tabs
   - use generic device properties instead of OF variants in gpio-mmio
   - use the preferred coding style for __free() in gpio-mockup
   - reuse PM ops from the gpio-tangier in gpio-elkhartlake
   - rework PM and use cleanup helpers in gpio-tangier
   - fix the EIC configuration in gpio-pmic-eic-sprd
   - remove the unneeded call to platform_set_drvdata() in gpio-sifive
   - use generic GPIO helpers for driver callbacks in gpio-dwapb
   - add clock support on certain pins of gpio-ixp4xx
   - don't use the core-specific DEBUG_GPIO switch in drivers
   - kerneldoc improvements

  DT bindings:
   - add bindings for the new Realtek and Nuvoton devices
   - allow gpio-ranges in gpio-dwapb
   - support GPIO hogs in gpio-rockchip
   - describe the label property in gpio-zynqmp-modepin

  Other:
   - header cleanups
   - forward declarations cleanups"

* tag 'gpio-updates-for-v6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (55 commits)
  gpiolib: replace the GPIO device mutex with a read-write semaphore
  gpiolib: remove the GPIO device from the list when it's unregistered
  gpio: nuvoton: Add Nuvoton NPCM sgpio driver
  dt-bindings: gpio: add NPCM sgpio driver bindings
  gpio: rtd: Add support for Realtek DHC(Digital Home Center) RTD SoCs
  dt-bindings: gpio: realtek: Add realtek,rtd-gpio
  gpio: pmic-eic-sprd: Configure the bit corresponding to the EIC through offset
  gpio: dwapb: Use generic request, free and set_config
  gpio: sysfs: drop tabs from local variable declarations
  gpiolib: drop tabs from local variable declarations
  gpiolib: remove extra_checks
  gpio: tps65219: don't use CONFIG_DEBUG_GPIO
  gpiolib: cdev: replace locking wrappers for gpio_device with guards
  gpiolib: cdev: replace locking wrappers for config_mutex with guards
  gpiolib: cdev: allocate linereq using kvzalloc()
  gpiolib: cdev: include overflow.h
  gpiolib: cdev: reduce locking in gpio_desc_to_lineinfo()
  gpiolib: cdev: improve documentation of get/set values
  gpiolib: cdev: fully adopt guard() and scoped_guard()
  gpiolib: remove debounce_period_us from struct gpio_desc
  ...
2024-01-12 13:35:31 -08:00
Jakub Kicinski
e63c1822ac Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR.

Conflicts:

drivers/net/ethernet/broadcom/bnxt/bnxt.c
  e009b2efb7 ("bnxt_en: Remove mis-applied code from bnxt_cfg_ntp_filters()")
  0f2b214779 ("bnxt_en: Fix compile error without CONFIG_RFS_ACCEL")
https://lore.kernel.org/all/20240105115509.225aa8a2@canb.auug.org.au/

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-01-04 18:06:46 -08:00
Krzysztof Kozlowski
1b09c2b8f8 pinctrl: samsung: constify iomem pointers
Constify few pointers to iomem, where the destination memory is not
modified, for code safety and readability.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20231223191902.22857-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-28 22:13:17 +01:00
Bartosz Golaszewski
4ccdaba5ab Linux 6.7-rc7
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Merge tag 'v6.7-rc7' into gpio/for-next

Linux 6.7-rc7
2023-12-27 15:41:04 +01:00
Alexis Lothoré
14694179e5 pinctrl: at91-pio4: use dedicated lock class for IRQ
Trying to suspend to RAM on SAMA5D27 EVK leads to the following lockdep
warning:

 ============================================
 WARNING: possible recursive locking detected
 6.7.0-rc5-wt+ #532 Not tainted
 --------------------------------------------
 sh/92 is trying to acquire lock:
 c3cf306c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0xe8/0x100

 but task is already holding lock:
 c3d7c46c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0xe8/0x100

 other info that might help us debug this:
  Possible unsafe locking scenario:

        CPU0
        ----
   lock(&irq_desc_lock_class);
   lock(&irq_desc_lock_class);

  *** DEADLOCK ***

  May be due to missing lock nesting notation

 6 locks held by sh/92:
  #0: c3aa0258 (sb_writers#6){.+.+}-{0:0}, at: ksys_write+0xd8/0x178
  #1: c4c2df44 (&of->mutex){+.+.}-{3:3}, at: kernfs_fop_write_iter+0x138/0x284
  #2: c32684a0 (kn->active){.+.+}-{0:0}, at: kernfs_fop_write_iter+0x148/0x284
  #3: c232b6d4 (system_transition_mutex){+.+.}-{3:3}, at: pm_suspend+0x13c/0x4e8
  #4: c387b088 (&dev->mutex){....}-{3:3}, at: __device_suspend+0x1e8/0x91c
  #5: c3d7c46c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0xe8/0x100

 stack backtrace:
 CPU: 0 PID: 92 Comm: sh Not tainted 6.7.0-rc5-wt+ #532
 Hardware name: Atmel SAMA5
  unwind_backtrace from show_stack+0x18/0x1c
  show_stack from dump_stack_lvl+0x34/0x48
  dump_stack_lvl from __lock_acquire+0x19ec/0x3a0c
  __lock_acquire from lock_acquire.part.0+0x124/0x2d0
  lock_acquire.part.0 from _raw_spin_lock_irqsave+0x5c/0x78
  _raw_spin_lock_irqsave from __irq_get_desc_lock+0xe8/0x100
  __irq_get_desc_lock from irq_set_irq_wake+0xa8/0x204
  irq_set_irq_wake from atmel_gpio_irq_set_wake+0x58/0xb4
  atmel_gpio_irq_set_wake from irq_set_irq_wake+0x100/0x204
  irq_set_irq_wake from gpio_keys_suspend+0xec/0x2b8
  gpio_keys_suspend from dpm_run_callback+0xe4/0x248
  dpm_run_callback from __device_suspend+0x234/0x91c
  __device_suspend from dpm_suspend+0x224/0x43c
  dpm_suspend from dpm_suspend_start+0x9c/0xa8
  dpm_suspend_start from suspend_devices_and_enter+0x1e0/0xa84
  suspend_devices_and_enter from pm_suspend+0x460/0x4e8
  pm_suspend from state_store+0x78/0xe4
  state_store from kernfs_fop_write_iter+0x1a0/0x284
  kernfs_fop_write_iter from vfs_write+0x38c/0x6f4
  vfs_write from ksys_write+0xd8/0x178
  ksys_write from ret_fast_syscall+0x0/0x1c
 Exception stack(0xc52b3fa8 to 0xc52b3ff0)
 3fa0:                   00000004 005a0ae8 00000001 005a0ae8 00000004 00000001
 3fc0: 00000004 005a0ae8 00000001 00000004 00000004 b6c616c0 00000020 0059d190
 3fe0: 00000004 b6c61678 aec5a041 aebf1a26

This warning is raised because pinctrl-at91-pio4 uses chained IRQ. Whenever
a wake up source configures an IRQ through irq_set_irq_wake, it will
lock the corresponding IRQ desc, and then call irq_set_irq_wake on "parent"
IRQ which will do the same on its own IRQ desc, but since those two locks
share the same class, lockdep reports this as an issue.

Fix lockdep false positive by setting a different class for parent and
children IRQ

Fixes: 776180848b ("pinctrl: introduce driver for Atmel PIO4 controller")
Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
Link: https://lore.kernel.org/r/20231215-lockdep_warning-v1-1-8137b2510ed5@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-21 09:05:02 +01:00
Patrick Rudolph
7d7cd22dc4 pinctrl: cy8c95x0: Cache muxed registers
Currently the port specific registers behind the PORTSEL mux aren't
cached in the regmap and thus the typical setup time for a single pin
on cy8c9560 is about 200msec on our system. The hotspot is the IRQ
(un)masking, which causes lots of R/W operations.

Introduce a separate regmap for muxed registers and helper functions
to use the newly introduced regmap for muxed register access under
the i2c lock.

With the new cache in place the typical pin setup time is reduced to
20msec, making it about 10 times faster. As a side effect the system
boot time is also reduced by 50%.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Link: https://lore.kernel.org/r/20231219125350.4031370-1-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-20 13:04:04 +01:00
Patrick Rudolph
94c71705cc pinctrl: cy8c95x0: Fix get_pincfg
Invert the register value for PIN_CONFIG_OUTPUT_ENABLE to return
the opposite of PIN_CONFIG_INPUT_ENABLE.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Link: https://lore.kernel.org/r/20231219125120.4028862-3-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-20 13:02:18 +01:00
Patrick Rudolph
04dfca968c pinctrl: cy8c95x0: Fix regression
Commit 1fa3df901f ("pinctrl: cy8c95x0: Remove custom ->set_config()")
removed support for PIN_CONFIG_INPUT_ENABLE and
PIN_CONFIG_OUTPUT.

Add the following options to restore functionality:
- PIN_CONFIG_INPUT_ENABLE
- PIN_CONFIG_OUTPUT_ENABLE

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Link: https://lore.kernel.org/r/20231219125120.4028862-2-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-20 13:02:18 +01:00
Patrick Rudolph
47b1fa4811 pinctrl: cy8c95x0: Fix typo
Fix typo to make pinctrl-cy8c95x compile again.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Link: https://lore.kernel.org/r/20231219125120.4028862-1-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-20 13:02:18 +01:00
Wang Jinchao
ff629d3004 pinctrl: qcom: lpass-lpi: remove duplicated include
remove the second #include <linux/seq_file.h>

Signed-off-by: Wang Jinchao <wangjinchao@xfusion.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/202312151810+0800-wangjinchao@xfusion.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-20 12:30:09 +01:00
Tengfei Fan
fa7b1fe24e pinctrl: qcom: sm4450: dd SM4450 pinctrl driver
Add pinctrl driver for TLMM block found in SM4450 SoC.
Can Guo helped out in reviewing the driver.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20231212094900.12615-3-quic_tengfan@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-20 12:03:03 +01:00
Linus Walleij
7085e4e2ff intel-pinctrl for v6.8-1
* New agnostic driver to support Lunar Lake and newer platforms
 * New driver for Intel Meteor Point-S (PCH for Meteor Lake-S)
 * Update drivers to use new PM helpers
 * Use RAII for locking in a few drivers (Raag, Andy)
 * Reduce locking scope in some functions (Raag)
 * Miscellaneous cleanups (Raag)
 
 The following is an automated git shortlog grouped by driver:
 
 alderlake:
  -  Switch to use Intel pin control PM ops
 
 baytrail:
  -  Simplify code with cleanup helpers
  -  Move default strength assignment to a switch-case
  -  Factor out byt_gpio_force_input_mode()
  -  Fix types of config value in byt_pin_config_set()
 
 broxton:
  -  Switch to use Intel pin control PM ops
 
 cannonlake:
  -  Switch to use Intel pin control PM ops
 
 cedarfork:
  -  Switch to use Intel pin control PM ops
 
 denverton:
  -  Switch to use Intel pin control PM ops
 
 elkhartlake:
  -  Switch to use Intel pin control PM ops
 
 emmitsburg:
  -  Switch to use Intel pin control PM ops
 
 geminilake:
  -  Switch to use Intel pin control PM ops
 
 icelake:
  -  Switch to use Intel pin control PM ops
 
 intel:
  -  Add Intel Meteor Point pin controller and GPIO support
  -  use the correct _PM_OPS() export macro
  -  Add a generic Intel pin control platform driver
  -  Revert "Unexport intel_pinctrl_probe()"
  -  allow independent COMPILE_TEST
  -  Refactor intel_pinctrl_get_soc_data()
  -  Move default strength assignment to a switch-case
  -  Make PM ops functions static
  -  Provide Intel pin control wide PM ops structure
 
 jasperlake:
  -  Switch to use Intel pin control PM ops
 
 lakefield:
  -  Switch to use Intel pin control PM ops
 
 lewisburg:
  -  Switch to use Intel pin control PM ops
 
 lynxpoint:
  -  Simplify code with cleanup helpers
 
 meteorlake:
  -  Switch to use Intel pin control PM ops
 
 sunrisepoint:
  -  Switch to use Intel pin control PM ops
 
 tangier:
  -  simplify locking using cleanup helpers
  -  Move default strength assignment to a switch-case
  -  Enable 910 Ohm bias
 
 tigerlake:
  -  Switch to use Intel pin control PM ops
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Merge tag 'intel-pinctrl-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v6.8-1

* New agnostic driver to support Lunar Lake and newer platforms
* New driver for Intel Meteor Point-S (PCH for Meteor Lake-S)
* Update drivers to use new PM helpers
* Use RAII for locking in a few drivers (Raag, Andy)
* Reduce locking scope in some functions (Raag)
* Miscellaneous cleanups (Raag)

The following is an automated git shortlog grouped by driver:

alderlake:
 -  Switch to use Intel pin control PM ops

baytrail:
 -  Simplify code with cleanup helpers
 -  Move default strength assignment to a switch-case
 -  Factor out byt_gpio_force_input_mode()
 -  Fix types of config value in byt_pin_config_set()

broxton:
 -  Switch to use Intel pin control PM ops

cannonlake:
 -  Switch to use Intel pin control PM ops

cedarfork:
 -  Switch to use Intel pin control PM ops

denverton:
 -  Switch to use Intel pin control PM ops

elkhartlake:
 -  Switch to use Intel pin control PM ops

emmitsburg:
 -  Switch to use Intel pin control PM ops

geminilake:
 -  Switch to use Intel pin control PM ops

icelake:
 -  Switch to use Intel pin control PM ops

intel:
 -  Add Intel Meteor Point pin controller and GPIO support
 -  use the correct _PM_OPS() export macro
 -  Add a generic Intel pin control platform driver
 -  Revert "Unexport intel_pinctrl_probe()"
 -  allow independent COMPILE_TEST
 -  Refactor intel_pinctrl_get_soc_data()
 -  Move default strength assignment to a switch-case
 -  Make PM ops functions static
 -  Provide Intel pin control wide PM ops structure

jasperlake:
 -  Switch to use Intel pin control PM ops

lakefield:
 -  Switch to use Intel pin control PM ops

lewisburg:
 -  Switch to use Intel pin control PM ops

lynxpoint:
 -  Simplify code with cleanup helpers

meteorlake:
 -  Switch to use Intel pin control PM ops

sunrisepoint:
 -  Switch to use Intel pin control PM ops

tangier:
 -  simplify locking using cleanup helpers
 -  Move default strength assignment to a switch-case
 -  Enable 910 Ohm bias

tigerlake:
 -  Switch to use Intel pin control PM ops

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-18 23:42:42 +01:00
Linus Walleij
915fdc94f1 Samsung pinctrl drivers changes for v6.8
1. New hardware: Add pin controllers for Samsung ExynosAutov920 and
    Google Tensor GS101.
 
 2. Few DT bindings cleanups: add specific compatibles for each device
    using generic compatible as fallback.  This affects only DTS, no
    driver changes are needed.
 
 3. Allow setting affinity on non wake-up external GPIO interrupts.
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Merge tag 'samsung-pinctrl-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel

Samsung pinctrl drivers changes for v6.8

1. New hardware: Add pin controllers for Samsung ExynosAutov920 and
   Google Tensor GS101.

2. Few DT bindings cleanups: add specific compatibles for each device
   using generic compatible as fallback.  This affects only DTS, no
   driver changes are needed.

3. Allow setting affinity on non wake-up external GPIO interrupts.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-18 15:07:23 +01:00
Linus Walleij
84e769e67e pinctrl: renesas: Updates for v6.8 (take two)
- Add pinmux groups, power source, and input/output enable support for
     Ethernet pins on RZ/G2L SoCs,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.8 (take two)

  - Add pinmux groups, power source, and input/output enable support for
    Ethernet pins on RZ/G2L SoCs,
  - Miscellaneous fixes and improvements.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-18 15:06:18 +01:00
Andy Shevchenko
ebe7f33937 pinctrl: intel: Add Intel Meteor Point pin controller and GPIO support
This driver supports pinctrl/GPIO hardware found on Intel Meteor Point
(a Meteor Lake PCH) providing users a pinctrl and GPIO interfaces
including GPIO interrupts.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-12-15 17:09:36 +02:00
Claudiu Beznea
9e5889c68d pinctrl: renesas: rzg2l: Add input enable to the Ethernet pins
Some of the RZ/G3S Ethernet pins (P1_0, P7_0) can be configured with
input enable.  Enable this functionality for these pins.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231207070700.4156557-8-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-12-15 11:34:34 +01:00
Claudiu Beznea
1bbc8ee408 pinctrl: renesas: rzg2l: Add output enable support
Some of the Ethernet pins on RZ/G3S (but also valid for RZ/G2L) need to
have the direction of the IO buffer set as output for Ethernet to work
properly.  On RZ/G3S, these pins are P1_0/P7_0, P1_1/P7_1, and can have
the following Ethernet functions: TXC/TX_CLK or TX_CTL/TX_EN.

As the pins supporting output enable are SoC specific, and there is a
limited number of these pins (TXC/TX_CLK and/or TX_CTL/TX_EN), specify
output enable capable port limits in the platform-based configuration
data structure, to ensure proper validation.

The OEN support has been intantiated for RZ/G3S at the moment.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231207070700.4156557-7-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-12-15 11:34:34 +01:00
Claudiu Beznea
51996952b8 pinctrl: renesas: rzg2l: Add support to select power source for Ethernet pins
The GPIO controller available on RZ/G3S (but also on RZ/G2L) supports
setting the power source for Ethernet pins.  Based on the interface b/w
the Ethernet controller and the Ethernet PHY, and on board design, a
specific power source needs to be selected.  The GPIO controller
supports 1.8V, 2.5V, and 3.3V power source selection for the Ethernet
pins.  This can be selected though the ETHx_POC registers (x={0, 1}).

Adjust the driver to support this, and to do proper instantiation for
the RZ/G3S and RZ/G2L SoCs.  On RZ/G2L only the get operation has been
tested at the moment.

While at it, as the power registers on RZ/G2L support access sizes of 8
bits, and these registers on RZ/G3S support access sizes of 8/16/32
bits, replace writel()/readl() on these registers with writeb()/readb().
This should allow us to use the same code on both SoCs w/o any issues.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231207070700.4156557-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-12-15 11:34:34 +01:00
Claudiu Beznea
d3aaa7203a pinctrl: renesas: rzg2l: Add pin configuration support for pinmux groups
On RZ/G3S different Ethernet pins need to be configured with different
settings (e.g. power-source needs to be set, RGMII TXC and TX_CTL pins
need output-enable).  Adjust the driver to allow specifying pin
configuration for pinmux groups.  With this, DT settings like the
following are taken into account by the driver:

    eth0_pins: eth0 {
	    tx_ctl {
		    pinmux = <RZG2L_PORT_PINMUX(1, 1, 1)>;  /* ET0_TX_CTL */
		    power-source = <1800>;
		    output-enable;
		    drive-strength-microamp = <5200>;
	    };
    };

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231207070700.4156557-5-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-12-15 11:34:34 +01:00
Claudiu Beznea
906b545b16 pinctrl: renesas: rzg2l: Move arg and index in the main function block
Move arg and index in the main block of the function as they are used by
more than one case block of switch-case (3 out of 4 for arg, 2 out of 4
for index). In this way some lines of code are removed.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231207070700.4156557-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-12-13 19:37:57 +01:00
Jaewon Kim
6cf96df773 pinctrl: samsung: add exynosautov920 pinctrl
Add pinctrl data for ExynosAutov920 SoC.
It has a newly applied pinctrl register layer for ExynosAuto series.

Pinctrl data for ExynosAutoV920 SoC.
 - GPA0,GPA1 (10): External wake up interrupt
 - GPQ0 (2): SPMI (PMIC I/F)
 - GPB0,GPB1,GPB2,GPB3,GPB4,GPB5,GPB6 (47): I2S Audio
 - GPH0,GPH1,GPH2,GPH3,GPH4,GPH5,GPH6,GPH8 (49): PCIE, UFS, Ethernet
 - GPG0,GPG1,GPG2,GPG3,GPG4,GPG5 (29): General purpose
 - GPP0,GPP1,GPP2,GPP3,GPP4,GPP5,GPP6,GPP7,GPP8,GPP9,GPP10 (77): USI

Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Link: https://lore.kernel.org/r/20231211114145.106255-3-jaewon02.kim@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-13 08:49:33 +01:00
Jaewon Kim
884fdaa53b pinctrl: samsung: support ExynosAuto GPIO structure
New ExynosAuto series GPIO have a different register structure.
In the existing Exynos series, EINT control register is enumerated after
a specific offset (e.g EXYNOS_GPIO_ECON_OFFSET, EXYNOS_GPIO_EMASK_OFFSET).
However, from ExynosAutov920 SoC, the register that controls EINT belongs
to each GPIO bank, and each GPIO bank has 0x1000 align.

This is a structure to protect the GPIO bank using S2MPU in VM environment,
and will only be applied in ExynosAuto series SoCs.

--------------------------------------------------------------
| Original Exynos            | ExynosAuto                    |
|------------------------------------------------------------|
| 0x0   GPIO_CON             | 0x0   GPIO_CON                |
| 0x4   GPIO_DAT             | 0x4   GPIO_DAT                |
| 0x8   GPIO_PUD             | 0x8   GPIO_PUD                |
| 0xc   GPIO_DRV             | 0xc   GPIO_DRV                |
| 0x10  GPIO_CONPDN          | 0x10  GPIO_CONPDN             |
| 0x14  GPIO_PUDPDN          | 0x14  GPIO_PUDPDN             |
|----------------------------| 0x18  EINT_CON (per_bank)     |
| ...                        | 0x1c  EINT_FLTCON0 (per_bank) |
| ...                        | 0x20  EINT_FLTCON1 (per_bank) |
| ...                        | 0x24  EINT_MASK (per_bank)    |
| ...                        | 0x28  EINT_PEND (per_bank)    |
|----------------------------|-------------------------------|
| 0x700 EINT_CON (global)    | ...                           |
| 0x800 EINT_FLTCON (global) | ...                           |
| 0x900 EINT_MASK (global)   | ...                           |
| 0xa00 EINT_FEND (global)   | ...                           |
--------------------------------------------------------------

Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Link: https://lore.kernel.org/r/20231211114145.106255-2-jaewon02.kim@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-13 08:42:38 +01:00
Jakub Kicinski
bbc49c7a4e Immutable tag for the PEF2256 framer
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Merge tag 'pef2256-framer' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Linus Walleij says:

====================
Immutable tag for the PEF2256 framer

* tag 'pef2256-framer' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  MAINTAINERS: Add the Lantiq PEF2256 driver entry
  pinctrl: Add support for the Lantic PEF2256 pinmux
  net: wan: framer: Add support for the Lantiq PEF2256 framer
  dt-bindings: net: Add the Lantiq PEF2256 E1/T1/J1 framer
  net: wan: Add framer framework support
====================

Link: https://lore.kernel.org/all/CACRpkdYT1J7noFUhObFgfA60XQAfL4rb=knEmWS__TKKtCMh7Q@mail.gmail.com/
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-12-12 15:14:38 -08:00
Linus Walleij
2ddb7c424a Immutable tag for the PEF2256 framer
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Merge tag 'pef2256-framer' into devel

Immutable tag for the PEF2256 framer
2023-12-12 23:08:30 +01:00
Herve Codina
37c646dc51 pinctrl: Add support for the Lantic PEF2256 pinmux
The Lantiq PEF2256 is a framer and line interface component designed to
fulfill all required interfacing between an analog E1/T1/J1 line and the
digital PCM system highway/H.100 bus.

This kind of component can be found in old telecommunication system.
It was used to digital transmission of many simultaneous telephone calls
by time-division multiplexing. Also using HDLC protocol, WAN networks
can be reached through the framer.

This pinmux support handles the pin muxing part (pins RP(A..D) and pins
XP(A..D)) of the PEF2256.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231128132534.258459-5-herve.codina@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 23:05:24 +01:00
Peter Griffin
4a8be01a1a pinctrl: samsung: Add gs101 SoC pinctrl configuration
Add support for the pin-controller found on the gs101 SoC used in
Pixel 6 phones.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231211162331.435900-10-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-12 20:15:27 +01:00
Andy Shevchenko
db4a913351 pinctrl: core: Remove unused members from struct group_desc
All drivers are converted to use embedded struct pingroup.
Remove unused members from struct group_desc.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-14-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
fcbcfe5cb7 pinctrl: starfive: Convert to use grp member
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-13-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
fc7d3b60a8 pinctrl: renesas: Convert to use grp member
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-12-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
a1cf1a5f9b pinctrl: mediatek: Convert to use grp member
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-11-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
ffc1945e19 pinctrl: keembay: Convert to use grp member
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-10-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
10ce59c6bb pinctrl: ingenic: Convert to use grp member
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
390270f25b pinctrl: imx: Convert to use grp member
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-8-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
7e976117b1 pinctrl: equilibrium: Convert to use grp member
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
2a0674f25b pinctrl: bcm: Convert to use grp member
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
85174ad7c3 pinctrl: core: Embed struct pingroup into struct group_desc
struct group_desc is a particular version of the struct pingroup
with associated opaque data. Start switching pin control core and
drivers to use it explicitly.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
b0f24e021d pinctrl: ingenic: Use C99 initializers in PINCTRL_PIN_GROUP()
For the better flexibility use C99 initializers in PINCTRL_PIN_GROUP().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
bb5eace156 pinctrl: mediatek: Use C99 initializers in PINCTRL_PIN_GROUP()
For the better flexibility use C99 initializers in PINCTRL_PIN_GROUP().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Andy Shevchenko
383da0c7f2 pinctrl: core: Add a convenient define PINCTRL_GROUP_DESC()
Add PINCTRL_GROUP_DESC() macro for inline use.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12 00:47:52 +01:00
Linus Walleij
78b778e363 gpio: remove gpiochip_is_requested()
- provide a safer alternative to gpiochip_is_requested()
 - convert all existing users
 - remove gpiochip_is_requested()
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Merge tag 'gpio-remove-gpiochip_is_requested-for-v6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel

gpio: remove gpiochip_is_requested()

- provide a safer alternative to gpiochip_is_requested()
- convert all existing users
- remove gpiochip_is_requested()
2023-12-12 00:46:23 +01:00
Bartosz Golaszewski
069ced2206 pinctrl: sppctl: use gpiochip_dup_line_label()
Use the new gpiochip_dup_line_label() helper to safely retrieve the
descriptor label.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08 09:26:37 +01:00
Bartosz Golaszewski
c73505c8a0 pinctrl: baytrail: use gpiochip_dup_line_label()
Use the new gpiochip_dup_line_label() helper to safely retrieve the
descriptor label.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08 09:26:35 +01:00
Bartosz Golaszewski
caf7e135c2 pinctrl: nomadik: use gpiochip_dup_line_label()
Use the new gpiochip_dup_line_label() helper to safely retrieve the
descriptor label.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08 09:26:32 +01:00
Bartosz Golaszewski
c76ba937f5 pinctrl: abx500: use gpiochip_dup_line_label()
Use the new gpiochip_dup_line_label() helper to safely retrieve the
descriptor label.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08 09:26:30 +01:00
Andy Shevchenko
583b5273a6 pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro.
Utilize them instead of open coded variants in the driver.

Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231204160033.1872569-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07 10:53:57 +01:00
Andy Shevchenko
3859a6fdf0 pinctrl: keembay: Convert to use struct pingroup
The pin control header provides struct pingroup.
Utilize it instead of open coded variants in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231204160033.1872569-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07 10:53:57 +01:00
Andy Shevchenko
be1d5f5736 pinctrl: equilibrium: Convert to use struct pingroup
The pin control header provides struct pingroup.
Utilize it instead of open coded variants in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231204160033.1872569-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07 10:53:57 +01:00
Andy Shevchenko
d98d73855f pinctrl: core: Make pins const unsigned int pointer in struct group_desc
It's unclear why it's not a const unsigned int pointer from day 1.
Make the pins member const unsigned int pointer in struct group_desc.
Update necessary APIs.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231204160033.1872569-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07 10:53:57 +01:00
Andy Shevchenko
731b30f6aa pinctrl: renesas: Mark local variable with const in ->set_mux()
We are not going to change pins in the ->set_mux() callback. Mark
the local variable with a const qualifier. While at it, make it
also unsigned.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231204160033.1872569-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07 10:53:57 +01:00
Mario Limonciello
2fff0b5e1a pinctrl: amd: Mask non-wake source pins with interrupt enabled at suspend
If a pin isn't marked as a wake source processing any interrupts is
just going to destroy battery life.  The APU may wake up from a hardware
sleep state to process the interrupt but not return control to the OS.

Mask interrupt for all non-wake source pins at suspend. They'll be
re-enabled at resume.

Reported-and-tested-by: Marcus Aram <marcus+oss@oxar.nl>
Reported-and-tested-by: Mark Herbert <mark.herbert42@gmail.com>
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2812
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20231203032431.30277-3-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04 15:46:02 +01:00
Thomas Richard
e24b623d95 pinctrl: pinctrl-single: add ti,j7200-padconf compatible
On j7200, during suspend to ram pinctrl contexts are lost. To save and
restore contexts during suspend/resume, the flag PCS_CONTEXT_LOSS_OFF
shall be set.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20231128-j7200-pinctrl-s2r-v1-2-704e7dc24460@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04 15:32:42 +01:00
Richard Acayan
27030ff787 pinctrl: qcom: fail to retrieve configuration from invalid pin groups
The pinconf-groups debugfs file dumps each valid configuration item of
all pin groups. Some platforms and devices may have pin groups which
cannot be accessed, according to commit 691bf5d5a7 ("pinctrl: qcom:
Don't allow protected pins to be requested"). Fail for each
configuration item of an invalid pin group by checking the GPIO chip's
valid mask.

The validity of the pin group cannot be checked in the generic pinconf
dump (function "pinconf_generic_dump_one"), as it does not directly
interact with the gpiochip or the pinmux callbacks (which would give it
access to the request callback). Instead, an entry contains the ID and
name of the pingroup with no properties when all items fail.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20231128020202.728156-3-mailingradian@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04 15:32:42 +01:00
Andy Shevchenko
142173c4ad pinctrl: mediatek: Switch to use no-IRQ PM helpers
Since pm.h provides a helper for system no-IRQ PM callbacks,
switch the driver to use it instead of open coded variant.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231122144744.2222207-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04 15:32:42 +01:00
Andy Shevchenko
7cc4e6b0e4 pinctrl: Convert unsigned to unsigned int
Simple type conversion with no functional change implied.
While at it, adjust indentation where it makes sense.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231129161459.1002323-24-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04 15:32:42 +01:00
Nam Cao
5c584f175d pinctrl: starfive: jh7100: ignore disabled device tree nodes
The driver always registers pin configurations in device tree. This can
cause some inconvenience to users, as pin configurations in the base
device tree cannot be disabled in the device tree overlay, even when the
relevant devices are not used.

Ignore disabled pin configuration nodes in device tree.

Fixes: ec648f6b76 ("pinctrl: starfive: Add pinctrl driver for StarFive SoCs")
Cc:  <stable@vger.kernel.org>
Signed-off-by: Nam Cao <namcao@linutronix.de>
Link: https://lore.kernel.org/r/fe4c15dcc3074412326b8dc296b0cbccf79c49bf.1701422582.git.namcao@linutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04 11:13:01 +01:00
Nam Cao
f6e3b40a2c pinctrl: starfive: jh7110: ignore disabled device tree nodes
The driver always registers pin configurations in device tree. This can
cause some inconvenience to users, as pin configurations in the base
device tree cannot be disabled in the device tree overlay, even when the
relevant devices are not used.

Ignore disabled pin configuration nodes in device tree.

Fixes: 447976ab62 ("pinctrl: starfive: Add StarFive JH7110 sys controller driver")
Cc:  <stable@vger.kernel.org>
Signed-off-by: Nam Cao <namcao@linutronix.de>
Link: https://lore.kernel.org/r/fd8bf044799ae50a6291ae150ef87b4f1923cacb.1701422582.git.namcao@linutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04 11:11:20 +01:00
Andy Shevchenko
26ea8229e7 pinctrl: imx: Use temporary variable to hold pins
The pins are allocated from the heap, but in order to pass
them as constant object, we need to use non-constant pointer.
Achieve this by using a temporary variable.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231129161459.1002323-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01 15:00:20 +01:00
Andy Shevchenko
271e6a0477 pinctrl: equilibrium: Use temporary variable to hold pins
The pins are allocated from the heap, but in order to pass
them as constant object, we need to use non-constant pointer.
Achieve this by using a temporary variable.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231129161459.1002323-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01 15:00:14 +01:00
Andy Shevchenko
c82c03819b pinctrl: equilibrium: Unshadow error code of of_property_count_u32_elems()
of_property_count_u32_elems() might return an error code in some cases.
It's naturally better to assign what it's returned to the err variable
and supply the real code to the upper layer(s). Besides that, it's a
common practice to avoid assignments for the data in cases when we know
that the error condition happened. Refactor the code accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231129161459.1002323-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01 15:00:10 +01:00
Andy Shevchenko
9e863d2768 pinctrl: qcom: lpass-lpi: Remove unused member in struct lpi_pingroup
The group is not used anywhere, remove it. And if needed, it should be
struct pingroup anyway.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231129161459.1002323-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01 14:59:53 +01:00
Andy Shevchenko
2cd57cbd56 pinctrl: qcom: lpass-lpi: Replace kernel.h with what is being used
Replace kernel.h with what exactly is being used, i.e. array_size.h.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231129161459.1002323-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01 14:59:13 +01:00
Linus Walleij
a8fcd99924 pinctrl: renesas: Updates for v6.8
- Add support for interrupt affinity to the RZ/G2L GPIO driver,
   - Drop unneeded quotes in the RZ/A2 Pin controller DT bindings.
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Merge tag 'renesas-pinctrl-for-v6.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.8

  - Add support for interrupt affinity to the RZ/G2L GPIO driver,
  - Drop unneeded quotes in the RZ/A2 Pin controller DT bindings.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01 14:21:45 +01:00
Youngmin Nam
b77f5ef8eb pinctrl: samsung: add irq_set_affinity() for non wake up external gpio interrupt
To support affinity setting for non wake up external gpio interrupt, add
irq_set_affinity callback using irq number from pinctrl driver data.

Before this patch, changing the irq affinity of gpio interrupt is not
possible:

    # cat /proc/irq/418/smp_affinity
    3ff
    # echo 00f > /proc/irq/418/smp_affinity
    # cat /proc/irq/418/smp_affinity
    3ff
    # cat /proc/interrupts
               CPU0       CPU1       CPU2       CPU3    ...
    418:       3631          0          0          0    ...

With this patch applied, it's possible to change irq affinity of gpio
interrupt:

    # cat /proc/irq/418/smp_affinity
    3ff
    # echo 00f > /proc/irq/418/smp_affinity
    # cat /proc/irq/418/smp_affinity
    00f
    # cat /proc/interrupts
               CPU0       CPU1       CPU2       CPU3      ...
    418:       3893        201        181        188      ...

Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20231126094618.2545116-1-youngmin.nam@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-11-30 08:53:03 +01:00
Lad Prabhakar
e4c3a81ab8 pinctrl: renesas: rzg2l: Enhance driver to support interrupt affinity setting
Implement irq_set_affinity callback so that we can set affinity
for GPIO IRQs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231011195923.67404-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-11-27 11:11:22 +01:00
Bartosz Golaszewski
5f0dedcc9d pinctrl: don't include GPIOLIB private header
gpio_to_desc() is declared in linux/gpio.h so there's no need to include
gpiolib.h directly.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231115165001.2932350-4-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-25 00:28:29 +01:00
Bartosz Golaszewski
524fc108b8 pinctrl: stop using gpiod_to_chip()
Don't dereference struct gpio_chip directly, use dedicated gpio_device
getters instead.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231115165001.2932350-3-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-25 00:28:22 +01:00
Andy Shevchenko
6191e49de3 pinctrl: baytrail: Simplify code with cleanup helpers
Use macros defined in linux/cleanup.h to automate resource lifetime
control in the driver.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2023-11-24 14:33:30 +02:00
Andy Shevchenko
078d83033a pinctrl: baytrail: Move default strength assignment to a switch-case
When ->pin_config_set() is called from the GPIO library (assumed
GpioIo() ACPI resource), the argument can be 1, when, for example,
PullDefault is provided. In such case we supply sane default in
the driver. Move that default assingment to a switch-case, so
it will be consolidated in one place.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2023-11-24 14:33:30 +02:00
Andy Shevchenko
5398a0e23c pinctrl: baytrail: Factor out byt_gpio_force_input_mode()
There is a piece of code that it being used at least twice.
Factor it out.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2023-11-24 14:33:30 +02:00
Andy Shevchenko
1a856a22e6 pinctrl: baytrail: Fix types of config value in byt_pin_config_set()
When unpacked, the config value is split to two of different types.
Fix the types accordingly.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-24 14:33:30 +02:00
Andy Shevchenko
9580ba25c5 pinctrl: lynxpoint: Simplify code with cleanup helpers
Use macros defined in linux/cleanup.h to automate resource lifetime
control in the driver.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-24 14:33:25 +02:00
Raag Jadav
228fe71379 pinctrl: tangier: simplify locking using cleanup helpers
Use lock guards from cleanup.h to simplify locking.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-24 14:33:14 +02:00
Andrew Davis
c3c63e6652 pinctrl: as3722: Use devm_gpiochip_add_data() to simplify remove path
Use devm version of gpiochip add function to handle removal for us.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20231116223045.274211-1-afd@ti.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24 11:22:12 +01:00
Rajendra Nayak
05e4941d97 pinctrl: qcom: Add X1E80100 pinctrl driver
Add initial pinctrl driver to support pin configuration with pinctrl
framework for X1E80100 SoC.

Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231117093921.31968-3-quic_sibis@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24 11:22:12 +01:00
Tomer Maimon
a6059c8603 pinctrl: npcm7xx: prevent glitch when setting the GPIO to output high
Enable GPIO output after setting the output value to prevent a glitch
when pinctrl driver sets gpio pin to output high and the pin is in
the default state (high->low->high).

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: William A. Kennington III <william@wkennington.com>
Link: https://lore.kernel.org/r/20231115211209.1683449-1-william@wkennington.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24 11:22:11 +01:00
Sergey Shtylyov
5a002bf206 pinctrl: stm32: return errors from stm32_gpio_direction_output()
In the STMicroelectronics STM32 driver, stm32_gpio_direction_output()
ignores the result of pinctrl_gpio_direction_output() for no good reason.
Let's propagate errors from pinctrl_gpio_direction_output() upstream...

Found by Linux Verification Center (linuxtesting.org) with the Svace static
analysis tool.

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/5ce023a8-db0c-13a9-be42-09e3348ca44d@omp.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24 11:22:11 +01:00
Tzuyi Chang
38a285d5d4 pinctrl: realtek: Fix logical error when finding descriptor
The pin descriptor should be returned if the name has been found in the
descriptor table. Remove the negation in the if statement for accurate
retrieval.

Fixes: e99ce78030 ("pinctrl: realtek: Add common pinctrl driver for Realtek DHC RTD SoCs")
Signed-off-by: Tzuyi Chang <tychang@realtek.com>
Link: https://lore.kernel.org/r/20231121091107.5564-1-tychang@realtek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24 10:39:20 +01:00
Raag Jadav
e58e519b80 pinctrl: intel: use the correct _PM_OPS() export macro
Since we don't have runtime PM handles here, we should be using
EXPORT_NS_GPL_DEV_SLEEP_PM_OPS() macro, so that the compiler can
discard it in case CONFIG_PM_SLEEP=n.

Fixes: b10a74b5c0 ("pinctrl: intel: Provide Intel pin control wide PM ops structure")
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-22 16:19:30 +02:00
Charles Keepax
6588732445 pinctrl: lochnagar: Don't build on MIPS
MIPS appears to define a RST symbol at a high level, which clashes
with some register naming in the driver. Since there is currently
no case for running this driver on MIPS devices simply cut off the
build of this driver on MIPS.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202311071303.JJMAOjy4-lkp@intel.com/
Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20231115162853.1891940-1-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-16 14:40:38 +01:00
Maria Yu
4198a9b571 pinctrl: avoid reload of p state in list iteration
When in the list_for_each_entry iteration, reload of p->state->settings
with a local setting from old_state will turn the list iteration into an
infinite loop.

The typical symptom when the issue happens, will be a printk message like:

  "not freeing pin xx (xxx) as part of deactivating group xxx - it is
already used for some other setting".

This is a compiler-dependent problem, one instance occurred using Clang
version 10.0 on the arm64 architecture with linux version 4.19.

Fixes: 6e5e959dde ("pinctrl: API changes to support multiple states per device")
Signed-off-by: Maria Yu <quic_aiquny@quicinc.com>
Cc:  <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20231115102824.23727-1-quic_aiquny@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-15 11:40:15 +01:00
Linus Walleij
df572eba4e pinctrl: cy8c95x0: Fix doc warning
One member of struct cy8c95x0_pinctrl is missing kerneldoc,
which leads to warnings.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202311031342.r4To3GaD-lkp@intel.com/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231114-cy8c95x0-doc-v1-1-31674103ad18@linaro.org
2023-11-14 14:47:55 +01:00
Esteban Blanc
901b277eaf pinctrl: tps6594: Add driver for TPS6594 pinctrl and GPIOs
TI TPS6594 PMIC has 11 GPIOs which can be used
for different functions.

This patch adds a pinctrl and GPIO drivers in
order to use those functions.

Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20231108104124.2818275-1-eblanc@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14 14:45:35 +01:00
Chester Lin
08e8734d87 pinctrl: s32cc: Avoid possible string truncation
With "W=1" and "-Wformat-truncation" build options, the kernel test robot
found a possible string truncation warning in pinctrl-s32cc.c, which uses
an 8-byte char array to hold a memory region name "map%u". Since the
maximum number of digits that a u32 value can present is 10, and the "map"
string occupies 3 bytes with a termination '\0', which means the rest 4
bytes cannot fully present the integer "X" that exceeds 4 digits.

Here we check if the number >= 10000, which is the lowest value that
contains more than 4 digits.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202311030159.iyUGjNGF-lkp@intel.com/
Signed-off-by: Chester Lin <clin@suse.com>
Link: https://lore.kernel.org/r/20231107141044.24058-1-clin@suse.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14 14:43:37 +01:00
Antonio Borneo
edd48fd9d4 pinctrl: stm32: fix array read out of bound
The existing code does not verify if the "tentative" index exceeds
the size of the array, causing out of bound read.
Issue identified with kasan.

Check the index before using it.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Fixes: 32c170ff15 ("pinctrl: stm32: set default gpio line names using pin names")
Link: https://lore.kernel.org/r/20231107110520.4449-1-antonio.borneo@foss.st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14 14:41:48 +01:00
Andy Shevchenko
c5860e4a27 pinctrl: intel: Add a generic Intel pin control platform driver
New generations of Intel platforms will provide better description
of the pin control devices in the ACPI tables. Hence, we may provide
a generic pin control platform driver to cover all of them. Currently
the following Intel SoCs / platforms require this to be functional:
- Lunar Lake

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-14 14:09:35 +02:00
Andy Shevchenko
4c51ea957f pinctrl: intel: Revert "Unexport intel_pinctrl_probe()"
In order to prepare for a new coming driver export the original
intel_pinctrl_probe() again.

This reverts commit 0dd519e378.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-14 14:09:08 +02:00
Krzysztof Kozlowski
6ea5c72b04 pinctrl: qcom: lpass-lpi: allow slew rate bit in main pin config register
Existing Qualcomm SoCs have the LPASS pin controller slew rate control
in separate register, however this will change with upcoming Qualcomm
SoCs.  The slew rate will be part of the main register for pin
configuration, thus second device IO address space is not needed.

Prepare for supporting new SoCs by adding flag customizing the driver
behavior for slew rate.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231013145935.220945-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14 08:44:40 +01:00
Krzysztof Kozlowski
28bb7c555c pinctrl: qcom: lpass-lpi: split slew rate set to separate function
Setting slew rate for each pin will grow with upcoming Qualcomm SoCs,
so split the code responsible for this into separate function for easier
readability and maintenance.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231013145935.220945-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14 08:44:40 +01:00
Raag Jadav
22f57707fa pinctrl: intel: allow independent COMPILE_TEST
Now that we have completed the transition to standard ACPI helpers for the
entire Intel pinctrl tree, we can detach COMPILE_TEST from ACPI dependency.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 17:50:18 +02:00
Chen Ni
b0eeba527e pinctrl: stm32: Add check for devm_kcalloc
Add check for the return value of devm_kcalloc() and return the error
if it fails in order to avoid NULL pointer dereference.

Fixes: 32c170ff15 ("pinctrl: stm32: set default gpio line names using pin names")
Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
Acked-by: Valentin Caron <valentin.caron@foss.st.com>
Link: https://lore.kernel.org/r/20231031080807.3600656-1-nichen@iscas.ac.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13 15:12:29 +01:00
Neil Armstrong
22a4a9ed37 pinctrl: qcom: Introduce the SM8650 Top Level Mode Multiplexer driver
Add Top Level Mode Multiplexer (pinctrl) support for the SM8650 platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-3-0e179c368933@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13 15:05:13 +01:00
Neil Armstrong
76b446f5b8 pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits
New platforms uses a new set of bits to control the wakeirq
delivery to the PDC block.

The intr_wakeup_present_bit indicates if the GPIO supports
wakeirq and intr_wakeup_enable_bit enables wakeirq delivery
to the PDC block.

While the name seems to imply this only enables wakeup events,
it is required to allow interrupts events to the PDC block.

Enable this bit in the irq resource request/free if:
- gpio is in wakeirq map
- has the intr_wakeup_present_bit
- the intr_wakeup_enable_bit is set

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-2-0e179c368933@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13 15:01:37 +01:00
Krzysztof Kozlowski
c4e4767385 pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS
Add driver for the pin controller in Low Power Audio SubSystem (LPASS)
of Qualcomm SM8650 SoC.

Notable differences against SM8550 LPASS pin controller:
1. Additional address space for slew rate thus driver uses
   LPI_FLAG_SLEW_RATE_SAME_REG and sets slew rate via different
   register.

2. Two new pin mux functions: qca_swr_clk and qca_swr_data

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231027093615.140656-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13 14:58:02 +01:00
Thierry Reding
bf800ca415 pinctrl: tegra: Display pin function in pinconf-groups
The function that a pin is muxed to can be read from the top-level
pinctrl-maps debugfs file. However, this only reflects the values that
were specified in device tree, so they will only show deviations from
the hardware default setting. Display the current pinmux setting in the
per-controller pinconf-groups debugfs file along with the rest of the
per-pin configuration settings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://lore.kernel.org/r/20230929122101.466266-1-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13 14:57:22 +01:00
Andy Shevchenko
a35c62ba7a pinctrl: intel: Refactor intel_pinctrl_get_soc_data()
Refactor intel_pinctrl_get_soc_data() to drop initial assignment
of the data variable. It's only used in ACPI case and instead
we may always assign it there as the ACPI ID table has the terminator
entry that has driver data set to NULL.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:56:42 +02:00
Andy Shevchenko
6217728b38 pinctrl: intel: Move default strength assignment to a switch-case
iWhen ->pin_config_set() is called from the GPIO library (assumed
GpioIo() ACPI resource), the argument can be 1, when, for example,
PullDefault is provided. In such case we supply sane default in
the driver. Move that default assingment to a switch-case, so
it will be consolidated in one place.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:56:42 +02:00
Andy Shevchenko
0a4cfed79e pinctrl: tangier: Move default strength assignment to a switch-case
iWhen ->pin_config_set() is called from the GPIO library (assumed
GpioIo() ACPI resource), the argument can be 1, when, for example,
PullDefault is provided. In such case we supply sane default in
the driver. Move that default assingment to a switch-case, so
it will be consolidated in one place.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:52:56 +02:00
Andy Shevchenko
2b9282afa8 pinctrl: tangier: Enable 910 Ohm bias
Family 7 (I2C) supports special bias value, i.e. 910 Ohm.

Enable it for configuring pin.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:50:55 +02:00
Andy Shevchenko
649e984f5e pinctrl: intel: Make PM ops functions static
No more users outside of the main module.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-18-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:28 +02:00
Andy Shevchenko
ee4c71f577 pinctrl: tigerlake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-17-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:28 +02:00
Andy Shevchenko
0a327638cf pinctrl: sunrisepoint: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-16-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:28 +02:00
Andy Shevchenko
4a3b7e6a27 pinctrl: meteorlake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-15-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:28 +02:00
Andy Shevchenko
5d5e83f973 pinctrl: lewisburg: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-14-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:28 +02:00
Andy Shevchenko
8e5f001396 pinctrl: lakefield: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-13-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
5ce3422e04 pinctrl: jasperlake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-12-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
b70c674cf4 pinctrl: icelake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-11-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
3f6791067d pinctrl: geminilake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-10-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
e35ed82182 pinctrl: emmitsburg: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
ec79e6e6fb pinctrl: elkhartlake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-8-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
6dde85169a pinctrl: denverton: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
a4f777ef30 pinctrl: cedarfork: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
020861b5ce pinctrl: cannonlake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
4cc4ff1b24 pinctrl: broxton: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
33f1c0b0bf pinctrl: alderlake: Switch to use Intel pin control PM ops
The main driver conditionally exports the PM ops structure.
Switch this driver to use it instead of customly wrapped one.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Andy Shevchenko
b10a74b5c0 pinctrl: intel: Provide Intel pin control wide PM ops structure
With the help of EXPORT_NS_GPL_DEV_PM_OPS() and
NOIRQ_SYSTEM_SLEEP_PM_OPS() we may convert PM ops functions to become
static. This also takes into account the PM configuration options such
as CONFIG_PM and CONFIG_PM_SLEEP. Hence the first step is to provide
a generic PM ops structure that can be used by drivers directly.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231030120734.2831419-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-11-13 13:33:27 +02:00
Bartosz Golaszewski
11d84b2033 pinctrl: nuvoton: npcm8xx: drop wrappers around pinctrl_gpio_request/free()
pinctrl_gpio_*() helpers now have signatures corresponding with those of
the GPIOLIB callbacks. We can drop the wrappers.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
de38bdbe01 pinctrl: nuvoton: npcm7xx: drop wrappers around pinctrl_gpio_request/free()
pinctrl_gpio_*() helpers now have signatures corresponding with those of
the GPIOLIB callbacks. We can drop the wrappers.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
b04ce10d22 pinctrl: stm32: drop wrappers around pinctrl_gpio_free/input()
pinctrl_gpio_*() helpers now have signatures corresponding with those of
the GPIOLIB callbacks. We can drop the wrappers.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
895bf1d826 pinctrl: starfive: jh7110: drop wrappers around pinctrl_gpio_request/free()
pinctrl_gpio_*() helpers now have signatures corresponding with those of
the GPIOLIB callbacks. We can drop the wrappers.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
0b261df49f pinctrl: starfive: jh7100: drop wrappers around pinctrl_gpio_request/free()
pinctrl_gpio_*() helpers now have signatures corresponding with those of
the GPIOLIB callbacks. We can drop the wrappers.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
653e95f1fc pinctrl: ocelot: drop the wrapper around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrapper around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
d35e579d60 pinctrl: cirrus: drop the wrapper around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrapper around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
c1649a7db4 pinctrl: mediatek: common: drop the wrappers around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrappers around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
f00f921fd3 pinctrl: mediatek: moore: drop the wrappers around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrappers around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
5835b3f2a2 pinctrl: rk805: drop the wrapper around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrapper around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:23 +01:00
Bartosz Golaszewski
36077c86fe pinctrl: axp209: drop the wrapper around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrapper around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
ffed728761 pinctrl: vt8500: drop the wrapper around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrapper around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
54d9eab19e pinctrl: as3722: drop the wrapper around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrapper around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
22c7203db3 pinctrl: ingenic: drop the wrapper around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrapper around it so we can drop them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
b6d83d010d pinctrl: st: drop the wrapper around pinctrl_gpio_direction_input()
pinctrl_gpio_direction_input() now has the same signature as the
wrapper around it so we can drop it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
6042aaef31 pinctrl: change the signature of pinctrl_ready_for_gpio_range()
Modify pinctrl_ready_for_gpio_range() to be in line with public GPIO
helpers and take a pair of GPIO chip & offset as arguments

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
31d4e8d101 pinctrl: change the signature of gpio_to_pin()
Modify gpio_to_pin() to be in line with public GPIO helpers and take
a pair of GPIO chip & offset as arguments.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
58e772f437 pinctrl: change the signature of pinctrl_match_gpio_range()
Modify pinctrl_match_gpio_range() to be in line with public GPIO
helpers and take a pair of GPIO chip & offset as arguments.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
82059c3d78 pinctrl: change the signature of pinctrl_get_device_gpio_range()
Modify pinctrl_get_device_gpio_range() to be in line with public GPIO
helpers and take a pair of GPIO chip & offset as arguments.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
315c4418ac pinctrl: change the signature of pinctrl_gpio_direction()
Modify pinctrl_gpio_direction() to be in line with public GPIO helpers
and take a pair of GPIO chip & offset as arguments.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
acf2981b84 treewide: rename pinctrl_gpio_set_config_new()
Now that pinctrl_gpio_set_config() is no longer used, let's drop the
'_new' suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
b679d6c06b treewide: rename pinctrl_gpio_direction_output_new()
Now that pinctrl_gpio_direction_output() is no longer used, let's drop
the '_new' suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
315c46f9b6 treewide: rename pinctrl_gpio_direction_input_new()
Now that pinctrl_gpio_direction_input() is no longer used, let's drop the
'_new' suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:22 +01:00
Bartosz Golaszewski
4fccb263f3 treewide: rename pinctrl_gpio_free_new()
Now that pinctrl_gpio_free()() is no longer used, let's drop the '_new'
suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
acb38be654 treewide: rename pinctrl_gpio_request_new()
Now that pinctrl_gpio_request() is no longer used, let's drop the '_new'
suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
00762e416c treewide: rename pinctrl_gpio_can_use_line_new()
Now that pinctrl_gpio_can_use_line() is no longer used, let's drop the
'_new' suffix from its improved variant.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
ab56e2bfce pinctrl: remove pinctrl_gpio_set_config()
There are no more users of pinctrl_gpio_set_config() so remove it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
45d2055b00 pinctrl: remove pinctrl_gpio_direction_output()
There are no more users of pinctrl_gpio_direction_output() so remove it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
aec96797f9 pinctrl: remove pinctrl_gpio_direction_input()
There are no more users of pinctrl_gpio_direction_input() so remove it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
1d2c88450f pinctrl: remove pinctrl_gpio_free()
There are no more users of pinctrl_gpio_free() so remove it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
699f078463 pinctrl: remove pinctrl_gpio_request()
There are no more users of pinctrl_gpio_request() so remove it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
a063e57adf pinctrl: remove pinctrl_gpio_can_use_line()
There are no more users of pinctrl_gpio_can_use_line() so remove it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
c6801e2332 pinctrl: st: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
578d009b1b pinctrl: lynxpoint: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
262abd2d17 pinctrl: intel: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
588ad2b1b6 pinctrl: cherryview: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:21 +01:00
Bartosz Golaszewski
78329866ef pinctrl: ingenic: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
4125651b3d pinctrl: as3722: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
b2979a1786 pinctrl: cy8c95x0: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
f7fdb230ca pinctrl: vt8500: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
ddfba5bde6 pinctrl: axp209: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
47ad5c97ba pinctrl: mediatek: paris: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
6232d8b934 pinctrl: mediatek: common: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
1b5f829b17 pinctrl: mediatek: moore: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
3607ac37a4 pinctrl: cirrus: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
91dff6b66e pinctrl: rk805: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
da70bf79ef pinctrl: ocelot: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
fed493fce8 pinctrl: starfive: jh7110: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
7cdd1db6af pinctrl: starfive: jh7100: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:20 +01:00
Bartosz Golaszewski
a330504905 pinctrl: spear: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
164fcf1eb3 pinctrl: stm32: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
0bea3e7c15 pinctrl: bcm: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
af80a91199 pinctrl: renesas: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
481a59fb3d pinctrl: nuvoton: npcm8xx: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
c54d686d7d pinctrl: nuvoton: npcm7xx: use new pinctrl GPIO helpers
Replace the pinctrl helpers taking the global GPIO number as argument
with the improved variants that instead take a pointer to the GPIO chip
and the controller-relative offset.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:19 +01:00
Bartosz Golaszewski
ec963d04ca pinctrl: provide new GPIO-to-pinctrl glue helpers
Currently the pinctrl GPIO helpers all take a number from the global
GPIO numberspace - of which we're trying to get rid of as argument.

These helpers are almost universally called from GPIOLIB driver
callbacks which take a pointer to the backing gpio_chip and the
controller-relative offset as arguments.

Let's provide improved variants of these functions that match the
GPIOLIB signatures as the first step in removing the older flavor.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04 10:23:18 +01:00
Linus Torvalds
90b0c2b2ed Pin control changes for the v6.7 kernel cycle
New drivers:
 
 - Realtek RTD family pin control driver and RTD1619B,
   RTD1319D and RTD1315E subdrivers.
 
 - Nuvoton NPCM8xx combined pin control and GPIO driver.
 
 - Amlogic T7 pin control driver.
 
 - Renesas RZ/G3S pin control driver.
 
 Improvements:
 
 - A number of additional UART groups added to the Mediatek
   MT7981 driver.
 
 - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125
   and SDM660.
 
 - Extra GPIO banks for the Sunxi H616.
 
 - MLSP I2C6 function support in Qualcomm MSM8226.
 
 - Some __counted_by() annotations for dynamic arrays.
 
 - Ongoing work to make remove() return void.
 
 - LSBC groups and functions in the Renesas R8A7778.
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Merge tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No pin control core changes this time.

  New drivers:

   - Realtek RTD family pin control driver and RTD1619B, RTD1319D and
     RTD1315E subdrivers

   - Nuvoton NPCM8xx combined pin control and GPIO driver

   - Amlogic T7 pin control driver

   - Renesas RZ/G3S pin control driver

  Improvements:

   - A number of additional UART groups added to the Mediatek MT7981
     driver

   - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660

   - Extra GPIO banks for the Sunxi H616

   - MLSP I2C6 function support in Qualcomm MSM8226

   - Some __counted_by() annotations for dynamic arrays

   - Ongoing work to make remove() return void

   - LSBC groups and functions in the Renesas R8A7778"

* tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits)
  pinctrl: Use device_get_match_data()
  dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent
  dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes
  dt-bindings: pinctrl: brcm: Ensure all child node properties are documented
  pinctrl: renesas: rzn1: Convert to platform remove callback returning void
  pinctrl: renesas: rzg2l: Add RZ/G3S support
  dt-bindings: pinctrl: renesas: Document RZ/G3S SoC
  pinctrl: renesas: rzg2l: Add support for different DS values on different groups
  pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration
  pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S
  pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets
  pinctrl: renesas: rzg2l: Index all registers based on port offset
  pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
  pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions
  pinctrl: intel: fetch community only when we need it
  pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
  pinctrl: cherryview: Convert to platform remove callback returning void
  pinctrl: sprd-sc9860: Convert to platform remove callback returning void
  pinctrl: qcom/msm: Convert to platform remove callback returning void
  pinctrl: qcom/lpi: Convert to platform remove callback returning void
  ...
2023-11-03 19:15:19 -10:00
Linus Torvalds
b05ddad009 gpio updates for v6.7-rc1
GPIOLIB core:
 - provide interfaces allowing users to retrieve, manage and query the
   reference counted GPIO device instead of accessing the private gpio_chip
   structure
 - replace gpiochip_find() with gpio_device_find()
 - remove unused acpi_get_and_request_gpiod()
 - improve the ignore_interrupt functionality in GPIO ACPI
 - correct notifier return codes in gpiolib-of
 - unexport gpiod_set_transitory() as it's unused outside of core GPIO code
 - while there are still external users accessing struct gpio_chip, let's
   make gpiochip_get_desc() public so that they at least use the preferred
   helper
 - improve locking for lookup tables
 - annotate struct linereq with __counted_by
 - improve GPIOLIB docs
 - add an OF quirk for LED trigger sources
 
 Driver improvements:
 - convert all GPIO drivers with .remove() callbacks to using the new
   variant returning void instead of int
 - stop accessing the GPIOLIB private structures in gpio-mockup,
   i2c-mux-gpio, hte-tegra194, gpio-sim
 - use the recommended pattern for autofree variables in gpio-sim
 - add support for more models to gpio-loongson
 - use a notifier chain to notify other blocks about interrupts in
   gpio-eic-sprd instead of looking up GPIO devices on every interrupt
 - convert gpio-pca953x and gpio-fx6408 to using the maple tree regmap
   cache
 - don't include GPIOLIB internal headers in drivers which don't need them
 - move the ingenic NAND quirk into gpiolib-of
 - add an ignore interrupt quirk for Peaq C1010
 - drop static GPIO base from gpio-omap, gpio-f7188x
 - use the preferred device_get_match_data() function in drivers that still
   don't
 - refactor gpio-pca953x: switch to using DEFINE_SIMPLE_DEV_PM_OPS(), use
   cleanup helpers, use dev_err_probe() where it makes sense, fully convert
   to using devres and some other minor tweaks
 
 DT bindings:
 - add support for a new model to gpio-vf610 and update existing properties
 - add support for more loongson models
 - add missing support for imx models that are used but undocumented
 - convert bindings for Intel IXP4xx to schema
 
 Minor stuff:
 - deprecate gpio-mockup in favor of gpio-sim
 - include missing headers here and there
 - stop using gpiochip_find() in OMAP1 board files
 - minor tweaks in gpio-vf610, gpio-hisi
 - remove unneeded 'extern' specifiers from headers
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Merge tag 'gpio-updates-for-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "We don't have any new drivers. The loongson driver is getting extended
  with support for new models. There's a big refactor of gpio-pca953x
  and many small improvements to others.

  The GPIO code in the kernel has acquired a lot of cruft over the years
  as well as many abusers of the API across the kernel tree. This
  release cycle we have started a major cleanup and improvement effort
  that will most likely span several releases. We have started by
  converting external users of struct gpio_chip to accessing the wrapper
  around it - struct gpio_device. This is because the latter is
  reference counted while the former is removed when the provider is
  unbound. We also removed several instances of drivers accessing
  private GPIOLIB structures and including the private header from
  drivers/gpio/.

  To that end you'll see several commits aimed at different subsystems
  (acked by relevant maintainers) as well as two merges from the
  x86/platform tree.

  We'll then rework the locking in GPIOLIB which currently uses a big
  spinlock for many different things and could use becoming more
  fine-grained, especially as it doesn't even get the locking right.
  We'll also use SRCU for protecting the gpio_chip pointer against
  in-kernel hot-unplug crashes similar to what we saw triggered from
  user-space and fixed with semaphores in gpiolib-cdev. The core GPIOLIB
  is still vulnerable to these use-cases. I'm just mentioning the plans
  here, this is not part of this PR.

  You'll see some new instances of using __free(). We've added a
  gpio_device_put cleanup helper similar to the put_device one
  introduced by Peter Zijlstra and used it according to the preferred
  pattern except where it didn't make sense.

  GPIOLIB core:
   - provide interfaces allowing users to retrieve, manage and query the
     reference counted GPIO device instead of accessing the private
     gpio_chip structure
   - replace gpiochip_find() with gpio_device_find()
   - remove unused acpi_get_and_request_gpiod()
   - improve the ignore_interrupt functionality in GPIO ACPI
   - correct notifier return codes in gpiolib-of
   - unexport gpiod_set_transitory() as it's unused outside of core GPIO
     code
   - while there are still external users accessing struct gpio_chip,
     let's make gpiochip_get_desc() public so that they at least use the
     preferred helper
   - improve locking for lookup tables
   - annotate struct linereq with __counted_by
   - improve GPIOLIB docs
   - add an OF quirk for LED trigger sources

  Driver improvements:
   - convert all GPIO drivers with .remove() callbacks to using the new
     variant returning void instead of int
   - stop accessing the GPIOLIB private structures in gpio-mockup,
     i2c-mux-gpio, hte-tegra194, gpio-sim
   - use the recommended pattern for autofree variables in gpio-sim
   - add support for more models to gpio-loongson
   - use a notifier chain to notify other blocks about interrupts in
     gpio-eic-sprd instead of looking up GPIO devices on every interrupt
   - convert gpio-pca953x and gpio-fx6408 to using the maple tree regmap
     cache
   - don't include GPIOLIB internal headers in drivers which don't need
     them
   - move the ingenic NAND quirk into gpiolib-of
   - add an ignore interrupt quirk for Peaq C1010
   - drop static GPIO base from gpio-omap, gpio-f7188x
   - use the preferred device_get_match_data() function in drivers that
     still don't
   - refactor gpio-pca953x: switch to using DEFINE_SIMPLE_DEV_PM_OPS(),
     use cleanup helpers, use dev_err_probe() where it makes sense,
     fully convert to using devres and some other minor tweaks

  DT bindings:
   - add support for a new model to gpio-vf610 and update existing
     properties
   - add support for more loongson models
   - add missing support for imx models that are used but undocumented
   - convert bindings for Intel IXP4xx to schema

  Minor stuff:
   - deprecate gpio-mockup in favor of gpio-sim
   - include missing headers here and there
   - stop using gpiochip_find() in OMAP1 board files
   - minor tweaks in gpio-vf610, gpio-hisi
   - remove unneeded 'extern' specifiers from headers"

* tag 'gpio-updates-for-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (108 commits)
  hte: tegra194: add GPIOLIB dependency
  hte: tegra194: don't access struct gpio_chip
  gpiolib: provide gpio_device_get_base()
  i2c: mux: gpio: don't fiddle with GPIOLIB internals
  gpiolib: provide gpiod_to_gpio_device()
  gpiolib: provide gpio_device_to_device()
  gpio: hisi: Fix format specifier
  gpiolib: provide gpio_device_find_by_fwnode()
  gpio: acpi: remove acpi_get_and_request_gpiod()
  gpio: Use device_get_match_data()
  gpio: vf610: update comment for i.MX8ULP and i.MX93 legacy compatibles
  platform/x86: int3472: Switch to devm_get_gpiod()
  platform/x86: int3472: Stop using gpiod_toggle_active_low()
  platform/x86: int3472: Add new skl_int3472_gpiod_get_from_temp_lookup() helper
  platform/x86: int3472: Add new skl_int3472_fill_gpiod_lookup() helper
  gpio: vf610: simplify code by dropping data check
  gpio: vf610: add i.MX8ULP of_device_id entry
  dt-bindings: gpio: vf610: add i.MX95 compatible
  dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93
  dt-bindings: gpio: vf610: update gpio-ranges
  ...
2023-10-31 17:21:54 -10:00
Rob Herring
63bffc2d3a pinctrl: Use device_get_match_data()
Use preferred device_get_match_data() instead of of_match_device() to
get the driver match data. With this, adjust the includes to explicitly
include the correct headers.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20231009172923.2457844-18-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-30 14:50:42 +01:00
Rafael J. Wysocki
e8c3c7f97a Merge branches 'acpi-ec', 'acpi-sysfs', 'acpi-misc' and 'acpi-uid'
Merge ACPI EC driver updates, ACPI sysfs interface updates, misc updates
related to ACPI and changes related to ACPI _UID handling for 6.7-rc1:

 - Add EC GPE detection quirk for HP 250 G7 Notebook PC (Jonathan
   Denose).

 - Fix and clean up create_pnp_modalias() and create_of_modalias()
   (Christophe JAILLET).

 - Modify 2 pieces of code to use acpi_evaluate_dsm_typed() (Andy
   Shevchenko).

 - Define acpi_dev_uid_match() for matching _UID and use it in several
   places (Raag Jadav).

 - Use acpi_device_uid() for fetching _UID in 2 places (Raag Jadav).

* acpi-ec:
  ACPI: EC: Add quirk for HP 250 G7 Notebook PC

* acpi-sysfs:
  ACPI: sysfs: Clean up create_pnp_modalias() and create_of_modalias()
  ACPI: sysfs: Fix create_pnp_modalias() and create_of_modalias()

* acpi-misc:
  ACPI: x86: s2idle: Switch to use acpi_evaluate_dsm_typed()
  ACPI: PCI: Switch to use acpi_evaluate_dsm_typed()

* acpi-uid:
  perf: arm_cspmu: use acpi_dev_hid_uid_match() for matching _HID and _UID
  ACPI: x86: use acpi_dev_uid_match() for matching _UID
  ACPI: utils: use acpi_dev_uid_match() for matching _UID
  pinctrl: intel: use acpi_dev_uid_match() for matching _UID
  ACPI: utils: Introduce acpi_dev_uid_match() for matching _UID
  perf: qcom: use acpi_device_uid() for fetching _UID
  ACPI: sysfs: use acpi_device_uid() for fetching _UID
2023-10-26 14:59:52 +02:00
Raag Jadav
2d5bd3cbb0 pinctrl: intel: use acpi_dev_uid_match() for matching _UID
Convert manual _UID references to use the standard ACPI helper.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-10-24 21:49:27 +02:00
Andy Shevchenko
62140a1e4d Revert "pinctrl: avoid unsafe code pattern in find_pinctrl()"
The commit breaks MMC enumeration on the Intel Merrifield
plaform.

Before:
[   36.439057] mmc0: SDHCI controller on PCI [0000:00:01.0] using ADMA
[   36.450924] mmc2: SDHCI controller on PCI [0000:00:01.3] using ADMA
[   36.459355] mmc1: SDHCI controller on PCI [0000:00:01.2] using ADMA
[   36.706399] mmc0: new DDR MMC card at address 0001
[   37.058972] mmc2: new ultra high speed DDR50 SDIO card at address 0001
[   37.278977] mmcblk0: mmc0:0001 H4G1d 3.64 GiB
[   37.297300]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10

After:
[   36.436704] mmc2: SDHCI controller on PCI [0000:00:01.3] using ADMA
[   36.436720] mmc1: SDHCI controller on PCI [0000:00:01.0] using ADMA
[   36.463685] mmc0: SDHCI controller on PCI [0000:00:01.2] using ADMA
[   36.720627] mmc1: new DDR MMC card at address 0001
[   37.068181] mmc2: new ultra high speed DDR50 SDIO card at address 0001
[   37.279998] mmcblk1: mmc1:0001 H4G1d 3.64 GiB
[   37.302670]  mmcblk1: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10

This reverts commit c153a4edff.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231017141806.535191-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-19 10:12:48 +02:00
Linus Walleij
593bcf6889 intel-pinctrl for v6.7-1
* Merge "Drop runtime PM support for Baytrail and Lynxpoint pinctrl" (Raag)
 * Small improvements here and there in the Intel pin control drivers (Raag)
 * Switch to RAII for locking in the Intel core and Cherry View drivers
 * Enable non-ACPI enumeration in the Intel Denverton driver
 * Use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS() in a couple of drivers
 * Introduce array_size.h and use in in the Intel pin control drivers
 
 The following is an automated git shortlog grouped by driver:
 
 baytrail:
  -  Replace kernel.h by what is actually being used
  -  drop runtime PM support
  -  fix debounce disable case
 
 broxton:
  -  Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()
 
 cherryview:
  -  reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
  -  Convert to platform remove callback returning void
  -  Simplify code with cleanup helpers
  -  Avoid duplicated I/O
  -  Replace kernel.h by what is actually being used
 
 denverton:
  -  Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()
  -  Enable platform device in the absence of ACPI enumeration
 
 intel:
  -  fetch community only when we need it
  -  refine intel_config_set_pull() function
  -  Replace kernel.h by what is actually being used
  -  Simplify code with cleanup helpers
 
 lynxpoint:
  -  Replace kernel.h by what is actually being used
  -  drop runtime PM support
 
 merrifield:
  -  Replace kernel.h by what is actually being used
 
 moorefield:
  -  Replace kernel.h by what is actually being used
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Merge tag 'intel-pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v6.7-1

* Merge "Drop runtime PM support for Baytrail and Lynxpoint pinctrl" (Raag)
* Small improvements here and there in the Intel pin control drivers (Raag)
* Switch to RAII for locking in the Intel core and Cherry View drivers
* Enable non-ACPI enumeration in the Intel Denverton driver
* Use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS() in a couple of drivers
* Introduce array_size.h and use in in the Intel pin control drivers

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Replace kernel.h by what is actually being used
 -  drop runtime PM support
 -  fix debounce disable case

broxton:
 -  Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()

cherryview:
 -  reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
 -  Convert to platform remove callback returning void
 -  Simplify code with cleanup helpers
 -  Avoid duplicated I/O
 -  Replace kernel.h by what is actually being used

denverton:
 -  Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()
 -  Enable platform device in the absence of ACPI enumeration

intel:
 -  fetch community only when we need it
 -  refine intel_config_set_pull() function
 -  Replace kernel.h by what is actually being used
 -  Simplify code with cleanup helpers

lynxpoint:
 -  Replace kernel.h by what is actually being used
 -  drop runtime PM support

merrifield:
 -  Replace kernel.h by what is actually being used

moorefield:
 -  Replace kernel.h by what is actually being used
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-16 22:00:13 +02:00
Krzysztof Kozlowski
c8befdc411 pinctrl: qcom: lpass-lpi: fix concurrent register updates
The Qualcomm LPASS LPI pin controller driver uses one lock for guarding
Read-Modify-Write code for slew rate registers.  However the pin
configuration and muxing registers have exactly the same RMW code but
are not protected.

Pin controller framework does not provide locking here, thus it is
possible to trigger simultaneous change of pin configuration registers
resulting in non-atomic changes.

Protect from concurrent access by re-using the same lock used to cover
the slew rate register.  Using the same lock instead of adding second
one will make more sense, once we add support for newer Qualcomm SoC,
where slew rate is configured in the same register as pin
configuration/muxing.

Fixes: 6e261d1090 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Cc: stable@vger.kernel.org
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231013145705.219954-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-16 14:56:49 +02:00
Linus Walleij
30d75d3c6f Samsung pinctrl drivers changes for v6.7
Few cleanups, improvements (use __counted_by annotation) and finally
 switch to dynamic allocation of GPIO numberspace.
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Merge tag 'samsung-pinctrl-6.7' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel

Samsung pinctrl drivers changes for v6.7

Few cleanups, improvements (use __counted_by annotation) and finally
switch to dynamic allocation of GPIO numberspace.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-16 11:41:53 +02:00
Linus Walleij
b4e10c3190 pinctrl: renesas: Updates for v6.7 (take two)
- Add pin groups for the Local Bus State Controller (LBSC) on R-Car
     M1A,
   - Add support for the RZ/G3S (R9A08G045) SoC,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.7 (take two)

  - Add pin groups for the Local Bus State Controller (LBSC) on R-Car
    M1A,
  - Add support for the RZ/G3S (R9A08G045) SoC,
  - Miscellaneous fixes and improvements.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-13 15:32:09 +02:00
Uwe Kleine-König
583d807320 pinctrl: renesas: rzn1: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231009083856.222030-20-u.kleine-koenig@pengutronix.de
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
c6a088e5a0 pinctrl: renesas: rzg2l: Add RZ/G3S support
Add basic support for RZ/G3S to be able to boot from SD card, have a
running console port, and use GPIOs.  RZ/G3S has 82 general-purpose IO
ports.  Support for the remaining pin functions (e.g. Ethernet, XSPI)
will be added along with controller-specific support.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-22-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
ae5b425faf pinctrl: renesas: rzg2l: Add support for different DS values on different groups
RZ/G3S supports different drive strength values for different power
sources and pin groups (A, B, C).  On each group there could be up to 4
drive strength values per power source.  Available power sources are
1v8, 2v5, 3v3.  Drive strength values are more fine tuned than what was
previously available on the driver thus the necessity of having
micro-amp support.  As drive strength and power source values are linked
together the hardware setup for these was moved at the end of
rzg2l_pinctrl_pinconf_set() to ensure proper validation of the new
values.

The drive strength values are expected to be initialized though the
SoC-specific hardware configuration data structure.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-19-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
cca38201b4 pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration
Move drive strength and output impedance values to the SoC-specific
configuration data structure (struct rzg2l_hwcfg).  This allows
extending the drive strength support for RZ/G3S.  Along with this the DS
values were converted to uA for simple integration with RZ/G3S support.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-18-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
35a3610e5a pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S
On RZ/G3S PFC register allow setting 8 functions for individual ports
(function1 to function8). For function1 the register need to be
configured with 0, for function8 the register need to be configured with
7.  We cannot use zero based addressing when requesting functions from
different code places as the documentation
(RZG3S_pinfunction_List_r1.0.xlsx) states explicitly that function0 is
GPIO.

Add a new member to struct rzg2l_hwcfg that will keep the offset that
needs to be substracted before applying a value to a PFC register.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-17-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
1f89aa906f pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets
SD, PWPR power registers have different offsets b/w RZ/G2L and RZ/G3S.
Add a per SoC configuration data structure that is initialized with the
proper register offsets for individual SoCs.  The rzg2l_hwcfg structure
will be extended further in later commits.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-16-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Claudiu Beznea
77e18969da pinctrl: renesas: rzg2l: Index all registers based on port offset
To get the address that needs to be read/written for specific port
functionalities, the P(), PM(), PMC(), PFC(), PIN(), IOLH() IEN(),
ISEL() macros are used.  Some of these macros receive as argument the
hardware port identifier, some the hardware port offset address (e.g.
ISEL() received port identifier, IOLH() received port offset address).
This makes it hard to extend the current driver for SoCs where port
identifiers are not contiguous in the memory map of the pin controller.
This is the case for the RZ/G3S pin controller where ports are mapped as
follows:

    port offset    port identifier
    -----------    ---------------
    0x20           P0
    0x21           P5
    0x22           P6
    0x23           P11
    0x24           P12
    0x25           P13
    0x26           P14
    0x27           P15
    0x28           P16
    0x29           P17
    0x2a           P18
    0x30           P1
    0x31           P2
    0x32           P3
    0x33           P4
    0x34           P7
    0x35           P8
    0x36           P8
    0x37           P10

To make this achievable, change all the above macros used to get the
address of a port register for a specific port functionality based on
the port hardware address.  Summarized, all the above macros will get as
argument the port offset address listed in the above table.

With this RZG2L_SINGLE_PIN_GET_PORT_OFFSET(),
RZG2L_PIN_ID_TO_PORT_OFFSET() and RZG2L_GPIO_PORT_GET_INDEX() were
replaced by RZG2L_PIN_CFG_TO_PORT_OFFSET(); RZG2L_SINGLE_PIN_GET_CFGS()
and RZG2L_GPIO_PORT_GET_CFGS() were replaced by RZG2L_PIN_CFG_TO_CAPS().

Also rzg2l_pinctrl_set_pfc_mode() does not need the port argument
anymore.  Also rzg2l_gpio_direction_input() and
rzg2l_gpio_direction_output() do not need to translate port and bit
locally as this can be done by rzg2l_gpio_set_direction().

To use the same naming for port, bit/pin, and register offset, replace
the port_offset variable names in different places by variables named
off.  There is no longer a need to initialize cfg and bit in different
code places.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20230929053915.1530607-15-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:05 +02:00
Lad Prabhakar
c944d9dea7 pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
Validate the GPIO pin request in the rzg2l_gpio_request() callback using
the rzg2l_validate_gpio_pin() function.  This stops any accidental usage
of GPIO pins which are not supported by the SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/r/20230925154548.27048-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-13 09:38:04 +02:00
Geert Uytterhoeven
84ba513169 pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions
Add pins, groups, and functions for the Local Bus State Controller
(LBSC) on the Renesas R-Car M1A (R8A7778) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/347b9f7627871b45aec04a3351d50219d4d260fe.1694768311.git.geert+renesas@glider.be
2023-10-13 09:38:04 +02:00
Ralph Siemsen
f055ff23c3 pinctrl: renesas: rzn1: Enable missing PINMUX
Enable pin muxing (eg. programmable function), so that the RZ/N1 GPIO
pins will be configured as specified by the pinmux in the DTS.

This used to be enabled implicitly via CONFIG_GENERIC_PINMUX_FUNCTIONS,
however that was removed, since the RZ/N1 driver does not call any of
the generic pinmux functions.

Fixes: 1308fb4e4e ("pinctrl: rzn1: Do not select GENERIC_PIN{CTRL_GROUPS,MUX_FUNCTIONS}")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231004200008.1306798-1-ralph.siemsen@linaro.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-12 09:10:40 +02:00
Raag Jadav
8d751da9f1 pinctrl: intel: fetch community only when we need it
We check community features only in case PIN_CONFIG_BIAS_PULL_DOWN while
setting/getting pad termination. No need to fetch the community otherwise.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-11 23:40:56 +03:00
Raag Jadav
6fe13aa7c8 pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
We have a couple of pinconfig cases inside the braces which are meant for
PIN_CONFIG_BIAS_HIGH_IMPEDANCE case. Although it is valid C, it makes the
code less readable and prone to misinterpretation. Limit the braces to
PIN_CONFIG_BIAS_HIGH_IMPEDANCE case to avoid this.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-11 23:40:56 +03:00
Uwe Kleine-König
e0ba7366a6 pinctrl: cherryview: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-11 23:40:49 +03:00
Uwe Kleine-König
c341ac65bf pinctrl: sprd-sc9860: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

To convert the sprd-sc9860 driver, make sprd_pinctrl_remove()
return void (instead of zero) and use .remove_new as callback.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009162510.335208-4-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:47:50 +02:00
Uwe Kleine-König
22ee670a8a pinctrl: qcom/msm: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

To convert all those qcom pinctrl drivers, make msm_pinctrl_remove()
return void (instead of zero) and use .remove_new in all drivers.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009162510.335208-3-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:47:49 +02:00
Uwe Kleine-König
776d54c137 pinctrl: qcom/lpi: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

To convert all those qcom pinctrl drivers, make msm_pinctrl_remove()
return void (instead of zero) and use .remove_new in all drivers.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009162510.335208-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:47:49 +02:00
Uwe Kleine-König
93650550df pinctrl: ti: ti-iodelay: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-21-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:45:35 +02:00
Uwe Kleine-König
a80252efb5 pinctrl: qcom: ssbi-mpp: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-19-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:43:56 +02:00
Uwe Kleine-König
a37b06133a pinctrl: qcom: ssbi-gpio: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-18-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:43:31 +02:00
Uwe Kleine-König
ab06ab8406 pinctrl: qcom: spmi-mpp: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-17-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:43:03 +02:00
Uwe Kleine-König
348e1488ba pinctrl: qcom: spmi-gpio: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-16-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:42:37 +02:00
Uwe Kleine-König
14a16555e7 pinctrl: tb10x: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-15-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:42:07 +02:00
Uwe Kleine-König
86bc4c7f9e pinctrl: stmfx: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-14-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:41:35 +02:00
Uwe Kleine-König
a6992a0d31 pinctrl: single: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-13-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:40:54 +02:00
Uwe Kleine-König
9725877765 pinctrl: rockchip: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20231009083856.222030-12-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:40:22 +02:00
Uwe Kleine-König
f0c3958800 pinctrl: as3722: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-11-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:39:42 +02:00
Uwe Kleine-König
b340412a87 pinctrl: artpec6: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Link: https://lore.kernel.org/r/20231009083856.222030-10-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:39:10 +02:00
Uwe Kleine-König
23a35fd90c pinctrl: amd: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-9-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:38:42 +02:00
Uwe Kleine-König
a304b56f42 pinctrl: nomadik: abx500: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-8-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:38:12 +02:00
Uwe Kleine-König
9eb95648f1 pinctrl: cirrus: madera-core: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.

To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20231009083856.222030-5-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:37:19 +02:00
Uwe Kleine-König
88b3f10850 pinctrl: ti: ti-iodelay: Drop if block with always false condition
ti_iodelay_remove() is only called after ti_iodelay_probe() completed
successfully. In this case platform_set_drvdata() was called with a
non-NULL argument and so platform_get_drvdata() won't return NULL.

Simplify by removing the if block with the always false condition.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-4-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:36:44 +02:00
Uwe Kleine-König
71e6702667 pinctrl: single: Drop if block with always false condition
pcs_remove() is only called after pcs_probe() completed successfully. In
this case platform_set_drvdata() was called with a non-NULL argument and
so platform_get_drvdata() won't return NULL.

Simplify by removing the if block with the always false condition.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-3-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:35:56 +02:00
Uwe Kleine-König
35df4b75bd pinctrl: stmfx: Improve error message in .remove()'s error path
The driver core has no handling for errors returned by the .remove()
callback. The only action on error is a dev_warn() with generic error
message that the returned value is returned.

Replace it by a more specific and useful message. Then returning zero is
the right thing to do, the only effect is to suppress the core's
warning.

This prepares the driver for the conversion to .remove_new().

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 15:34:52 +02:00
Andy Shevchenko
10f94f9cad pinctrl: core: Remove unneeded {} around one line conditional body
The one line conditional body doesn't require {} surrounding it.
Remove unneeded {}.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231003120648.2838047-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 14:05:38 +02:00
Zev Weiss
d875d6ccd3 pinctrl: aspeed: Allow changing SPI mode from hardware strap defaults
Some platforms unfortunately have their SPI mode selection bits
strapped incorrectly (such as being configured for passthrough mode
when master mode is in fact the only useful configuration for it) and
thus require correction in software.  Add the SPI mode bits to the
GPIO passthrough bits as the exceptions to the read-only rule for the
hardware strap register so that the pinctrl subsystem can be used for
such corrections.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20231005030849.11352-2-zev@bewilderbeest.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 14:01:30 +02:00
Fabio Estevam
54a33423f2 pinctrl: mxs: Remove undocumented 'fsl,mxs-gpio' property
The 'fsl,mxs-gpio' property is not documented in gpio-mxs.yaml, but
the imx23 and imx28 dtsi describe the gpios as:

compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";

This gives schema warnings like:

imx28-cfa10037.dtb: pinctrl@80018000: gpio@0:compatible: ['fsl,imx28-gpio', 'fsl,mxs-gpio'] is too long
	from schema $id: http://devicetree.org/schemas/gpio/gpio-mxs.yaml#

"fsl,mxs-gpio" is only used inside pinctrl-mxs, but can be removed if
the compatible check is done against fsl,imx23-gpio and fsl,imx28-gpio.

Introduce is_mxs_gpio() and remove the need for "fsl,mxs-gpio".

Tested on a imx28-evk.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Link: https://lore.kernel.org/r/20230928134321.438547-1-festevam@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 13:41:37 +02:00
Biju Das
2e44555b05 pinctrl: mcp23s08: Simplify probe()/mcp23s08_spi_regmap_init()
Add struct mcp23s08_info and simplify probe()/mcp23s08_spi_regmap_init() by
replacing match data 'type' with 'struct mcp23s08_info'.

While at it, replace 'dev_err()'->'dev_err_probe()' and drop printing
'type' in error path for i2c_get_match_data().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231001150113.7752-4-biju.das.jz@bp.renesas.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 13:39:38 +02:00
Biju Das
b03f7aa802 pinctrl: mcp23s08_spi: Simplify probe()
Simpilfy probe() by replacing device_get_match_data() and ID lookup for
retrieving match data by spi_get_device_match_data().

While at it, replace data type of variable type from 'int'->'unsigned int'
and declare variables following a reverse christmas tree order.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231001150113.7752-3-biju.das.jz@bp.renesas.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 13:39:38 +02:00
Biju Das
880d3fcbe5 pinctrl: mcp23s08_i2c: Extend match support for OF tables
The driver has OF match table, still it uses ID lookup table for
retrieving match data. Currently the driver is working on the
assumption that a I2C device registered via OF will always match a
legacy I2C device ID. The correct approach is to have an OF device ID
table using of_device_match_data() if the devices are registered via OF.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231001150113.7752-2-biju.das.jz@bp.renesas.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-10 13:39:38 +02:00
Mateusz Majewski
8aec97decf pinctrl: samsung: do not offset pinctrl numberspaces
Past versions of this driver have manually calculated base values for
both the pinctrl numberspace and the global GPIO numberspace, giving
both the same values. This was necessary for the global GPIO
numberspace, since its values need to be unique system-wide. However, it
was not necessary for the pinctrl numberspace, since its values only
need to be unique for a single instance of the pinctrl device. It was
just convenient to use the same values for both spaces.

Right now those calculations are only used for the pinctrl numberspace,
since GPIO numberspace bases are selected by the GPIO subsystem.
Therefore, those calculations are unnecessary.

Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20231006125557.212681-5-m.majewski2@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-09 12:37:21 +02:00
Mateusz Majewski
deb79167e1 pinctrl: samsung: choose GPIO numberspace base dynamically
Selecting it statically is deprecated and results in a warning while
booting the system:

gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation.

Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20231006125557.212681-4-m.majewski2@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-09 12:37:21 +02:00
Mateusz Majewski
bf128c1f0f pinctrl: samsung: use add_pin_ranges method to add pinctrl ranges
This is preferable since we can read the base in the global GPIO
numberspace from the chip instead of needing to select it ourselves.

Past versions could not do this, since they needed to add all the ranges
before enabling the pinctrl subsystem, which was done before registering
the GPIO chip. However, right now we enable the pinctrl subsystem after
registering the chip and so this became possible.

Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20231006125557.212681-3-m.majewski2@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-09 12:37:21 +02:00
Mateusz Majewski
2aca5c591e pinctrl: samsung: defer pinctrl_enable
dev_pinctrl_register function immediately enables the pinctrl subsystem,
which is unpreferable in general, since drivers might be unable to
handle calls immediately. Hence devm_pinctrl_register_and_init, which
does not call pinctrl_enable, is preferred.

In case of our driver using the old function does not seem to be
problematic for now, but will become an issue when we postpone parts of
pinctrl initialization in a future commit, and it is a good idea to move
off a deprecated-ish function anyway.

Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20231006125557.212681-2-m.majewski2@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-09 12:37:20 +02:00
Kees Cook
4e1e21117e pinctrl: samsung: Annotate struct exynos_muxed_weint_data with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time via CONFIG_UBSAN_BOUNDS (for
array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).

As found with Coccinelle[1], add __counted_by for struct
exynos_muxed_weint_data. Additionally, since the element count member
must be set before accessing the annotated flexible array member, move
its initialization earlier.

Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: "Gustavo A. R. Silva" <gustavoars@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-hardening@vger.kernel.org
Link: https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci [1]
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/20231006201707.work.405-kees@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-08 13:36:40 +02:00
Linus Walleij
0aa5369fdb pinctrl: realtek: Fix some NULL dereference warnings
Just inspecting the code doesn't convince me that this is a real
issue, but the tools complain that it is so I will just handle it.

Cc: Tzuyi Chang <tychang@realtek.com>
Link: https://lore.kernel.org/oe-kbuild-all/202309270234.aJGlDE0P-lkp@intel.com/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231006-fix-realtek-warnings-v1-2-09af253312ba@linaro.org
2023-10-06 23:11:32 +02:00
Linus Walleij
d48f8a6f4a pinctrl: realtek: Tag unused pins as __maybe_unused
These pin definitions are helpful to have when working with the
driver in the future, so they are in a sense a bit like
documentation. They could be commented out as well, but why.

This should fix these build warnings:

drivers/pinctrl/realtek/pinctrl-rtd1315e.c:231:35: warning:
'rtd1315e_boot_sel_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1315e.c:231:35: warning:
'rtd1315e_reset_n_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1315e.c:231:35: warning:
'rtd1315e_scan_switch_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1315e.c:231:35: warning:
'rtd1315e_testmode_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1315e.c:231:35: warning:
'rtd1315e_wd_rset_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1319d.c:237:35: warning:
'rtd1319d_boot_sel_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1319d.c:237:35: warning:
'rtd1319d_reset_n_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1319d.c:237:35: warning:
'rtd1319d_scan_switch_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1319d.c:237:35: warning:
'rtd1319d_testmode_pins' defined but not used [-Wunused-const-variable=]
drivers/pinctrl/realtek/pinctrl-rtd1319d.c:237:35: warning:
'rtd1319d_wd_rset_pins' defined but not used [-Wunused-const-variable=]

Cc: Tzuyi Chang <tychang@realtek.com>
Link: https://lore.kernel.org/oe-kbuild-all/202309270313.mBEc9o1A-lkp@intel.com/
Link: https://lore.kernel.org/oe-kbuild-all/202309270448.7Aen3Sgx-lkp@intel.com/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231006-fix-realtek-warnings-v1-1-09af253312ba@linaro.org
2023-10-06 23:11:32 +02:00
Dan Carpenter
8c58f51ff3 pinctrl: realtek: Fix error handling in probe()
There are several issues in the probe function:
1) of_iomap() return NULL on error but the code checks for error
   pointers.
2) pinctrl_register() is the reverse.  It returns error pointers
   but the code checks for NULL.
3) The error paths need to call iounmap(data->base) before returning
   to avoid a resource leak.

Fixes: e99ce78030 ("pinctrl: realtek: Add common pinctrl driver for Realtek DHC RTD SoCs")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/590b337a-13ce-4391-a09d-d2b06fbc912d@moroto.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-06 23:05:28 +02:00
Andy Shevchenko
d59b099c66 pinctrl: cherryview: Simplify code with cleanup helpers
Use macros defined in linux/cleanup.h to automate resource lifetime
control in the driver.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-06 13:36:56 +03:00
Andy Shevchenko
d338655215 pinctrl: cherryview: Avoid duplicated I/O
In some cases we already read the value from the register followed
by a reading of it again for other purposes, but the both reads
are under the lock and bits we are insterested in are not going
to change (they are not volatile from HW perspective). Hence, no
need to read the same register twice.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-06 13:35:39 +03:00
Andy Shevchenko
3013c7f778 pinctrl: denverton: Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()
As Krzysztof pointed out the better is to use MODULE_DEVICE_TABLE()
as it will be consistent with the content of the real ID table of
the platform devices.

Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-06 11:23:25 +03:00
Andy Shevchenko
a9d7dfaaa8 pinctrl: broxton: Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE()
As Krzysztof pointed out the better is to use MODULE_DEVICE_TABLE()
as it will be consistent with the content of the real ID table of
the platform devices.

Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-06 11:23:10 +03:00
Andy Shevchenko
f2bbe6f1f4 pinctrl: moorefield: Replace kernel.h by what is actually being used
The kernel.h is a mess of unrelated things and we only used it
as a proxy to array_size.h, hence switch from former to the latter.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:31 +03:00
Andy Shevchenko
068866fb5c pinctrl: merrifield: Replace kernel.h by what is actually being used
The kernel.h is a mess of unrelated things and we only used it
as a proxy to array_size.h, hence switch from former to the latter.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:31 +03:00
Andy Shevchenko
1cb71a63f6 pinctrl: lynxpoint: Replace kernel.h by what is actually being used
The kernel.h is a mess of unrelated things and we only used it
as a proxy to array_size.h, hence switch from former to the latter.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:31 +03:00
Andy Shevchenko
315ef5fcd2 pinctrl: cherryview: Replace kernel.h by what is actually being used
The kernel.h is a mess of unrelated things and we only used it
as a proxy to array_size.h, hence switch from former to the latter.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:30 +03:00
Andy Shevchenko
a4877a858e pinctrl: baytrail: Replace kernel.h by what is actually being used
The kernel.h is a mess of unrelated things and we only used it
as a proxy to array_size.h, hence switch from former to the latter.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:30 +03:00
Raag Jadav
67c9e830d0 pinctrl: lynxpoint: drop runtime PM support
Since Lynxpoint pinctrl device is not attached to acpi_lpss_pm_domain,
runtime PM serves no purpose here. Drop it and switch to pm_sleep_ptr()
as now we only have resume handle in place.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20231003114036.27674-3-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:30 +03:00
Raag Jadav
8fd516168d pinctrl: baytrail: drop runtime PM support
Since Baytrail pinctrl device is not attached to acpi_lpss_pm_domain,
runtime PM serves no purpose here. Drop it and switch to pm_sleep_ptr()
as now we only have suspend and resume handles in place.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20231003114036.27674-2-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:30 +03:00
Raag Jadav
1209d59070 pinctrl: intel: refine intel_config_set_pull() function
Improve intel_config_set_pull() implementation in Intel pinctrl driver by:

- Reducing scope of spinlock by moving unneeded operations out of it.
- Utilizing temporary variables for common operations.
- Limiting IO operations to positive cases.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:30 +03:00
Andy Shevchenko
f29047a09b pinctrl: intel: Replace kernel.h by what is actually being used
The kernel.h is a mess of unrelated things and we only used it
as a proxy to array_size.h, hence switch from former to the latter.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:30 +03:00
Andy Shevchenko
82cc14c993 pinctrl: Replace kernel.h by what is actually being used
The kernel.h is a mess of unrelated things and we only used it
as a proxy to array_size.h, hence switch from former to the latter.

While at it, group and sort the headers where it makes sense.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-10-03 16:29:30 +03:00
Linus Walleij
1c0b3cbe7f pinctrl: renesas: Updates for v6.7
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.7

  - Miscellaneous fixes and improvements.
2023-10-02 09:49:47 +02:00
Andy Shevchenko
cec422ab8c pinctrl: denverton: Enable platform device in the absence of ACPI enumeration
This is to cater the need for non-ACPI system whereby
a platform device has to be created in order to bind
with the Denverton pinctrl platform driver.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-09-27 15:18:22 +03:00
Kees Cook
e8b4ff6a85 pinctrl: uniphier: Annotate struct uniphier_pinctrl_reg_region with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).

As found with Coccinelle[1], add __counted_by for struct uniphier_pinctrl_reg_region.

[1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: linux-gpio@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-by: "Gustavo A. R. Silva" <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/20230922175006.work.421-kees@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-27 10:59:06 +02:00
Luca Ceresoli
b50df2f58a pinctrl: tegra: add OF node when logging OF parsing errors
These errors are not quite clear without also logging they device tree node
being parsed, especially when the pinmux node has lots of subnodes. Adding
the node name helps a lot in finding the node that triggers the error.

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20230926103938.334055-1-luca.ceresoli@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-27 10:54:59 +02:00
Linus Walleij
8be586f78d Revert "pinctrl: tegra: Add support to display pin function"
This reverts commit d1cd5b51bc.

It was reported that some I2C3 functions stop working after this
patch, and it is just debug help so let's revert it and investigate.

Link: https://lore.kernel.org/linux-gpio/20230925183049.10a40546@booty/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-27 10:51:57 +02:00
Matti Lehtimäki
1d4b7855b1 pinctrl: qcom: msm8974: Add MPM pin mappings
Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
through MPM-connected pins.

Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Reviewed-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230923131432.21721-3-matti.lehtimaki@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-27 10:43:51 +02:00
Matti Lehtimäki
259fe3cbf2 pinctrl: qcom: msm8226: Add MPM pin mappings
Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
through MPM-connected pins.

Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Reviewed-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230923131432.21721-2-matti.lehtimaki@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-27 10:43:51 +02:00
Luca Weiss
52d637cd92 pinctrl: qcom: msm8226: Add blsp_i2c6 function
On GPIO22 and GPIO23 there is another I2C bus. Add the function for it.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230922-msm8226-i2c6-v2-2-3fb55c47a084@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-27 10:42:26 +02:00
Karina Yankevich
96a35cf6a4 pinctrl: mediatek: moore: handle mtk_hw_set_value() errors in mtk_pinmux_set_mux()
mtk_pinmux_set_mux() doesn't check the result of mtk_hw_set_value()
despite it may return a negative error code. Propagate error code
to caller functions.

Found by Linux Verification Center (linuxtesting.org) with the Svace static
analysis tool.

Signed-off-by: Karina Yankevich <k.yankevich@omp.ru>
Link: https://lore.kernel.org/r/20230922135926.3653428-2-k.yankevich@omp.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-27 10:39:29 +02:00
Karina Yankevich
3d855c3f2e pinctrl: mediatek: paris: handle mtk_hw_set_value() errors in mtk_pmx_set_mux()
mtk_pmx_set_mux() doesn't check the result of mtk_hw_set_value()
despite it may return negative error code. Propagate error code
to caller functions.

Found by Linux Verification Center (linuxtesting.org) with the Svace static
analysis tool.

Signed-off-by: Karina Yankevich <k.yankevich@omp.ru>
Link: https://lore.kernel.org/r/20230922135926.3653428-1-k.yankevich@omp.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-27 10:39:29 +02:00
Andy Shevchenko
9419ae7e40 pinctrl: intel: Simplify code with cleanup helpers
Use macros defined in linux/cleanup.h to automate resource lifetime
control in the driver.

While at it, unify the variables and approach in intel_gpio_irq_*().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-26 22:16:38 +03:00
Geert Uytterhoeven
c385256611 pinctrl: renesas: rzg2l: Rename rzg2l_gpio_configs[]
The rzg2l_gpio_configs array is really related to the RZ/G2L (R9A07G044)
Soc only.  Hence rename it to r9a07g044_gpio_configs[].

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/19958e63a2b793be5182640c4301ec5a77a507f6.1695369116.git.geert+renesas@glider.be
2023-09-26 09:44:51 +02:00
Biju Das
dd462cf53e pinctrl: renesas: rzg2l: Make reverse order of enable() for disable()
We usually do reverse order of enable() for disable(). Currently, the
ordering of irq_chip_disable_parent() is not correct in
rzg2l_gpio_irq_disable(). Fix the incorrect order.

Fixes: db2e5f21a4 ("pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230918123355.262115-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-09-26 09:44:51 +02:00
Claudiu Beznea
84c580e969 pinctrl: renesas: rzg2l: Make struct rzg2l_pinctrl_data::dedicated_pins constant
struct rzg2l_pinctrl_data::dedicated_pins is constant thus mark it so.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230912045157.177966-29-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-09-26 09:44:51 +02:00
Linus Walleij
34d7c484c5 Merge branch 'ib-amlogic-t7' into devel 2023-09-25 15:49:35 +02:00
Huqiang Qin
9681df024c pinctrl: Add driver support for Amlogic T7 SoCs
Add a new pinctrl driver for Amlogic T7 SoCs which share
the same register layout as the previous Amlogic S4.

Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Link: https://lore.kernel.org/r/20230922094342.637251-3-huqiang.qin@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-25 15:49:18 +02:00
Dmitry Torokhov
c153a4edff pinctrl: avoid unsafe code pattern in find_pinctrl()
The code in find_pinctrl() takes a mutex and traverses a list of pinctrl
structures. Later the caller bumps up reference count on the found
structure. Such pattern is not safe as pinctrl that was found may get
deleted before the caller gets around to increasing the reference count.

Fix this by taking the reference count in find_pinctrl(), while it still
holds the mutex.

Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Link: https://lore.kernel.org/r/ZQs1RgTKg6VJqmPs@google.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-25 15:29:26 +02:00
iuncuim
44da5bf49b pinctrl: sunxi: h616: add extra gpio banks
Some SoCs from the H616 family (such as the T507) have the same die but
more output pins that are used for additional peripherals. The T507 SoC
don't have a built-in multiphy like the AC200 or AC300 connected to the
bank A. With the T507 these pins can be freely used for any other application.
This patch adds the missing muxes on banks A, D and E.

Thanks to Samuel and Andre for the review.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20230916081615.4237-1-iuncuim@gmail.com
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-25 15:26:33 +02:00
Joe Wang
0ec8ae4313 pinctrl: pinctrl-aspeed-g6: Add more settings for USB2AHP function
AST2600 USB2AHP (USB PortA: PCIe EHCI to PHY) function needs to set the
register SCUC20[16]. Set it to enable the PCIe EHCI device on PCIe bus.
Besides, also add USB2AHP signal expressions into pin declarations.

Signed-off-by: Joe Wang <joe_wang@aspeedtech.com>
Link: https://lore.kernel.org/r/20230920103332.274151-1-joe_wang@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-25 14:32:39 +02:00
Tzuyi Chang
c7910f6aca pinctrl: realtek: Add pinctrl driver for RTD1619B
Add RTD1619B support using realtek common pinctrl driver.

Signed-off-by: Tzuyi Chang <tychang@realtek.com>
Link: https://lore.kernel.org/r/20230919101117.4097-5-tychang@realtek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-20 13:07:19 +02:00
Tzuyi Chang
916cc2b734 pinctrl: realtek: Add pinctrl driver for RTD1319D
Add RTD1319D support using realtek common pinctrl driver.

Signed-off-by: Tzuyi Chang <tychang@realtek.com>
Link: https://lore.kernel.org/r/20230919101117.4097-4-tychang@realtek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-20 13:07:19 +02:00
Tzuyi Chang
aa399e6c6b pinctrl: realtek: Add pinctrl driver for RTD1315E
Add RTD1315E support using realtek common pinctrl driver.

Signed-off-by: Tzuyi Chang <tychang@realtek.com>
Link: https://lore.kernel.org/r/20230919101117.4097-3-tychang@realtek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-20 13:07:18 +02:00
Tzuyi Chang
e99ce78030 pinctrl: realtek: Add common pinctrl driver for Realtek DHC RTD SoCs
The RTD SoCs share a similar design for pinmux and pinconfig.
This common pinctrl driver supports different variants within the RTD
SoCs.

Signed-off-by: Tzuyi Chang <tychang@realtek.com>
Link: https://lore.kernel.org/r/20230919101117.4097-2-tychang@realtek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-20 13:07:18 +02:00
Linus Walleij
f3244b6551 pinctrl: nuvoton: Fix up Kconfig deps
We have build errors due to missing dependency on OF.
Add the dependency and do it the same way for all three
Nuvotons while we are at it.

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230913-novoton-kconfig-v1-1-1c2dff14c0d2@linaro.org
2023-09-13 12:45:31 +02:00
Raag Jadav
2d325e54d9 pinctrl: baytrail: fix debounce disable case
We don't need to update debounce pulse value in case debounce is to be
disabled. Break such a case where arg value is zero.

Fixes: 4cfff5b7af ("pinctrl: baytrail: consolidate common mask operation")
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/linux-gpio/d164d471-5432-4c3c-afdb-33dc8f53d043@moroto.mountain/
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-09-12 19:41:16 +03:00
Jernej Skrabec
c9336ebe87 pinctrl: pinmux: Remove duplicate error message in pin_request()
Detailed error message is already printed at the end of the function, so
drop redundant one a few lines earlier.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230909063613.2867-2-jernej.skrabec@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 10:16:14 +02:00
Biju Das
70a3894c0a pinctrl: sx150x: Simplify probe()
Simpilfy probe() by replacing of_device_get_match_data() and ID lookup for
retrieving match data by i2c_get_match_data().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20230909110459.12453-1-biju.das.jz@bp.renesas.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 10:12:36 +02:00
Hal Feng
64061b6733 pinctrl: starfive: jh7110: Add system pm ops to save and restore context
Add system pm ops to save and restore pinctrl registers
when suspending and resuming the driver, respectively.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230905122105.117000-3-hal.feng@starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 10:09:40 +02:00
Hal Feng
8406d6b591 pinctrl: starfive: jh7110: Fix failure to set irq after CONFIG_PM is enabled
The issue was found when we enabled CONFIG_PM and tested edge events using
libgpiod.

> # gpiomon -r gpiochip0 55
> gpiomon: error waiting for events: Permission denied

`gpiomon` will call irq_chip_pm_get() and then call pm_runtime_resume_and_get()
if (IS_ENABLED(CONFIG_PM) && sfp->gc.irq.domain->pm_dev).
pm_runtime_resume_and_get() will fail if the runtime pm of pinctrl device
is disabled.

As we expect the pinctrl driver can be always working and never suspend
during runtime, unset sfp->gc.irq.domain->pm_dev to make sure
pm_runtime_resume_and_get() won't be called when setting irq.

Fixes: 447976ab62 ("pinctrl: starfive: Add StarFive JH7110 sys controller driver")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230905122105.117000-2-hal.feng@starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 10:09:40 +02:00
Bartosz Golaszewski
a5c612b9db pinctrl: da9062: don't include private GPIOLIB header
gpiochip_get_desc() now lives in linux/gpio/driver.h and there is no
longer any need to include GPIOLIB's private header.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 10:06:01 +02:00
Bartosz Golaszewski
d56c6f798a pinctrl: da9062: add missing include
gpiod_is_active_low() is defined in linux/gpio/consumer.h. It's only
because we're pulling in the gpiolib.h private header that we get this
declaration implicitly but let's fix it as that is going away soon.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 10:05:55 +02:00
Biju Das
71567fbd1d pinctrl: cy8c95x0: Simplify probe()
Simpilfy probe() by replacing device_get_match_data() and ID lookup for
retrieving match data by i2c_get_match_data().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230902082225.8777-1-biju.das.jz@bp.renesas.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 09:56:54 +02:00
Konrad Dybcio
68a2f05fec pinctrl: qcom: sdm660: Add MPM pin mappings
Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
through MPM-connected pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230809-topic-mpm_mappings-v2-4-4c2b4495e654@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 09:25:20 +02:00
Konrad Dybcio
9395f831ac pinctrl: qcom: sm6125: Add MPM pin mappings
Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
through MPM-connected pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230809-topic-mpm_mappings-v2-3-4c2b4495e654@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 09:25:20 +02:00
Konrad Dybcio
bd1b24686b pinctrl: qcom: sm6115: Add MPM pin mappings
Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
through MPM-connected pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230809-topic-mpm_mappings-v2-2-4c2b4495e654@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 09:25:20 +02:00
Konrad Dybcio
89670ec0c9 pinctrl: qcom: msm8996: Add MPM pin mappings
Add pin <-> wakeirq mappings to allow for waking up the AP from sleep
through MPM-connected pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230809-topic-mpm_mappings-v2-1-4c2b4495e654@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 09:25:20 +02:00
Mikhail Kobuk
87d315a341 pinctrl: nuvoton: wpcm450: fix out of bounds write
Write into 'pctrl->gpio_bank' happens before the check for GPIO index
validity, so out of bounds write may happen.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Fixes: a1d1e0e3d8 ("pinctrl: nuvoton: Add driver for WPCM450")
Signed-off-by: Mikhail Kobuk <m.kobuk@ispras.ru>
Reviewed-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20230825101532.6624-1-m.kobuk@ispras.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-12 09:03:18 +02:00
Tomer Maimon
acf4884a57 pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver
Add pinctrl and GPIO controller driver support to Arbel BMC NPCM8XX SoC.

Arbel BMC NPCM8XX pinctrl driver based on Poleg NPCM7XX, except the
pin mux mapping difference the NPCM8XX GPIO supports adjust debounce
period time.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20230828140849.21724-3-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11 15:51:40 +02:00
Geert Uytterhoeven
27e55fdff2 pinctrl: nuvoton: Use pinconf_generic_dt_node_to_map_all()
Use the pinconf_generic_dt_node_to_map_all() helper instead of
open-coding the same operation, to avoid having to provide custom
pinctrl_ops.dt_node_to_map() callbacks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/81e9ab48f78d63153b23a163b3349b3059d2b7fc.1692871558.git.geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11 15:47:05 +02:00
Geert Uytterhoeven
d168ccdf50 pinctrl: berlin: Drop superfluous ampersands
There is no need to use an ampersand to take the address of a function.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Link: https://lore.kernel.org/r/0ff17be9b31c9fcf03481c0665293b98ced741f7.1692871243.git.geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11 15:45:09 +02:00
Daniel Golle
01499e51d1 pinctrl: mediatek: mt7981: add additional uart groups
Add uart2_0_tx_rx (pin 4, 5) and uart1_2 (pins 9, 10) groups to the
pinctrl driver for the MediaTek MT7981 SoC.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/11db447f257231e08065989100311df57b7f1f1c.1693082594.git.daniel@makrotopia.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11 15:43:39 +02:00
YueHaibing
00078e834e pinctrl: lantiq: Remove unsued declaration ltq_pinctrl_unregister()
Commit 3f8c50c9b1 ("OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl support")
declared but never implemented it, so can be removed.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230825092706.14680-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11 15:42:12 +02:00
Geert Uytterhoeven
21c11421db pinctrl: renesas: r8a7779: s/LSBC/LBSC/
Fix a misspelling of "LBSC" (Local Bus State Controller).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/129f08c4246f88fd5a25ca5b82c255919b71ca6c.1693409115.git.geert+renesas@glider.be
2023-09-11 13:24:39 +02:00
Masahiro Yamada
af68c2af22 pinctrl: single: remove get rid of __maybe_unused
These are always used in pcs_probe().

While I was here, I also changed 'unsigned' in the same line to
'unsigned int' to address the checkpatch warnings:

  WARNING: Prefer 'unsigned int' to bare use of 'unsigned'

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Link: https://lore.kernel.org/r/20230824064508.968142-1-masahiroy@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11 10:49:18 +02:00
Linus Torvalds
4a3b1007ee Pin control bulk changes for the v6.6 kernel cycle:
No core changes this time.
 
 Drivers:
 
 - Intel Tangier SoC pin control support.
 
 - AMLogic C3 SoC pin control support.
 
 - Texas Instruments AM654 SoC pin control support.
 
 - Qualcomm SM8350 and SM6115 LPASS (Low Power Audio Sub-System)
   pin control support.
 
 - Qualcomm PMX75 and PM7550BA (Power Management) pin control
   support.
 
 - Qualcomm PMC8180 and PMC8180C (Power Management) pin control
   support.
 
 - DROP the Oxnas driver as there is not enough of community
   interest to keep carrying this ARM(11) port.
 
 Enhancements:
 
 - Bias control in the MT7986 pin control driver.
 
 - Misc device tree binding enhancements such as the Broadcom
   11351 being converted to YAML.
 
 - New macro: DEFINE_NOIRQ_DEV_PM_OPS() put to use.
 
 - Clean up some SPDX headers.
 
 - Handle non-unique devicetree subnode names in two Renesas
   drivers.
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Merge tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "We have some patches to DTS[I] files in arm and arm64 as well, that
  were merged here as DT headers were being changed.

  The most interesting stuff is the Intel Tangier chip support and
  AMLogic C3 in my opinion.

  No core changes this time.

  Drivers:

   - Intel Tangier SoC pin control support

   - AMLogic C3 SoC pin control support

   - Texas Instruments AM654 SoC pin control support

   - Qualcomm SM8350 and SM6115 LPASS (Low Power Audio Sub-System) pin
     control support

   - Qualcomm PMX75 and PM7550BA (Power Management) pin control support

   - Qualcomm PMC8180 and PMC8180C (Power Management) pin control
     support

   - DROP the Oxnas driver as there is not enough of community interest
     to keep carrying this ARM(11) port

  Enhancements:

   - Bias control in the MT7986 pin control driver

   - Misc device tree binding enhancements such as the Broadcom 11351
     being converted to YAML

   - New macro: DEFINE_NOIRQ_DEV_PM_OPS() put to use

   - Clean up some SPDX headers

   - Handle non-unique devicetree subnode names in two Renesas drivers"

* tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
  pinctrl: mlxbf3: Remove gpio_disable_free()
  pinctrl: use capital "OR" for multiple licenses in SPDX
  dt-bindings: pinctrl: renesas,rza2: Use 'additionalProperties' for child nodes
  pinctrl: cherryview: fix address_space_handler() argument
  pinctrl: intel: consolidate ACPI dependency
  pinctrl: tegra: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: mvebu: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: at91: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: cherryview: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  pm: Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper
  pinctrl: mediatek: assign functions to configure pin bias on MT7986
  pinctrl: mediatek: fix pull_type data for MT7981
  dt-bindings: pinctrl: aspeed: Allow only defined pin mux node properties
  dt-bindings: pinctrl: Drop 'phandle' properties
  pinctrl: lynxpoint: Make use of pm_ptr()
  pinctrl: baytrail: Make use of pm_ptr()
  pinctrl: intel: Switch to use exported namespace
  pinctrl: lynxpoint: reuse common functions from pinctrl-intel
  pinctrl: cherryview: reuse common functions from pinctrl-intel
  ...
2023-08-30 19:36:19 -07:00
Linus Torvalds
3b6bf5b1f8 spi: Updates for v6.6
There's been quite a lot of generic activity here, but more
 administrative than featuers.  We also have a bunch of new drivers,
 including one that's part of a MFD so we pulled in the core parts of
 that:
 
  - Lots of work from both Yang Yingliang and Andy Shevchenko on moving
    to host/device/controller based terminology for devices.
  - QuadSPI SPI support for Allwinner sun6i.
  - New device support Cirrus Logic CS43L43, Longsoon, Qualcomm GENI
    QuPv3 and StarFive JH7110 QSPI.
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Merge tag 'spi-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "There's been quite a lot of generic activity here, but more
  administrative than featuers. We also have a bunch of new drivers,
  including one that's part of a MFD so we pulled in the core parts of
  that:

   - Lots of work from both Yang Yingliang and Andy Shevchenko on moving
     to host/device/controller based terminology for devices.

   - QuadSPI SPI support for Allwinner sun6i.

   - New device support Cirrus Logic CS43L43, Longsoon, Qualcomm GENI
     QuPv3 and StarFive JH7110 QSPI"

* tag 'spi-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (151 commits)
  spi: at91-usart: Use PTR_ERR_OR_ZERO() to simplify code
  spi: spi-sn-f-ospi: switch to use modern name
  spi: sifive: switch to use modern name
  spi: sh: switch to use modern name
  spi: sh-sci: switch to use modern name
  spi: sh-msiof: switch to use modern name
  spi: sh-hspi: switch to use modern name
  spi: sc18is602: switch to use modern name
  spi: s3c64xx: switch to use modern name
  spi: rzv2m-csi: switch to use devm_spi_alloc_host()
  spi: rspi: switch to use spi_alloc_host()
  spi: rockchip: switch to use modern name
  spi: rockchip-sfc: switch to use modern name
  spi: realtek-rtl: switch to use devm_spi_alloc_host()
  spi: rb4xx: switch to use modern name
  spi: qup: switch to use modern name
  spi: spi-qcom-qspi: switch to use modern name
  spi: pxa2xx: switch to use modern name
  spi: ppc4xx: switch to use modern name
  spi: spl022: switch to use modern name
  ...
2023-08-29 09:47:33 -07:00
Linus Walleij
82a65f0844 intel-pinctrl for v6.6-1
* New library driver for Intel MID to deduplicate code (Raag Jadav)
 * Reuse common functions from pinctrl-intel to reduce the code (Raag Jadav)
 * Move most of the exported functions to the PINCTRL_INTEL namespace
 * Make use of pm_ptr() in Bay Trail and Lynxpoint drivers
 * Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper and use it in a few drivers
 * Consolidata ACPI dependency in Kconfig (Raag Jadav)
 * Fix address_space_handler() argument in Cherryview driver (Raag Jadav)
 * Optinmize byt_pin_config_set() to avoid IO in error cases (Raag Jadav)
 
 The following is an automated git shortlog grouped by driver:
 
 at91:
  -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
 
 baytrail:
  -  Make use of pm_ptr()
  -  reuse common functions from pinctrl-intel
  -  consolidate common mask operation
 
 cherryview:
  -  fix address_space_handler() argument
  -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
  -  reuse common functions from pinctrl-intel
 
 intel:
  -  consolidate ACPI dependency
  -  Switch to use exported namespace
  -  export common pinctrl functions
 
 lynxpoint:
  -  Make use of pm_ptr()
  -  reuse common functions from pinctrl-intel
 
 Merge patch series:
  - Merge patch series "Introduce Intel Tangier pinctrl driver"
  - Merge patch series "Reuse common functions from pinctrl-intel"
 
 merrifield:
  -  Adapt to Intel Tangier driver
 
 moorefield:
  -  Adapt to Intel Tangier driver
 
 mvebu:
  -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
 
 pm:
  -  Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper
 
 renesas:
  -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
 
 tangier:
  -  Introduce Intel Tangier driver
 
 tegra:
  -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
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Merge tag 'intel-pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v6.6-1

* New library driver for Intel MID to deduplicate code (Raag Jadav)
* Reuse common functions from pinctrl-intel to reduce the code (Raag Jadav)
* Move most of the exported functions to the PINCTRL_INTEL namespace
* Make use of pm_ptr() in Bay Trail and Lynxpoint drivers
* Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper and use it in a few drivers
* Consolidata ACPI dependency in Kconfig (Raag Jadav)
* Fix address_space_handler() argument in Cherryview driver (Raag Jadav)
* Optinmize byt_pin_config_set() to avoid IO in error cases (Raag Jadav)

The following is an automated git shortlog grouped by driver:

at91:
 -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper

baytrail:
 -  Make use of pm_ptr()
 -  reuse common functions from pinctrl-intel
 -  consolidate common mask operation

cherryview:
 -  fix address_space_handler() argument
 -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
 -  reuse common functions from pinctrl-intel

intel:
 -  consolidate ACPI dependency
 -  Switch to use exported namespace
 -  export common pinctrl functions

lynxpoint:
 -  Make use of pm_ptr()
 -  reuse common functions from pinctrl-intel

Merge patch series:
 - Merge patch series "Introduce Intel Tangier pinctrl driver"
 - Merge patch series "Reuse common functions from pinctrl-intel"

merrifield:
 -  Adapt to Intel Tangier driver

moorefield:
 -  Adapt to Intel Tangier driver

mvebu:
 -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper

pm:
 -  Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper

renesas:
 -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper

tangier:
 -  Introduce Intel Tangier driver

tegra:
 -  Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-25 15:47:18 +02:00
Asmaa Mnebhi
69657e60b8 pinctrl: mlxbf3: Remove gpio_disable_free()
Remove support for gpio_disable_free() because it is called when the libgpiod
command "gpioset" is invoked. This gives the GPIO control back to hardware which
cancels out the effort to set the GPIO value.

Reminder of the code flow to change a GPIO value from software:
1) All GPIOs are controlled by hardware by default
2) To change the GPIO value, enable software control via a mux.
3) Once software has control over the GPIO pin, the gpio-mlxbf3 driver
   will be able to change the direction and value of the GPIO.

When the user runs "gpioset gpiochip0 0=0" for example, the gpio
pin value should change from 1 to 0. In this case, mlxbf3_gpio_request_enable()
is called via gpiochip_generic_request(). The latter switches GPIO control from
hardware to software. Then the GPIO value is changed from 1 to 0. However,
gpio_disable_free() is also called which changes control back to hardware
which changes the GPIO value back to 1.

Fixes: d11f932808 ("pinctrl: mlxbf3: Add pinctrl driver support")
Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230818164314.8505-2-asmaa@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-25 15:44:15 +02:00
Krzysztof Kozlowski
c0f84760b0 pinctrl: use capital "OR" for multiple licenses in SPDX
Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR".  Correct it
to keep consistent format and avoid copy-paste issues.

Correct also the placement of SPDX identifier in pinctrl-meson-axg
files:

  WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230823085546.116494-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-23 14:31:58 +02:00
Raag Jadav
d5301c9071 pinctrl: cherryview: fix address_space_handler() argument
First argument of acpi_*_address_space_handler() APIs is acpi_handle of
the device, which is incorrectly passed in driver ->remove() path here.
Fix it by passing the appropriate argument and while at it, make both
API calls consistent using ACPI_HANDLE().

Fixes: a0b028597d ("pinctrl: cherryview: Add support for GMMR GPIO opregion")
Cc: stable@vger.kernel.org
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-22 14:51:10 +03:00
Raag Jadav
da41309b61 pinctrl: intel: consolidate ACPI dependency
Since all the Intel specific platform drivers depend on ACPI, we can
consolidate their config dependency.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-22 14:47:42 +03:00
Andy Shevchenko
83f7586f3b pinctrl: tegra: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
Since pm.h provides a helper for system no-IRQ PM callbacks,
switch the driver to use it instead of open coded variant.

With that, make sure the PM ops are used only in CONFIG_PM_SLEEP=y
case by wrapping them in pm_sleep_ptr() macro.

Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20230717172821.62827-11-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-21 19:07:44 +03:00
Andy Shevchenko
727eb02eb7 pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
Since pm.h provides a helper for system no-IRQ PM callbacks,
switch the driver to use it instead of open coded variant.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230717172821.62827-10-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-21 19:00:18 +03:00
Andy Shevchenko
c9008b71be pinctrl: mvebu: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
Since pm.h provides a helper for system no-IRQ PM callbacks,
switch the driver to use it instead of open coded variant.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20230717172821.62827-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-21 18:58:10 +03:00
Andy Shevchenko
f0d8d0eea5 pinctrl: at91: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
Since pm.h provides a helper for system no-IRQ PM callbacks,
switch the driver to use it instead of open coded variant.

With that switch pm_ptr() to pm_sleep_ptr() as the above
mentioned callbacks are only used for system sleep.

The use of the pm_sleep_ptr() macro allows the compiler
to always see the dev_pm_ops structure and related functions,
while still allowing the unused code to be removed, without
the need for the __maybe_unused markings.

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230717172821.62827-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-21 18:58:10 +03:00
Andy Shevchenko
e5f32bf097 pinctrl: cherryview: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
Since pm.h provides a helper for system no-IRQ PM callbacks,
switch the driver to use it instead of open coded variant.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230717172821.62827-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-21 18:58:10 +03:00
Daniel Golle
0d8387fba9 pinctrl: mediatek: assign functions to configure pin bias on MT7986
Assign bias_disable_get/set and bias_get/set functions to allow
configuring pin bias on MT7986.

Fixes: 2c58d8dc9c ("pinctrl: mediatek: add pull_type attribute for mediatek MT7986 SoC")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/47f72372354312a839b9337e09476aadcc206e8b.1692327317.git.daniel@makrotopia.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-21 12:39:11 +02:00
Daniel Golle
8f6f16fe15 pinctrl: mediatek: fix pull_type data for MT7981
MediaTek has released pull_type data for MT7981 in their SDK.
Use it and set functions to configure pin bias.

Fixes: 6c83b2d94f ("pinctrl: add mt7981 pinctrl driver")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/7bcc8ead25dbfabc7f5a85d066224a926fbb4941.1692327317.git.daniel@makrotopia.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-21 12:39:11 +02:00
Mario Limonciello
6bc3462a0f pinctrl: amd: Mask wake bits on probe again
Shubhra reports that their laptop is heating up over s2idle. Even though
it's getting into the deepest state, it appears to be having spurious
wakeup events.

While debugging a tangential issue with the RTC Carsten reports that recent
6.1.y based kernel face a similar problem.

Looking at acpidump and GPIO register comparisons these spurious wakeup
events are from the GPIO associated with the I2C touchpad on both laptops
and occur even when the touchpad is not marked as a wake source by the
kernel.

This means that the boot firmware has programmed these bits and because
Linux didn't touch them lead to spurious wakeup events from that GPIO.

To fix this issue, restore most of the code that previously would clear all
the bits associated with wakeup sources. This will allow the kernel to only
program the wake up sources that are necessary.

This is similar to what was done previously; but only the wake bits are
cleared by default instead of interrupts and wake bits.  If any other
problems are reported then it may make sense to clear interrupts again too.

Cc: Sachi King <nakato@nakato.io>
Cc: stable@vger.kernel.org
Cc: Thorsten Leemhuis <regressions@leemhuis.info>
Fixes: 65f6c7c91c ("pinctrl: amd: Revert "pinctrl: amd: disable and mask interrupts on probe"")
Reported-by: Shubhra Prakash Nandi <email2shubhra@gmail.com>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217754
Reported-by: Carsten Hatger <xmb8dsv4@gmail.com>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=217626#c28
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230818144850.1439-1-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-21 12:28:28 +02:00
Linus Walleij
6046c356ad pinctrl: renesas: Fixes for v6.5 (take two)
- Fix race conditions in pinctrl group and function creation/remove
     calls on the RZ/G2L, RZ/V2M, and RZ/A2 SoC families.
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Merge tag 'renesas-pinctrl-fixes-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into fixes

pinctrl: renesas: Fixes for v6.5 (take two)

  - Fix race conditions in pinctrl group and function creation/remove
    calls on the RZ/G2L, RZ/V2M, and RZ/A2 SoC families.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-21 12:24:33 +02:00
Andy Shevchenko
1956149dec pinctrl: lynxpoint: Make use of pm_ptr()
Cleaning up the driver to use pm_ptr() and *_PM_OPS() macros that
make it simpler and allows the compiler to remove those functions
if built without CONFIG_PM and CONFIG_PM_SLEEP support.

The lp_gpio_resume() is also assigned to .thaw and .restore members.
This is not a problem as the function it enables input pins that
had been disabled by firmware and repetion of that doesn't change
the pin configuration, i.e. it is idempotent.

Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20230717172821.62827-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-18 19:42:37 +03:00
Mark Brown
038e0da7ba Immutable branch between MFD, Pinctrl and soundwire due for the v6.6 merge window
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mfd: Immutable branch between MFD, Pinctrl and soundwire due for the v6.6 merge window

Merge tag 'ib-mfd-pinctrl-soundwire-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into tmp

Immutable branch between MFD, Pinctrl and soundwire due for the v6.6 merge window
2023-08-18 17:37:08 +01:00
Andy Shevchenko
df660f66ba pinctrl: baytrail: Make use of pm_ptr()
Cleaning up the driver to use pm_ptr() and *_PM_OPS() macros that
make it simpler and allows the compiler to remove those functions
if built without CONFIG_PM and CONFIG_PM_SLEEP support.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20230717172821.62827-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-18 19:35:28 +03:00
Biju Das
8fcc1c40b7 pinctrl: renesas: rza2: Add lock around pinctrl_generic{{add,remove}_group,{add,remove}_function}
The pinctrl group and function creation/remove calls expect
caller to take care of locking. Add lock around these functions.

Fixes: b59d0e7827 ("pinctrl: Add RZ/A2 pin and gpio controller")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230815131558.33787-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-08-18 13:01:41 +02:00
Biju Das
f982b9d57e pinctrl: renesas: rzv2m: Fix NULL pointer dereference in rzv2m_dt_subnode_to_map()
Fix the below random NULL pointer crash during boot by serializing
pinctrl group and function creation/remove calls in
rzv2m_dt_subnode_to_map() with mutex lock.

Crash logs:
    pc : __pi_strcmp+0x20/0x140
    lr : pinmux_func_name_to_selector+0x68/0xa4
    Call trace:
    __pi_strcmp+0x20/0x140
    pinmux_generic_add_function+0x34/0xcc
    rzv2m_dt_subnode_to_map+0x2e4/0x418
    rzv2m_dt_node_to_map+0x15c/0x18c
    pinctrl_dt_to_map+0x218/0x37c
    create_pinctrl+0x70/0x3d8

While at it, add a comment for lock.

Fixes: 92a9b82525 ("pinctrl: renesas: Add RZ/V2M pin and gpio controller driver")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230815131558.33787-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-08-18 13:01:41 +02:00
Biju Das
661efa2284 pinctrl: renesas: rzg2l: Fix NULL pointer dereference in rzg2l_dt_subnode_to_map()
Fix the below random NULL pointer crash during boot by serializing
pinctrl group and function creation/remove calls in
rzg2l_dt_subnode_to_map() with mutex lock.

Crash log:
    pc : __pi_strcmp+0x20/0x140
    lr : pinmux_func_name_to_selector+0x68/0xa4
    Call trace:
    __pi_strcmp+0x20/0x140
    pinmux_generic_add_function+0x34/0xcc
    rzg2l_dt_subnode_to_map+0x314/0x44c
    rzg2l_dt_node_to_map+0x164/0x194
    pinctrl_dt_to_map+0x218/0x37c
    create_pinctrl+0x70/0x3d8

While at it, add comments for bitmap_lock and lock.

Fixes: c4c4637eb5 ("pinctrl: renesas: Add RZ/G2L pin and gpio controller driver")
Tested-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230815131558.33787-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-08-18 13:01:41 +02:00
Charles Keepax
d5282a5392 pinctrl: cs42l43: Add support for the cs42l43
The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface
(Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed
for portable applications. It provides a high dynamic range, stereo
DAC for headphone output, two integrated Class D amplifiers for
loudspeakers, and two ADCs for wired headset microphone input or
stereo line input. PDM inputs are provided for digital microphones.

Add a basic pinctrl driver which supports driver strength for the
various pins, gpios, and pinmux for the 2 multi-function pins.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20230804104602.395892-5-ckeepax@opensource.cirrus.com
Signed-off-by: Lee Jones <lee@kernel.org>
2023-08-17 12:06:11 +01:00
Andy Shevchenko
34393c3678 pinctrl: intel: Switch to use exported namespace
We already have a few symbols exported in the namespace.
Let's do the same for others (except PM for now).

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 19:21:38 +03:00
Andy Shevchenko
563532b49a Merge patch series "Reuse common functions from pinctrl-intel"
Raag Jadav <raag.jadav@intel.com> says:

This series exports common pinctrl functions that are used across
Intel specific platform drivers to PINCTRL_INTEL namespace and
reuses them into Baytrail, Cherryview and Lynxpoint drivers.
This helps reduce their code and memory footprint.

X86 kernels are fairly unikernels such that pinctrl-intel driver is
enabled by most Linux distributions and most Intel specific platform
drivers (inside drivers/pinctrl/intel) depend on it.

The only exception to this is Lynxpoint. But taking into account its
fairly old age, it wouldn't suffer much from pinctrl-intel dependency.

bloat-o-meter:
==============

Intel:
add/remove: 17/10 grow/shrink: 0/0 up/down: 375/-319 (56)
Total: Before=9598, After=9654, chg +0.58%

Baytrail:
add/remove: 1/6 grow/shrink: 0/2 up/down: 41/-441 (-400)
Total: Before=16538, After=16138, chg -2.42%

Cherryview:
add/remove: 1/6 grow/shrink: 2/0 up/down: 90/-272 (-182)
Total: Before=18133, After=17951, chg -1.00%

Lynxpoint:
add/remove: 1/6 grow/shrink: 0/1 up/down: 24/-354 (-330)
Total: Before=7836, After=7506, chg -4.21%

Link: https://lore.kernel.org/r/20230814060311.15945-1-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:34:11 +03:00
Raag Jadav
976cf4a6ee pinctrl: lynxpoint: reuse common functions from pinctrl-intel
Reuse common functions from pinctrl-intel driver.
While at it, select pinctrl-intel for Intel Lynxpoint driver.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230814060311.15945-5-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:33:42 +03:00
Raag Jadav
a2118cebc6 pinctrl: cherryview: reuse common functions from pinctrl-intel
Reuse common functions from pinctrl-intel driver.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230814060311.15945-4-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:33:42 +03:00
Raag Jadav
4d01688fdf pinctrl: baytrail: reuse common functions from pinctrl-intel
Reuse common functions from pinctrl-intel driver.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230814060311.15945-3-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:33:42 +03:00
Raag Jadav
25018ace79 pinctrl: intel: export common pinctrl functions
Export common pinctrl functions that are used across Intel specific
platform drivers, so that they can be reused.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230814060311.15945-2-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:33:42 +03:00
Andy Shevchenko
e4e1718672 Merge patch series "Introduce Intel Tangier pinctrl driver"
Raag Jadav <raag.jadav@intel.com> says:

Merrifield and Moorefield pinctrl driver implementations are similar
in terms of how they access the hardware. We can consolidate their
pinctrl functionalities into a common library driver.

This patch set introduces:

1. Intel Tangier driver that supports the common pinctrl functionalities
   for Merrifield and Moorefield platforms.

2. Intel Tangier adaptation for Merrifield pinctrl driver.

3. Intel Tangier adaptation for Moorefield pinctrl driver.

Tested on Intel Edison platform.
No deviation observed in the contents of below entries before and after
this patchset.

- /proc/interrupts
- /sys/kernel/debug/gpio
- /sys/kernel/debug/pinctrl/*/pins

Link: https://lore.kernel.org/r/20230814054033.12004-1-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:32:21 +03:00
Raag Jadav
8574e4d994 pinctrl: moorefield: Adapt to Intel Tangier driver
Make use of Intel Tangier as a library driver for Moorefield.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Link: https://lore.kernel.org/r/20230814054033.12004-4-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:31:50 +03:00
Raag Jadav
4e1edcc7a9 pinctrl: merrifield: Adapt to Intel Tangier driver
Make use of Intel Tangier as a library driver for Merrifield.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Link: https://lore.kernel.org/r/20230814054033.12004-3-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:31:50 +03:00
Raag Jadav
79433559d2 pinctrl: tangier: Introduce Intel Tangier driver
Intel Tangier implements the common pinctrl functionalities for
Merrifield and Moorefield platforms.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Link: https://lore.kernel.org/r/20230814054033.12004-2-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 17:31:50 +03:00
Raag Jadav
4cfff5b7af pinctrl: baytrail: consolidate common mask operation
Consolidate common mask operation outside of switch cases and
limit IO operations to positive cases.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15 16:06:26 +03:00
Linus Walleij
cd40a1ffdd Qualcomm pinctrl changes for v6.6
1. Add support for the SM6115 and SM8350 LPASS (Low Power Audio
    SubSystem) TLMM pin controllers.
 
 2. Add bindings for the Qualcomm PMC8180 and PMC8180C PMICs GPIO pin
    controllers.
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Merge tag 'qcom-pinctrl-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel

Qualcomm pinctrl changes for v6.6

1. Add support for the SM6115 and SM8350 LPASS (Low Power Audio
   SubSystem) TLMM pin controllers.

2. Add bindings for the Qualcomm PMC8180 and PMC8180C PMICs GPIO pin
   controllers.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-15 11:09:06 +02:00
Neil Armstrong
e693b6a896 pinctrl: pinctrl-oxnas: remove obsolete pinctrl driver
Due to lack of maintenance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 pinctrl & gpio.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Acked-by: Andy Shevchenko <andy@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230814-topic-oxnas-upstream-remove-v3-1-04a0c5cdda52@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-15 11:06:32 +02:00
Ninad Naik
9757300d27 pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets
SA8775 and newer target have added support for an increased number of
interrupt targets. To implement this change, the intr_target field, which
is used to configure the interrupt target in the interrupt configuration
register is increased from 3 bits to 4 bits.

In accordance to these updates, a new intr_target_width member is
introduced in msm_pingroup structure. This member stores the value of
width of intr_target field in the interrupt configuration register. This
value is used to dynamically calculate and generate mask for setting the
intr_target field. By default, this mask is set to 3 bit wide, to ensure
backward compatibility with the older targets.

Fixes: 4b6b185599 ("pinctrl: qcom: add the tlmm driver sa8775p platforms")
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8775p-ride
Signed-off-by: Ninad Naik <quic_ninanaik@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230809100634.3961-1-quic_ninanaik@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-10 10:48:15 +02:00
Florian Fainelli
c9b2572f48 pinctrl: nsp-gpio: Silence probe deferral messages
We can have gpiochip_add_data() return -EPROBE_DEFER which will make
us produce the "unable to add GPIO chip" message which is confusing.
Use dev_err_probe() to silence probe deferral messages.

Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230808180733.2081353-3-florian.fainelli@broadcom.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-10 10:41:20 +02:00
Florian Fainelli
d2606a6365 pinctrl: iproc-gpio: Silence probe deferral messages
We can have gpiochip_add_data() return -EPROBE_DEFER which will make us
produce the "unable to add GPIO chip" message which is confusing. Use
dev_err_probe() to silence probe deferral messages.

Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230808180733.2081353-2-florian.fainelli@broadcom.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-10 10:41:20 +02:00
Tony Lindgren
0cec950d3f pinctrl: single: Add compatible for ti,am654-padconf
Use the "ti,am654-padconf" compatible to enable the use of wake-up enable
and event bits on K3 SOCs that support the daisychain feature

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230808102207.130177-3-d-gole@ti.com
[Alphabetized the compatible list]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-10 10:39:17 +02:00
Valentin Caron
32c170ff15 pinctrl: stm32: set default gpio line names using pin names
Add stm32_pctrl_get_desc_pin_from_gpio function to find a stm32 pin
descriptor which is matching with a gpio.
Most of the time pin number is equal to pin index in array. So the first
part of the function is useful to speed up.

And during gpio bank register, we set default gpio names with pin names.

Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@foss.st.com>
Link: https://lore.kernel.org/r/20230620104349.834687-1-valentin.caron@foss.st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-10 10:12:39 +02:00
Ruan Jinjie
fc8a2041be pinctrl: stmfx: Do not check for 0 return after calling platform_get_irq()
Since commit ce753ad154 ("platform: finally disallow IRQ0 in
platform_get_irq() and its ilk"), there is no possible for
platform_get_irq() to return 0. Use the return value
from platform_get_irq().

Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com>
Link: https://lore.kernel.org/r/20230803094304.733371-1-ruanjinjie@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-10 10:11:33 +02:00
Sergey Shtylyov
c7351b46d0 pinctrl: at91-pio4: drop useless check in atmel_conf_pin_config_dbg_show()
In atmel_conf_pin_config_dbg_show(), checking atmel_pioctrl->pins[pin_id]
against being NULL doesn't make any sense as it gets derefenced first and
the driver's probe() method immediately returns -ENOMEM when devm_kzalloc()
returns NULL for any atmel_pioctrl->pins[] element anyway, thus failing to
register the device...

Found by Linux Verification Center (linuxtesting.org) with the Svace static
analysis tool.

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/4ab2f59f-45c1-76a2-94da-3331e8ec4e35@omp.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-10 10:10:01 +02:00
Claudiu Beznea
f941714a7c pinctrl: mcp23s08: check return value of devm_kasprintf()
devm_kasprintf() returns a pointer to dynamically allocated memory.
Pointer could be NULL in case allocation fails. Check pointer validity.
Identified with coccinelle (kmerr.cocci script).

Fixes: 0f04a81784 ("pinctrl: mcp23s08: Split to three parts: core, I²C, SPI")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230621100409.1608395-1-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-10 09:56:31 +02:00
Huqiang Qin
eb3d3349a3 pinctrl: Replace the IRQ number in the driver with the IRQID macro definition
Replacing IRQ numbers with IRQID macro definitions makes driver code
easier to understand.

Associated platforms:
- Amlogic Meson-G12A
- Amlogic Meson-G12B
- Amlogic Meson-SM1

Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230724060108.1403662-3-huqiang.qin@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-07 15:35:23 +02:00
Sricharan Ramabadhran
0a80e1d3cf pinctrl: qcom: Remove the unused _groups variable build warning
When building with clang toolchain and arm64-randconfig-r015-20230712
kernel test robot reports the below warning.

 drivers/pinctrl/qcom/pinctrl-ipq5018.c:244:27: warning: unused variable '_groups' [-Wunused-const-variable]
   static const char * const _groups[] = {
                             ^
   1 warning generated.

     static const char * const _groups[] = {
             "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
             "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
             "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
             "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
             "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
             "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
             "gpio43", "gpio44", "gpio45", "gpio46",
   };

Fixing it by removing the variable.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202307120814.vWPY6URk-lkp@intel.com/
Fixes: 725d1c8916 ("pinctrl: qcom: Add IPQ5018 pinctrl driver")
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1689934361-32642-1-git-send-email-quic_srichara@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-07 11:01:31 +02:00
Konrad Dybcio
1b1db9e02a pinctrl: qcom: Introduce SM6115 LPI pinctrl driver
Add support for the pin controller block on SM6115's Low Power Island.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230722-topic-6115_lpasstlmm-v2-2-d4883831a858@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-07 10:51:45 +02:00
Sai Krishna Potthuri
0516dd6572 pinctrl: pinctrl-zynqmp: Add support for output-enable and bias-high impedance
Add support to handle 'output-enable' and 'bias-high-impedance'
configurations.

Using these pinctrl properties observed hang issues with older PMUFW(Xilinx
ZynqMP Platform Management Firmware), hence reverted the patch.
Commit 9989bc33c4 ("Revert "pinctrl: pinctrl-zynqmp: Add support
for output-enable and bias-high-impedance"").

Support for configuring these properties added in PMUFW Configuration Set
version 2.0. When there is a request for these configurations from pinctrl
driver for ZynqMP platform, xilinx firmware driver checks for this version
before configuring these properties to avoid the hang issue and proceeds
further only when firmware version is >=2 otherwise it returns error.

Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230731095026.3766675-5-sai.krishna.potthuri@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-07 10:48:03 +02:00
Linus Walleij
046d354675 pinctrl: renesas: Updates for v6.6
- Use the new devm_clk_get_enabled() helper.
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Merge tag 'renesas-pinctrl-for-v6.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.6

  - Use the new devm_clk_get_enabled() helper.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-03 01:12:50 +02:00
Sergey Shtylyov
6ec89cd4d1 pinctrl: pinmux: handle radix_tree_insert() errors in pinmux_generic_add_function()
pinctrl_generic_add_function() doesn't check result of radix_tree_insert()
despite they both may return a negative error code.  Linus Walleij said he
has copied the radix tree code from kernel/irq/ where the functions calling
radix_tree_insert() are *void* themselves; I think it makes more sense to
propagate the errors from radix_tree_insert() upstream if we can do that...

Found by Linux Verification Center (linuxtesting.org) with the Svace static
analysis tool.

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/20230719202253.13469-4-s.shtylyov@omp.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-28 22:08:58 +02:00
Sergey Shtylyov
ecfe9a015d pinctrl: core: handle radix_tree_insert() errors in pinctrl_register_one_pin()
pinctrl_register_one_pin() doesn't check the result of radix_tree_insert()
despite they both may return a negative error code.  Linus Walleij said he
has copied the radix tree code from kernel/irq/ where the functions calling
radix_tree_insert() are *void* themselves; I think it makes more sense to
propagate the errors from radix_tree_insert() upstream if we can do that...

Found by Linux Verification Center (linuxtesting.org) with the Svace static
analysis tool.

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/20230719202253.13469-3-s.shtylyov@omp.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-28 22:08:58 +02:00
Sergey Shtylyov
b56e23bf0c pinctrl: core: handle radix_tree_insert() errors in pinctrl_generic_add_group()
pinctrl_generic_add_group() doesn't check the result of radix_tree_insert()
despite they both may return a negative error code.  Linus Walleij said he
has copied the radix tree code from kernel/irq/ where the functions calling
radix_tree_insert() are *void* themselves; I think it makes more sense to
propagate the errors from radix_tree_insert() upstream if we can do that...

Found by Linux Verification Center (linuxtesting.org) with the Svace static
analysis tool.

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/20230719202253.13469-2-s.shtylyov@omp.ru
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-28 22:08:58 +02:00
Konrad Dybcio
63f7c8445f pinctrl: qcom: Introduce SM6115 LPI pinctrl driver
Add support for the pin controller block on SM6115's Low Power Island.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230722-topic-6115_lpasstlmm-v2-2-d4883831a858@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-07-26 11:09:47 +02:00
Christophe JAILLET
95eb198694 pinctrl: renesas: rzg2l: Use devm_clk_get_enabled() helper
The devm_clk_get_enabled() helper:
   - calls devm_clk_get()
   - calls clk_prepare_enable() and registers what is needed in order to
     call clk_disable_unprepare() when needed, as a managed resource.

This simplifies the code and avoids the need of a dedicated function used
with devm_add_action_or_reset().

While at it, use dev_err_probe() which filters -EPROBE_DEFER.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a4a586337d692f0ca396b80d275ba634eb419593.1690058500.git.christophe.jaillet@wanadoo.fr
[geert: Make clk local to rzg2l_pinctrl_probe()]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-07-25 12:28:45 +02:00
Geert Uytterhoeven
f4b2ce40fd pinctrl: renesas: rzv2m: Use devm_clk_get_enabled() helper
Simplify clock handling by using the devm_clk_get_enabled() helper,
instead of open-coding the same operations.  Move the clock pointer from
the driver-private data to a local variable, as it is not needed outside
the .probe() callback.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cca0b1795fd0335401bdf2be393ab84445e04095.1688396836.git.geert+renesas@glider.be
2023-07-25 12:28:42 +02:00
Krzysztof Kozlowski
be9f6d5638 pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM
Add driver for pin controller in Low Power Audio SubSystem (LPASS).  The
driver is similar to SM8250 LPASS pin controller, with difference in one
new pin (gpio14) belonging to swr_tx_data.

Link: https://lore.kernel.org/r/20230719192058.433517-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-07-24 21:07:04 +02:00
Mario Limonciello
87b549efcb pinctrl: amd: Don't show Invalid config param errors
On some systems amd_pinconf_set() is called with parameters
0x8 (PIN_CONFIG_DRIVE_PUSH_PULL) or 0x14 (PIN_CONFIG_PERSIST_STATE)
which are not supported by pinctrl-amd.

Don't show an err message when called with an invalid parameter,
downgrade this to debug instead.

Cc: stable@vger.kernel.org # 6.1
Fixes: 635a750d95 ("pinctrl: amd: Use amd_pinconf_set() for all config options")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230717201652.17168-1-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-23 21:41:06 +02:00
Huqiang Qin
ea90ca106c pinctrl: Add driver support for Amlogic C3 SoCs
Add a new pinctrl driver for Amlogic C3 SoCs which share
the same register layout as the previous Amlogic S4.

Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Link: https://lore.kernel.org/r/20230714122441.3098337-3-huqiang.qin@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-23 21:23:27 +02:00
Rob Herring
060f03e954 pinctrl: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230714174901.4062397-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-20 21:41:24 +02:00
Konrad Dybcio
abf02e132c pinctrl: qcom: lpass-lpi: Make the clocks optional, always
Some platforms provide a single clock source to all LPASS peripherals,
others provide two, and there are probably others that provide it through
magic invisible-to-Linux wires.

Rely on bindings to mandate the adequate number of clocks necessary.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230714-topic-lpass_lpi_cleanup-v1-1-dc18b5bd14f7@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-20 21:37:42 +02:00
Prathamesh Shete
d1cd5b51bc pinctrl: tegra: Add support to display pin function
The current function for a given pin is not displayed via the debugfs.
Add support to display the current function that is set for each pin.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20230714113547.15384-1-pshete@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-20 21:34:53 +02:00
Mark Brown
f147624220 pinctrl: sunxi: Add some defensiveness for regulators array
The sunxi pinctrl has a fixed size array it uses to store regulators used
in the driver. There is currently nothing that ensures that the number of
elements in the array is large enough to map the regulators defined by the
individual SoCs. While this is currently the case having an explicit check
in there will make life easier for anyone debugging memory issues that
manifest in the driver so let's add one.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230712-pinctrl-sunxi-boudns-v1-1-85f37de79b9f@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-20 21:32:36 +02:00
Patrick Rudolph
99084881de pinctrl: cy8c95x0: Add reset support
This patch adds support for an optional "reset" GPIO pin in the cy8c95x0
pinctrl driver. On probe, the reset pin is pulled low to bring chip out
of reset. The reset pin has an internal pull-down and can be left
floating if not required.

The datasheet doesn't mention any timing related to the reset pin.

Based on empirical tests, it was found that the chip requires a
delay of 250 milliseconds before accepting I2C transfers after driving
the reset pin low. Therefore, a delay of 250ms is added before
proceeding with I2C transfers.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com>
Link: https://lore.kernel.org/r/20230714081902.2621771-2-Naresh.Solanki@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-20 21:18:21 +02:00
Yangtao Li
49104893fe pinctrl: ti: Convert to devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Yangtao Li <frank.li@vivo.com>
Link: https://lore.kernel.org/r/20230704124742.9596-4-frank.li@vivo.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-16 23:08:22 +02:00
Yangtao Li
885b129f61 pinctrl: pic32: Convert to devm_platform_ioremap_resource()
Use devm_platform_ioremap_resource() to simplify code.

Signed-off-by: Yangtao Li <frank.li@vivo.com>
Link: https://lore.kernel.org/r/20230704124742.9596-3-frank.li@vivo.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-16 23:08:22 +02:00
Yangtao Li
2d357f2566 pinctrl: mvebu: Use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Yangtao Li <frank.li@vivo.com>
Link: https://lore.kernel.org/r/20230704124742.9596-2-frank.li@vivo.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-16 23:08:22 +02:00
Yangtao Li
28d8eb3687 pinctrl: berlin: as370: Use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Yangtao Li <frank.li@vivo.com>
Link: https://lore.kernel.org/r/20230704124742.9596-1-frank.li@vivo.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-16 23:08:22 +02:00
Rohit Agarwal
1e46c7430a pinctrl: qcom-pmic-gpio: Add support for pmx75
pmx75 pmic support gpio controller so add compatible in the driver.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1688707209-30151-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-16 23:05:57 +02:00
Rohit Agarwal
8fff6514ff pinctrl: qcom-pmic-gpio: Add support for pm7550ba
pm7550ba pmic support gpio controller so add compatible in the driver.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1688707209-30151-4-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-16 23:05:57 +02:00
Linus Walleij
04e601f2a7 pinctrl: renesas: Fixes for v6.5
- Fix handling of non-unique pin control configuration subnode names
     on the RZ/V2M and RZ/G2L SoC families.
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Merge tag 'renesas-pinctrl-fixes-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into fixes

pinctrl: renesas: Fixes for v6.5

  - Fix handling of non-unique pin control configuration subnode names
    on the RZ/V2M and RZ/G2L SoC families.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-13 00:05:52 +02:00
Mario Limonciello
283c5ce7da pinctrl: amd: Unify debounce handling into amd_pinconf_set()
Debounce handling is done in two different entry points in the driver.
Unify this to make sure that it's always handled the same.

Tested-by: Jan Visser <starquake@linuxeverywhere.org>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230705133005.577-5-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-13 00:04:49 +02:00
Mario Limonciello
3f62312d04 pinctrl: amd: Drop pull up select configuration
pinctrl-amd currently tries to program bit 19 of all GPIOs to select
either a 4kΩ or 8hΩ pull up, but this isn't what bit 19 does.  Bit
19 is marked as reserved, even in the latest platforms documentation.

Drop this programming functionality.

Tested-by: Jan Visser <starquake@linuxeverywhere.org>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230705133005.577-4-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-13 00:04:43 +02:00
Mario Limonciello
635a750d95 pinctrl: amd: Use amd_pinconf_set() for all config options
On ASUS TUF A16 it is reported that the ITE5570 ACPI device connected to
GPIO 7 is causing an interrupt storm.  This issue doesn't happen on
Windows.

Comparing the GPIO register configuration between Windows and Linux
bit 20 has been configured as a pull up on Windows, but not on Linux.
Checking GPIO declaration from the firmware it is clear it *should* have
been a pull up on Linux as well.

```
GpioInt (Level, ActiveLow, Exclusive, PullUp, 0x0000,
	 "\\_SB.GPIO", 0x00, ResourceConsumer, ,)
{   // Pin list
0x0007
}
```

On Linux amd_gpio_set_config() is currently only used for programming
the debounce. Actually the GPIO core calls it with all the arguments
that are supported by a GPIO, pinctrl-amd just responds `-ENOTSUPP`.

To solve this issue expand amd_gpio_set_config() to support the other
arguments amd_pinconf_set() supports, namely `PIN_CONFIG_BIAS_PULL_DOWN`,
`PIN_CONFIG_BIAS_PULL_UP`, and `PIN_CONFIG_DRIVE_STRENGTH`.

Reported-by: Nik P <npliashechnikov@gmail.com>
Reported-by: Nathan Schulte <nmschulte@gmail.com>
Reported-by: Friedrich Vock <friedrich.vock@gmx.de>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217336
Reported-by: dridri85@gmail.com
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217493
Link: https://lore.kernel.org/linux-input/20230530154058.17594-1-friedrich.vock@gmx.de/
Tested-by: Jan Visser <starquake@linuxeverywhere.org>
Fixes: 2956b5d94a ("pinctrl / gpio: Introduce .set_config() callback for GPIO chips")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230705133005.577-3-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-13 00:04:28 +02:00
Mario Limonciello
0d5ace1a07 pinctrl: amd: Only use special debounce behavior for GPIO 0
It's uncommon to use debounce on any other pin, but technically
we should only set debounce to 0 when working off GPIO0.

Cc: stable@vger.kernel.org
Tested-by: Jan Visser <starquake@linuxeverywhere.org>
Fixes: 968ab92616 ("pinctrl: amd: Detect internal GPIO0 debounce handling")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230705133005.577-2-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-07-13 00:04:02 +02:00
Biju Das
bfc374a145 pinctrl: renesas: rzg2l: Handle non-unique subnode names
Currently, sd1 and sd0 have unique subnode names 'sd1_mux' and 'sd0_mux'.
If we change these to non-unique subnode names such as 'mux' this can
lead to the below conflict as the RZ/G2L pin control driver considers
only the names of the subnodes.

   pinctrl-rzg2l 11030000.pinctrl: pin P47_0 already requested by 11c00000.mmc; cannot claim for 11c10000.mmc
   pinctrl-rzg2l 11030000.pinctrl: pin-376 (11c10000.mmc) status -22
   pinctrl-rzg2l 11030000.pinctrl: could not request pin 376 (P47_0) from group mux  on device pinctrl-rzg2l
   renesas_sdhi_internal_dmac 11c10000.mmc: Error applying setting, reverse things back

Fix this by constructing unique names from the node names of both the
pin control configuration node and its child node, where appropriate.

Based on the work done by Geert for the RZ/V2M pinctrl driver.

Fixes: c4c4637eb5 ("pinctrl: renesas: Add RZ/G2L pin and gpio controller driver")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230704111858.215278-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-07-10 10:00:27 +02:00
Geert Uytterhoeven
f46a0b47cc pinctrl: renesas: rzv2m: Handle non-unique subnode names
The eMMC and SDHI pin control configuration nodes in DT have subnodes
with the same names ("data" and "ctrl").  As the RZ/V2M pin control
driver considers only the names of the subnodes, this leads to
conflicts:

    pinctrl-rzv2m b6250000.pinctrl: pin P8_2 already requested by 85000000.mmc; cannot claim for 85020000.mmc
    pinctrl-rzv2m b6250000.pinctrl: pin-130 (85020000.mmc) status -22
    renesas_sdhi_internal_dmac 85020000.mmc: Error applying setting, reverse things back

Fix this by constructing unique names from the node names of both the
pin control configuration node and its child node, where appropriate.

Reported by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>

Fixes: 92a9b82525 ("pinctrl: renesas: Add RZ/V2M pin and gpio controller driver")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Link: https://lore.kernel.org/r/607bd6ab4905b0b1b119a06ef953fa1184505777.1688396717.git.geert+renesas@glider.be
2023-07-10 10:00:22 +02:00
Linus Torvalds
28968f384b Pin control changes for the v6.5 kernel cycle:
No core changes this time.
 
 New drivers:
 
 - Tegra234 support.
 
 - Qualcomm IPQ5018 support.
 
 - Intel Meteor Lake-S support.
 
 - Qualcomm SDX75 subdriver.
 
 - Qualcomm SPMI-based PM8953 support.
 
 Improvements:
 
 - Fix up support for GPIO3 on the AXP209.
 
 - Push-pull drive configuration support for the AT91 PIO4.
 
 - Fix misc non-urgent bugs in the AMD driver.
 
 - Misc non-urgent improved error handling.
 
 - Misc janitorial and minor improvements.
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Merge tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No core changes this time

  New drivers:

   - Tegra234 support

   - Qualcomm IPQ5018 support

   - Intel Meteor Lake-S support

   - Qualcomm SDX75 subdriver

   - Qualcomm SPMI-based PM8953 support

  Improvements:

   - Fix up support for GPIO3 on the AXP209

   - Push-pull drive configuration support for the AT91 PIO4

   - Fix misc non-urgent bugs in the AMD driver

   - Misc non-urgent improved error handling

   - Misc janitorial and minor improvements"

* tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
  pinctrl: cherryview: Drop goto label
  pinctrl: baytrail: invert if condition
  pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure
  pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook
  pinctrl: tegra: avoid duplicate field initializers
  dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function
  pinctrl: mlxbf3: remove broken Kconfig 'select'
  pinctrl: spear: Remove unused of_gpio.h inclusion
  pinctrl: lantiq: Remove unused of_gpio.h inclusion
  pinctrl: at91-pio4: check return value of devm_kasprintf()
  pinctrl: microchip-sgpio: check return value of devm_kasprintf()
  pinctrl: freescale: Fix a memory out of bounds when num_configs is 1
  pinctrl: intel: refine ->irq_set_type() hook
  pinctrl: intel: refine ->set_mux() hook
  pinctrl: baytrail: Use str_hi_lo() helper
  lib/string_choices: Add str_high_low() helper
  lib/string_helpers: Split out string_choices.h
  lib/string_helpers: Add missing header files to MAINTAINERS database
  pinctrl: npcm7xx: Add missing check for ioremap
  pinctrl:sunplus: Add check for kmalloc
  ...
2023-06-30 14:57:19 -07:00
Linus Torvalds
a9025a5f16 ARM: New SoC support for 6.5
There are two new SoC families this time, and both appear fairly similar:
 The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core
 Cortex-A35 based chips for the low-power industrial embedded market,
 and they mark the first 64-bit product in a widely used family of 32-bit
 Arm MCUs and SoCs.
 
 The way into the kernel is completely different here: The team at ST has
 a long history of working upstream with their STM32MP1 and other SoCs,
 and they produced a complete port to arm64 together with the initial
 announcement. Nuvoton also has multiple SoC product lines with current
 or previous upstream support, but those are maintained by third parties
 and are unrelated. The patch series from Nuvoton's Jacky Huang had to
 go through many revisisions to get to this point and is still missing
 a few drivers including the serial port for the moment.
 
 The branch contains the devicetree files as well as all the code changes,
 in order to have something that can be tested standalone.
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Merge tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull new ARM SoC support from Arnd Bergmann:
 "There are two new SoC families this time, and both appear fairly
  similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are
  both dual-core Cortex-A35 based chips for the low-power industrial
  embedded market, and they mark the first 64-bit product in a widely
  used family of 32-bit Arm MCUs and SoCs.

  The way into the kernel is completely different here: The team at ST
  has a long history of working upstream with their STM32MP1 and other
  SoCs, and they produced a complete port to arm64 together with the
  initial announcement. Nuvoton also has multiple SoC product lines with
  current or previous upstream support, but those are maintained by
  third parties and are unrelated. The patch series from Nuvoton's Jacky
  Huang had to go through many revisisions to get to this point and is
  still missing a few drivers including the serial port for the moment.

  The branch contains the devicetree files as well as all the code
  changes, in order to have something that can be tested standalone"

* tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
  clk: nuvoton: Use clk_parent_data instead of string for parent clock
  clk: nuvoton: Update all constant hex values to lowercase
  clk: nuvoton: Add clk-ma35d1.h for driver extern functions
  remoteproc: stm32: use correct format strings on 64-bit
  MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
  arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
  arm64: dts: st: add stm32mp257f-ev1 board support
  dt-bindings: stm32: document stm32mp257f-ev1 board
  arm64: dts: st: introduce stm32mp25 pinctrl files
  arm64: dts: st: introduce stm32mp25 SoCs family
  arm64: introduce STM32 family on Armv8 architecture
  dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
  pinctrl: stm32: add stm32mp257 pinctrl support
  dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
  Documentation/process: add soc maintainer handbook
  reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35
  reset: Add Nuvoton ma35d1 reset driver support
  clk: nuvoton: Add clock driver for ma35d1 clock controller
  arm64: dts: nuvoton: Add initial ma35d1 device tree
  dt-bindings: serial: Document ma35d1 uart controller
  ...
2023-06-29 15:11:17 -07:00
Linus Torvalds
362067b6d5 regulator: Updates for v6.5
This release is almost all drivers, there's some small improvements in
 the core but otherwise everything is updates to drivers, mostly the
 addition of new ones.
 
 There's also a bunch of changes pulled in from the MFD subsystem as
 dependencies, Rockchip and TI core MFD code that the regulator drivers
 depend on.
 
 I've also yet again managed to put a SPI commit in the regulator tree, I
 don't know what it is about those two trees (this for spi-geni-qcom).
 
  - Support for Renesas RAA215300, Rockchip RK808, Texas Instruments
    TPS6594 and TPS6287x, and X-Powers AXP15060 and AXP313a
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Merge tag 'regulator-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator

Pull regulator updates from Mark Brown:
 "This release is almost all drivers, there's some small improvements in
  the core but otherwise everything is updates to drivers, mostly the
  addition of new ones.

  There's also a bunch of changes pulled in from the MFD subsystem as
  dependencies, Rockchip and TI core MFD code that the regulator drivers
  depend on.

  I've also yet again managed to put a SPI commit in the regulator tree,
  I don't know what it is about those two trees (this for
  spi-geni-qcom).

  Summary:

   - Support for Renesas RAA215300, Rockchip RK808, Texas Instruments
     TPS6594 and TPS6287x, and X-Powers AXP15060 and AXP313a"

* tag 'regulator-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (43 commits)
  regulator: Add Renesas PMIC RAA215300 driver
  regulator: dt-bindings: Add Renesas RAA215300 PMIC bindings
  regulator: ltc3676: Use maple tree register cache
  regulator: ltc3589: Use maple tree register cache
  regulator: helper: Document ramp_delay parameter of regulator_set_ramp_delay_regmap()
  regulator: mt6358: Use linear voltage helpers for single range regulators
  regulator: mt6358: Const-ify mt6358_regulator_info data structures
  regulator: mt6358: Drop *_SSHUB regulators
  regulator: mt6358: Merge VCN33_* regulators
  regulator: dt-bindings: mt6358: Drop *_sshub regulators
  regulator: dt-bindings: mt6358: Merge ldo_vcn33_* regulators
  regulator: dt-bindings: pwm-regulator: Add missing type for "pwm-dutycycle-unit"
  regulator: Switch two more i2c drivers back to use .probe()
  spi: spi-geni-qcom: Do not do DMA map/unmap inside driver, use framework instead
  soc: qcom: geni-se: Add interfaces geni_se_tx_init_dma() and geni_se_rx_init_dma()
  regulator: tps6594-regulator: Add driver for TI TPS6594 regulators
  regulator: axp20x: Add AXP15060 support
  regulator: axp20x: Add support for AXP313a variant
  dt-bindings: pfuze100.yaml: Add an entry for interrupts
  regulator: stm32-pwr: Fix regulator disabling
  ...
2023-06-28 13:32:47 -07:00
Rafael J. Wysocki
9b8f36398e Merge branches 'pm-sleep' and 'pm-domains'
Merge updates related to system-wide power management and generic power
domains (genpd) updates for 6.5-rc1:

 - Fix the handling of pm_suspend_target_state when CONFIG_PM is unset
   (Kai-Heng Feng).

 - Correct spelling mistake in a comment in the hibernation code (Wang
   Honghui).

 - Add arch_resume_nosmt() prototype to avoid a "missing prototypes"
   build warning (Arnd Bergmann).

 - Restrict pm_pr_dbg() to system-wide power transitions and use it in
   a few additional places (Mario Limonciello).

 - Drop verification of in-params from genpd_add_device() and ensure
   that all of its callers will do it (Ulf Hansson).

 - Prevent possible integer overflows from occurring in
   genpd_parse_state() (Nikita Zhandarovich).

* pm-sleep:
  platform/x86/amd: pmc: Use pm_pr_dbg() for suspend related messages
  pinctrl: amd: Use pm_pr_dbg to show debugging messages
  ACPI: x86: Add pm_debug_messages for LPS0 _DSM state tracking
  include/linux/suspend.h: Only show pm_pr_dbg messages at suspend/resume
  PM: suspend: add a arch_resume_nosmt() prototype
  PM: hibernate: Correct spelling mistake in a comment
  PM: suspend: Fix pm_suspend_target_state handling for !CONFIG_PM

* pm-domains:
  PM: domains: Move the verification of in-params from genpd_add_device()
  PM: domains: fix integer overflow issues in genpd_parse_state()
2023-06-26 17:44:50 +02:00
Mark Brown
54e47eade7
Add Renesas PMIC RAA215300 and built-in RTC
Merge series from Biju Das <biju.das.jz@bp.renesas.com>:

This patch series aims to add support for Renesas PMIC RAA215300 and
built-in RTC found on this PMIC device.

The details of PMIC can be found here[1].

Renesas PMIC RAA215300 exposes two separate i2c devices, one for the main
device and another for rtc device.
2023-06-24 01:57:59 +01:00
Linus Walleij
9f0648f13e intel-pinctrl for v6.5-1
* Fix of OPEN DRAIN pin mode setting in a few drivers
 * Reduce a scope of spin lock in the Bay Trail driver
 * Decrease a code footprint by refactoring in a few drivers
 * Expand string choices and reuse that in the Bay Trail driver
 
 The following is an automated git shortlog grouped by driver:
 
 baytrail:
  -  invert if condition
  -  add warning for BYT_VAL_REG retrieval failure
  -  reduce scope of spinlock in ->dbg_show() hook
  -  Use str_hi_lo() helper
  -  Use BIT() in BYT_PULL_ASSIGN_* definitions
  -  Unify style of error and debug messages
 
 cherryview:
  -  Drop goto label
  -  Return correct value if pin in push-pull mode
  -  Don't use IRQ core constanst for invalid IRQ
 
 intel:
  -  refine ->irq_set_type() hook
  -  refine ->set_mux() hook
  -  Add Intel Meteor Lake-S pin controller support
 
 lib/string_helpers:
  -  Add str_high_low() helper
  -  Split out string_choices.h
  -  Add missing header files to MAINTAINERS database
 
 merrifield:
  -  Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()
  -  Fix open-drain pin mode configuration
 
 moorefield:
  -  Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()
  -  Fix open-drain pin mode configuration
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Merge tag 'intel-pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v6.5-1

* Fix of OPEN DRAIN pin mode setting in a few drivers
* Reduce a scope of spin lock in the Bay Trail driver
* Decrease a code footprint by refactoring in a few drivers
* Expand string choices and reuse that in the Bay Trail driver

The following is an automated git shortlog grouped by driver:

baytrail:
 -  invert if condition
 -  add warning for BYT_VAL_REG retrieval failure
 -  reduce scope of spinlock in ->dbg_show() hook
 -  Use str_hi_lo() helper
 -  Use BIT() in BYT_PULL_ASSIGN_* definitions
 -  Unify style of error and debug messages

cherryview:
 -  Drop goto label
 -  Return correct value if pin in push-pull mode
 -  Don't use IRQ core constanst for invalid IRQ

intel:
 -  refine ->irq_set_type() hook
 -  refine ->set_mux() hook
 -  Add Intel Meteor Lake-S pin controller support

lib/string_helpers:
 -  Add str_high_low() helper
 -  Split out string_choices.h
 -  Add missing header files to MAINTAINERS database

merrifield:
 -  Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()
 -  Fix open-drain pin mode configuration

moorefield:
 -  Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()
 -  Fix open-drain pin mode configuration
2023-06-21 09:37:43 +02:00
Andy Shevchenko
9314d05302 pinctrl: cherryview: Drop goto label
We do not use goto labels in the Intel pin control drivers,
so drop the only one in the entire folder.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-19 17:03:52 +03:00
Raag Jadav
605ba25644 pinctrl: baytrail: invert if condition
Invert if condition and get rid of redundant else.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230616203356.27343-4-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-19 13:53:26 +03:00
Raag Jadav
9d49882e43 pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure
Add warning for BYT_VAL_REG retrieval failure and continue such case
to avoid unintended reads/writes in pm_ops.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230616203356.27343-3-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-19 13:53:26 +03:00
Raag Jadav
5a9fa4c2cd pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook
Reduce scope of spinlock to IO operations in ->dbg_show() hook
and save a few bytes.

add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-12 (-12)
Function                                     old     new   delta
byt_gpio_dbg_show                            890     878     -12
Total: Before=17029, After=17017, chg -0.07%

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230616203356.27343-2-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-19 13:53:26 +03:00
Arnd Bergmann
d18b2a0f1a pinctrl: tegra: avoid duplicate field initializers
The drv_reg field is initialized both in the DRV_PINGROUP_ENTRY_N/DRV_PINGROUP_ENTRY_Y
macros and in DRV_PINGROUP_Y. Since each pingroup expands both macros, the are
always duplicate and turning on -Woverride-init (which is disabled by default)
causes a huge amount of warnings like:

drivers/pinctrl/tegra/pinctrl-tegra234.c:1384:27: error: initialized field overwritten [-Werror=override-init]
 1384 | #define DRV_PINGROUP_Y(r) ((r))
      |                           ^
drivers/pinctrl/tegra/pinctrl-tegra234.c:1397:28: note: in expansion of macro 'DRV_PINGROUP_Y'
 1397 |                 .drv_reg = DRV_PINGROUP_Y(r),                   \
      |                            ^~~~~~~~~~~~~~
drivers/pinctrl/tegra/pinctrl-tegra234.c:1447:49: note: in expansion of macro 'DRV_PINGROUP_ENTRY_Y'
 1447 | #define drive_soc_gpio08_pb0                    DRV_PINGROUP_ENTRY_Y(0x500c,    12,     5,      20,     5,      -1,     -1,     -1,     -1,     0)
      |                                                 ^~~~~~~~~~~~~~~~~~~~
...

Remove the intialization that is never used here.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20230616161603.1127687-1-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-19 10:54:35 +02:00
Arnd Bergmann
40ed50cc3d pinctrl: mlxbf3: remove broken Kconfig 'select'
The new pinctrl driver selects GPIO_MLXBF3, but that can not be enabled yet because
the MELLANOX_PLATFORM symbol does not exist in the tree:

WARNING: unmet direct dependencies detected for GPIO_MLXBF3
  Depends on [n]: GPIOLIB [=y] && PCI [=n] && (MELLANOX_PLATFORM [=n] && ARM64 [=y] || COMPILE_TEST [=y])
  Selected by [y]:
  - PINCTRL_MLXBF3 [=y] && PINCTRL [=y] && (MELLANOX_PLATFORM [=n] && ARM64 [=y] || COMPILE_TEST [=y])

As it turns out, the pinctlr driver still builds fine without this, so just
remove the select statement.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20230619082104.699331-1-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-19 10:51:20 +02:00
Andy Shevchenko
81b64c0593 pinctrl: spear: Remove unused of_gpio.h inclusion
The of_gpio.h is not and shouldn't be used in the drivers. Remove it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20230615164158.25406-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-16 15:05:24 +02:00
Andy Shevchenko
c8b68d527e pinctrl: lantiq: Remove unused of_gpio.h inclusion
The of_gpio.h is not and shouldn't be used in the drivers. Remove it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230615164204.25462-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-16 15:04:34 +02:00
Claudiu Beznea
f6fd5d4ff8 pinctrl: at91-pio4: check return value of devm_kasprintf()
devm_kasprintf() returns a pointer to dynamically allocated memory.
Pointer could be NULL in case allocation fails. Check pointer validity.
Identified with coccinelle (kmerr.cocci script).

Fixes: 776180848b ("pinctrl: introduce driver for Atmel PIO4 controller")
Depends-on: 1c4e5c470a ("pinctrl: at91: use devm_kasprintf() to avoid potential leaks")
Depends-on: 5a8f9cf269 ("pinctrl: at91-pio4: use proper format specifier for unsigned int")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230615105333.585304-4-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-16 15:01:50 +02:00
Claudiu Beznea
310cd4c206 pinctrl: microchip-sgpio: check return value of devm_kasprintf()
devm_kasprintf() returns a pointer to dynamically allocated memory.
Pointer could be NULL in case allocation fails. Check pointer validity.
Identified with coccinelle (kmerr.cocci script).

Fixes: 7e5ea974e6 ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230615105333.585304-3-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-16 15:01:45 +02:00
Xiaolei Wang
9063777ca1 pinctrl: freescale: Fix a memory out of bounds when num_configs is 1
The config passed in by pad wakeup is 1, when num_configs is 1,
Configuration [1] should not be fetched, which will be detected
by KASAN as a memory out of bounds condition. Modify to get
configs[1] when num_configs is 2.

Fixes: f60c9eac54 ("gpio: mxc: enable pad wakeup on i.MX8x platforms")
Signed-off-by: Xiaolei Wang <xiaolei.wang@windriver.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20230504233736.3766296-1-xiaolei.wang@windriver.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-16 14:59:03 +02:00
Raag Jadav
d1bfdf867d pinctrl: intel: refine ->irq_set_type() hook
Refine ->irq_set_type() hook and improve its readability by:

- Reducing scope of spinlock by moving unneeded operations out of it.
- Dropping redundant PADCFG0_RXEVCFG_SHIFT and including it directly
  into PADCFG0_RXEVCFG_* definitions.
- Utilizing temporary variables for common operations.
- Simplifying if-else-if chain.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-15 18:27:53 +03:00
Raag Jadav
e95433c367 pinctrl: intel: refine ->set_mux() hook
Utilize a temporary variable for common shift operation in
->set_mux() hook and improve readability while saving a few bytes.

add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-3 (-3)
Function                                     old     new   delta
intel_pinmux_set_mux                         245     242      -3
Total: Before=10472, After=10469, chg -0.03%

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230613085054.10976-2-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-14 18:54:49 +03:00
Mario Limonciello
c9a236419f pinctrl: amd: Use pm_pr_dbg to show debugging messages
To make the GPIO tracking around suspend easier for end users to
use, link it with pm_debug_messages.  This will make discovering
sources of spurious GPIOs around suspend easier.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-06-12 19:56:09 +02:00
Andy Shevchenko
c518d31b2a pinctrl: baytrail: Use str_hi_lo() helper
Use str_hi_lo() helper instead of open coding the same.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-12 20:14:22 +03:00
Jiasheng Jiang
ad64639417 pinctrl: npcm7xx: Add missing check for ioremap
Add check for ioremap() and return the error if it fails in order to
guarantee the success of ioremap().

Fixes: 3b588e43ee ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver")
Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230607095829.1345-1-jiasheng@iscas.ac.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:42:52 +02:00
Wells Lu
73f8ce7f96 pinctrl:sunplus: Add check for kmalloc
Fix Smatch static checker warning:
potential null dereference 'configs'. (kmalloc returns null)

Changes in v2:
1. Add free allocated memory before returned -ENOMEM.
2. Add call of_node_put() before returned -ENOMEM.

Fixes: aa74c44be1 ("pinctrl: Add driver for Sunplus SP7021")
Signed-off-by: Wells Lu <wellslutw@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/1685277277-12209-1-git-send-email-wellslutw@gmail.com
[Rebased on the patch from Lu Hongfei]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:31:18 +02:00
Lu Hongfei
b2132afec0 pinctrl: nxp: Fix resource leaks in for_each_child_of_node() loops
Ensure child node references are decremented properly in the error path.

Signed-off-by: Lu Hongfei <luhongfei@vivo.com>
Link: https://lore.kernel.org/r/20230606070201.14249-1-luhongfei@vivo.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:24:51 +02:00
Andy Shevchenko
e3275a89e5 pinctrl: Relax user input size in pinmux_select()
This is debugfs and there is no much sense to strict the user from
sending as much data as they can. The memdup_user_nul() will anyway
fail if there is not enough memory.

Relax the user input size by removing an artificial limitaion.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230604131215.78847-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:20:56 +02:00
Andy Shevchenko
0d8675e1df pinctrl: Duplicate user memory in one go in pinmux_select()
Current code is suboptimal in three ways:
1) it explicitly terminates the string which is not needed;
2) it might provoke additional faults, because asked lenght might be
   bigger than the real one;
3) it consumes more than needed lines in the source.

Instead of using kmalloc() + strncpy_from_user() + terminating, just
utilize memdup_user_nul().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230604131215.78847-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:20:56 +02:00
Prathamesh Shete
6d8257ca39 pinctrl: tegra: Add Tegra234 pinmux driver
This change adds support for the two pin controllers found on Tegra234.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230605154230.2910847-3-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:14:44 +02:00
Krzysztof Kozlowski
a46f809bf3 pinctrl: qcom: organize audio drivers in menuconfig
The audio pin controller drivers depend on PINCTRL_LPASS_LPI, but since
PINCTRL_LPASS_LPI is not the first entry, they are not displayed in
menuconfig as dependent of PINCTRL_LPASS_LPI.  Re-order the entries to
fix this.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230601152026.1182648-8-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:11:32 +02:00
Krzysztof Kozlowski
3476b8b192 pinctrl: qcom: organize main SoC drivers in new Kconfig.msm
In menuconfig, some entries depending on PINCTRL_MSM are indented and
expressed as dependening but some not, because of other Kconfig entries
in between,

Move all main Qualcomm SoC pin controller driver entries into new
Kconfig.msm file so they will be nicely ordered in Kconfig file (by
CONFIG_ name) and properly indented as PINCTRL_MSM dependency in
menuconfig.

Functionally this is the same, but since entire file is guarded with "if
PINCTRL_MSM" drop this dependency from individual entries.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230601152026.1182648-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:10:13 +02:00
Krzysztof Kozlowski
405ac045ec pinctrl: qcom: allow true compile testing
Makefile selected Qualcomm pinctrl drivers only for ARCH_QCOM, making
any COMPILE_TEST options inside Kconfig ((ARCH_QCOM || COMPILE_TEST) or
(OF || COMPILE_TEST)) not effective.  Always descent to the qcom
subdirectory to fix this.  All individual drivers are selected in
Makefile via dedicated CONFIG entries, thus this should not have
functional impact except when compile testing.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230601152026.1182648-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:05:36 +02:00
Krzysztof Kozlowski
da95f081b3 pinctrl: qcom: mark true OF dependency - common MSM pinctrl code
The common MSM pinctrl driver code (PINCTRL_MSM) uses
pinconf_generic_dt_node_to_map_group() from GENERIC_PINCONF, which is
not available for compile testing for !OF cases.  Drivers actually do
not depend on OF.  Move the OF dependency to the entry actually
depending on it and drop any "|| COMPILE_TEST", because OF is required
also for compile testing (lack of OF was never visible in compile
testing because none of the drivers could be compile tested due to
Makefile).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230601152026.1182648-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:05:31 +02:00
Krzysztof Kozlowski
c0602eea4a pinctrl: qcom: drop unneeded GPIOLIB dependency
PINCTRL_MSM depends on GPIOLIB, thus individual driver entries depending
on the first do not have to depend on the latter.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230601152026.1182648-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:05:26 +02:00
Krzysztof Kozlowski
be7d0c78aa pinctrl: qcom: correct language typo (Technologies)
Correct typo: Tehcnologies->Technologies.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230601152026.1182648-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:05:21 +02:00
Krzysztof Kozlowski
01bceae214 pinctrl: qcom: fix indentation in Kconfig
Use tab for correct Kconfig indentation.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230601152026.1182648-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:05:15 +02:00
Krzysztof Kozlowski
1c4aac1739 pinctrl: qcom: qdf2xxx: drop ACPI_PTR
Driver can bind only via ACPI matching and acpi_device_id is there
unconditionally, so drop useless ACPI_PTR() macro.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230601152026.1182648-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:05:08 +02:00
Sricharan Ramabadhran
725d1c8916 pinctrl: qcom: Add IPQ5018 pinctrl driver
Add pinctrl definitions for the TLMM of IPQ5018.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Co-developed-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/20230608122152.3930377-5-quic_srichara@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09 09:00:09 +02:00
Alexandre Torgue
619f8ca4a7 pinctrl: stm32: add stm32mp257 pinctrl support
Add stm32mp257 pinctrl support.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-08 16:01:29 +02:00
Andy Shevchenko
34ce984c24 pinctrl: intel: Add Intel Meteor Lake-S pin controller support
This driver adds pinctrl/GPIO support for Intel Meteor Lake-S.
The GPIO controller is based on the next generation GPIO hardware
but still compatible with the one supported by the Intel pinctrl
and GPIO core driver.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-07 23:09:50 +03:00
Andy Shevchenko
7e52109311 pinctrl: moorefield: Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()
Use explicit comparison to BUFCFG_PINMODE_GPIO instead of implying it.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06 16:08:20 +03:00
Andy Shevchenko
be5bb8f082 pinctrl: moorefield: Fix open-drain pin mode configuration
Currently the pin may not be configured as open-drain in some
cases because the argument may be 0 for the boolean types of
the pin configurations. Fix this by ignoring the argument.

With that, allow to actually restore pin to the push-pull mode.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06 16:08:20 +03:00
Andy Shevchenko
29cf9f3621 pinctrl: merrifield: Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()
Use explicit comparison to BUFCFG_PINMODE_GPIO instead of implying it.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06 16:07:33 +03:00
Andy Shevchenko
9891422ba6 pinctrl: merrifield: Fix open-drain pin mode configuration
Currently the pin may not be configured as open-drain in some
cases because the argument may be 0 for the boolean types of
the pin configurations. Fix this by ignoring the argument.

With that, allow to actually restore pin to the push-pull mode.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06 16:07:33 +03:00
Andy Shevchenko
5835196a17 pinctrl: cherryview: Return correct value if pin in push-pull mode
Currently the getter returns ENOTSUPP on pin configured in
the push-pull mode. Fix this by adding the missed switch case.

Fixes: ccdf81d08d ("pinctrl: cherryview: add option to set open-drain pin config")
Fixes: 6e08d6bbeb ("pinctrl: Add Intel Cherryview/Braswell pin controller support")
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06 16:06:32 +03:00
Andy Shevchenko
0633dc4a54 pinctrl: cherryview: Don't use IRQ core constanst for invalid IRQ
The semantics of INVALID_HWIRQ is rather localized to IPI usage.
Let's keep it that way.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-02 20:34:54 +03:00
Andy Shevchenko
9d71208632 pinctrl: baytrail: Use BIT() in BYT_PULL_ASSIGN_* definitions
The bias setting (pull-up or pull-down) are bit fields and
we never enable them both, hence use BIT() macro to define
them.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-02 20:34:53 +03:00
Andy Shevchenko
b9e1843447 pinctrl: baytrail: Unify style of error and debug messages
Use same formatting strings where it makes sense, so linker
will utilize only a single copy of it, otherwise make the
style similar to the rest of the messages of the close enough
semantics.

add/remove: 1/0 grow/shrink: 2/2 up/down: 91/-110 (-19)
Total: Before=17562, After=17543, chg -0.11%

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-02 20:34:53 +03:00
Chester Lin
0da4cebebc pinctrl: s32: separate const device data from struct s32_pinctrl_soc_info
The .data field in struct of_device_id is used as a const member so it's
inappropriate to attach struct s32_pinctrl_soc_info with of_device_id
because some members in s32_pinctrl_soc_info need to be filled by
pinctrl-s32cc at runtime.

For this reason, struct s32_pinctrl_soc_info must be allocated in
pinctrl-s32cc and then create a new struct s32_pinctrl_soc_data in order
to represent const .data in of_device_id. To combine these two structures,
a s32_pinctrl_soc_data pointer is introduced in s32_pinctrl_soc_info.

Besides, use of_device_get_match_data() instead of of_match_device() since
the driver only needs to retrieve the .data from of_device_id.

Link: https://lore.kernel.org/r/20230329041630.8011-1-clin@suse.com/
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Chester Lin <clin@suse.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-02 09:36:25 +02:00
Thierry Reding
4d6366e6ff pinctrl: tegra: Consistently refer to SoC data
The SoC-specific data is stored in pmx->soc and that's used throughout
the driver to access this data. The probe function has access to a local
version of that copy and uses it in some occasions. Replace them with
the more standard pmx->soc access for more consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20230530105308.1292852-2-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-01 13:17:35 +02:00
Thierry Reding
fad5723350 pinctrl: tegra: Duplicate pinmux functions table
The function table is filled with group information based on other
instance-specific data at runtime. However, the function table can be
shared between multiple instances, causing the ->probe() function for
one instance to overwrite the table of a previously probed instance.

Fix this by sharing only the function names and allocating a separate
function table for each instance.

Fixes: 5a00473607 ("pinctrl: tegra: Separate Tegra194 instances")
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20230530105308.1292852-1-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-01 13:17:35 +02:00
Wells Lu
a5961bed54 pinctrl: sunplus: Add check for kmalloc
Fix Smatch static checker warning:
potential null dereference 'configs'. (kmalloc returns null)

Fixes: aa74c44be1 ("pinctrl: Add driver for Sunplus SP7021")
Signed-off-by: Wells Lu <wellslutw@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/1685277277-12209-1-git-send-email-wellslutw@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-30 13:47:20 +02:00
Uwe Kleine-König
d857253173 pinctrl: Switch i2c drivers back to use .probe()
After commit b8a1a4cd5a ("i2c: Provide a temporary .probe_new()
call-back type"), all drivers being converted to .probe_new() and then
03c835f498 ("i2c: Switch .probe() to not take an id parameter")
convert back to (the new) .probe() to be able to eventually drop
.probe_new() from struct i2c_driver.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230525204258.711186-1-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-29 15:16:30 +02:00
Lizhe
6171212e9f pinctrl: microchip: Remove redundant clearing of IRQ_TYPE_SENSE_MASK
Before executing microchip_sgpio_irq_set_type(),
type has already been cleared IRQ_TYPE_SENSE_MASK, see __irq_set_trigger().

Signed-off-by: Lizhe <sensor1010@163.com>
Link: https://lore.kernel.org/r/20230519170716.3459-1-sensor1010@163.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-29 15:07:27 +02:00
Jonathan McDowell
44825e5ead pinctrl: axp209: Add support for GPIO3 on the AXP209
The AXP209 device has a 4th GPIO which has a slightly different register
setup, where the control + status bits are held in a single register
rather than sharing AXP20X_GPIO20_SS with GPIOs 0-2.

Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/dde40307f0ebc23b9841c32e702b481ab5193dc4.1684258957.git.noodles@earth.li
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-29 11:50:41 +02:00
Rohit Agarwal
0f9367525a pinctrl: qcom: Add SDX75 pincontrol driver
Add initial Qualcomm SDX75 pinctrl driver to support pin configuration
with pinctrl framework for SDX75 SoC.
While at it, reordering the SDX65 entry.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1684425432-10072-4-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-29 11:47:57 +02:00
Linus Walleij
06b9a183d9 pinctrl: renesas: Updates for v6.5
- Fix whitespace.
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 cCQFAQCcwaEvApVqdtuoFlkB+BxngMuLyAJgtR9ZvMy+p8UDAAEAxIeiCqnXYx9i
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Merge tag 'renesas-pinctrl-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.5

  - Fix whitespace.
2023-05-29 11:22:55 +02:00
Dan Carpenter
35216718c9 pinctrl: at91: fix a couple NULL vs IS_ERR() checks
The devm_kasprintf_strarray() function doesn't return NULL on error,
it returns error pointers.  Update the checks accordingly.

Fixes: f494c1913c ("pinctrl: at91: use devm_kasprintf() to avoid potential leaks (part 2)")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Ryan Wanner <ryan.wanner@microchip.com>
Link: https://lore.kernel.org/r/5697980e-f687-47a7-9db8-2af34ae464bd@kili.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-24 10:51:30 +02:00
Ryan Wanner
772be1da8e pinctrl: at91-pio4: Enable Push-Pull configuration
Enable push-pull configuration. Remove integer value argument from
open-drain configuration as it is discarded when pinconf function is
called from gpiolib. Add push-pull do debug and get functions.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/d898c31277f6bce6f7d830edf4332ff605498c7b.1684313910.git.Ryan.Wanner@microchip.com
[Fix two coding style issues]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-24 10:49:41 +02:00
Bartosz Golaszewski
a499a6b203 pinctrl: qcom: sa8775p: add the wakeirq map
The SA8775P TLMM driver is missing the GPIO-to-wakeup-pin mapping. This
adds it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230515092515.180920-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-22 09:28:02 +02:00
Krzysztof Kozlowski
070a10d6fe pinctrl: qcom: sc8180x: gracefully handle missing IO memory resource
If device was probed with incorrect DT or ACPI tables, the IO memory
resource would be missing and driver would derefernce NULL pointer in
sc8180x_pinctrl_add_tile_resources().  Add simplep check if IO memory
resource was provided to silence Smatch warning:

  drivers/pinctrl/qcom/pinctrl-sc8180x.c:1664 sc8180x_pinctrl_add_tile_resources() error: potentially dereferencing uninitialized 'mres'.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230513113510.177666-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-16 15:25:57 +02:00
Rohit Agarwal
6a16d1a5ba pinctrl: qcom: Refactor generic qcom pinctrl driver
Reuse the generic pingroup struct from pinctrl.h in msm_pingroup
along with the macro defined.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1684133170-18540-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-16 15:03:37 +02:00
Rohit Agarwal
c7a291dbbc pinctrl: qcom: Remove the msm_function struct
Remove the msm_function struct to reuse the generic pinfunction
struct. Also, define a generic PINFUNCTION macro that can be used across
qcom target specific pinctrl files to avoid code repetition.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1684133170-18540-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-16 15:03:37 +02:00
Martin Hundebøll
5b10ff013e pinctrl: meson-axg: add missing GPIOA_18 gpio group
Without this, the gpio cannot be explicitly mux'ed to its gpio function.

Fixes: 83c566806a ("pinctrl: meson-axg: Add new pinctrl driver for Meson AXG SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Martin Hundebøll <martin@geanix.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Link: https://lore.kernel.org/r/20230512064925.133516-1-martin@geanix.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-16 15:02:01 +02:00
Sebastian Reichel
924764aa5f pinctrl: rk805: Add rk806 pinctrl support
Add support for rk806 dvs pinctrl to the existing rk805
driver.

This has been implemented using shengfei Xu's rk806
specific driver from the vendor tree as reference.

Co-developed-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Diederik de Haas <didi.debian@cknow.org> # Rock64, Quartz64 Model A + B
Tested-by: Vincent Legoll <vincent.legoll@gmail.com> # Pine64 QuartzPro64
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230504173618.142075-10-sebastian.reichel@collabora.com
Signed-off-by: Lee Jones <lee@kernel.org>
2023-05-15 16:21:01 +01:00
Sebastian Reichel
c20e8c5b12 mfd: rk808: Split into core and i2c
Split rk808 into a core and an i2c part in preparation for
SPI support.

Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> # for RTC
Tested-by: Diederik de Haas <didi.debian@cknow.org> # Rock64, Quartz64 Model A + B
Tested-by: Vincent Legoll <vincent.legoll@gmail.com> # Pine64 QuartzPro64
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230504173618.142075-6-sebastian.reichel@collabora.com
Signed-off-by: Lee Jones <lee@kernel.org>
2023-05-15 16:19:03 +01:00
Marek Vasut
5d32cead77 pinctrl: renesas: Fix spaces followed by tabs
Perform 's@ \t@\t\t@g' so we wouldn't have spaces followed by tabs.
No functional change.

Picked from U-Boot commit 0cf207ec01c ("WS cleanup: remove SPACE(s) followed by TAB")

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230507130120.7587-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-05-09 11:51:33 +02:00
Luca Weiss
cbbe077815 pinctrl: qcom: spmi-gpio: Add PM8953 support
Add support for the 8 GPIOs found on PM8953.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230421-pm8953-gpio-v1-2-3d33e2de47e3@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-08 15:42:24 +02:00
Mario Limonciello
65f6c7c91c pinctrl: amd: Revert "pinctrl: amd: disable and mask interrupts on probe"
commit 4e5a04be88 ("pinctrl: amd: disable and mask interrupts on probe")
was well intentioned to mask a firmware issue on a surface laptop, but it
has a few problems:
1. It had a bug in the loop handling for iteration 63 that lead to other
   problems with GPIO0 handling.
2. It disables interrupts that are used internally by the SOC but masked
   by default.
3. It masked a real firmware problem in some chromebooks that should have
   been caught during development but wasn't.

There has been a lot of other development around s2idle; particularly
around handling of the spurious wakeups.  If there is still a problem on
the original reported surface laptop it should be avoided by adding a quirk
to gpiolib-acpi for that system instead.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230421120625.3366-5-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-08 15:42:24 +02:00
Kornel Dulęba
0cf9e48ff2 pinctrl: amd: Detect and mask spurious interrupts
Leverage gpiochip_line_is_irq to check whether a pin has an irq
associated with it. The previous check ("irq == 0") didn't make much
sense. The irq variable refers to the pinctrl irq, and has nothing do to
with an individual pin.

On some systems, during suspend/resume cycle, the firmware leaves
an interrupt enabled on a pin that is not used by the kernel.
Without this patch that caused an interrupt storm.

Cc: stable@vger.kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=217315
Signed-off-by: Kornel Dulęba <korneld@chromium.org>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230421120625.3366-4-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-08 15:42:24 +02:00
Mario Limonciello
a855724dc0 pinctrl: amd: Fix mistake in handling clearing pins at startup
commit 4e5a04be88 ("pinctrl: amd: disable and mask interrupts on probe")
had a mistake in loop iteration 63 that it would clear offset 0xFC instead
of 0x100.  Offset 0xFC is actually `WAKE_INT_MASTER_REG`.  This was
clearing bits 13 and 15 from the register which significantly changed the
expected handling for some platforms for GPIO0.

Cc: stable@vger.kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=217315
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230421120625.3366-3-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-08 15:42:24 +02:00
Mario Limonciello
968ab92616 pinctrl: amd: Detect internal GPIO0 debounce handling
commit 4e5a04be88 ("pinctrl: amd: disable and mask interrupts on probe")
had a mistake in loop iteration 63 that it would clear offset 0xFC instead
of 0x100.  Offset 0xFC is actually `WAKE_INT_MASTER_REG`.  This was
clearing bits 13 and 15 from the register which significantly changed the
expected handling for some platforms for GPIO0.

commit b26cd9325b ("pinctrl: amd: Disable and mask interrupts on resume")
actually fixed this bug, but lead to regressions on Lenovo Z13 and some
other systems.  This is because there was no handling in the driver for bit
15 debounce behavior.

Quoting a public BKDG:
```
EnWinBlueBtn. Read-write. Reset: 0. 0=GPIO0 detect debounced power button;
Power button override is 4 seconds. 1=GPIO0 detect debounced power button
in S3/S5/S0i3, and detect "pressed less than 2 seconds" and "pressed 2~10
seconds" in S0; Power button override is 10 seconds
```

Cross referencing the same master register in Windows it's obvious that
Windows doesn't use debounce values in this configuration.  So align the
Linux driver to do this as well.  This fixes wake on lid when
WAKE_INT_MASTER_REG is properly programmed.

Cc: stable@vger.kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=217315
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230421120625.3366-2-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-08 15:42:24 +02:00
Christophe JAILLET
cdf7e61612 pinctrl: bcm2835: Handle gpiochip_add_pin_range() errors
gpiochip_add_pin_range() can fail, so better return its error code than
a hard coded '0'.

Fixes: d2b67744fd ("pinctrl: bcm2835: implement hook for missing gpio-ranges")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/98c3b5890bb72415145c9fe4e1d974711edae376.1681681402.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-08 15:42:24 +02:00
Linus Torvalds
348551ddaf Pin control bulk changes for the v6.4 kernel:
Core changes:
 
 - Make a lot of pin controllers with GPIO and irqchips immutable,
   i.e. not living structs, but const structs. This is driving a
   changed initiated by the irqchip maintainers.
 
 New drivers:
 
 - New driver for the NXP S32 SoC pin controller
 
 - As part of a thorough cleanup and restructuring of the
   Ralink/Mediatek drivers, the Ralink MIPS pin control drivers
   were folded into the Mediatek directory and the family is
   renamed "mtmips". The Ralink chips live on as Mediatek MIPS
   family where new variants can be added. As part of this work
   also the device tree bindings were reworked.
 
 - New subdriver for the Qualcomm SM7150 SoC.
 
 - New subdriver for the Qualcomm IPQ9574 SoC.
 
 - New driver for the nVidia BlueField-3 SoC.
 
 - Support for the Qualcomm PMM8654AU mixed signal circuit GPIO.
 
 - Support for the Qualcomm PMI632 mixed signal circuit GPIO.
 
 Improvements:
 
 - Add some missing pins and generic cleanups on the Renesas
   r8a779g0 and r8a779g0 pin controllers. Generic Renesas
   extension for power source selection on several SoCs.
 
 - Misc cleanups for the Atmel AT91 and AT91-PIO4 pin
   controllers
 
 - Make the GPIO mode work on the Qualcomm SM8550-lpass-lpi
   driver.
 
 - Several device tree binding cleanups as the binding
   YAML syntax is solidifying.
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Merge tag 'pinctrl-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Mostly drivers! Nothing special: some new Qualcomm chips as usual, and
  the new NXP S32 and nVidia BlueField-3.

  Core changes:

   - Make a lot of pin controllers with GPIO and irqchips immutable,
     i.e. not living structs, but const structs. This is driving a
     changed initiated by the irqchip maintainers.

  New drivers:

   - New driver for the NXP S32 SoC pin controller

   - As part of a thorough cleanup and restructuring of the
     Ralink/Mediatek drivers, the Ralink MIPS pin control drivers were
     folded into the Mediatek directory and the family is renamed
     "mtmips". The Ralink chips live on as Mediatek MIPS family where
     new variants can be added. As part of this work also the device
     tree bindings were reworked.

   - New subdriver for the Qualcomm SM7150 SoC.

   - New subdriver for the Qualcomm IPQ9574 SoC.

   - New driver for the nVidia BlueField-3 SoC.

   - Support for the Qualcomm PMM8654AU mixed signal circuit GPIO.

   - Support for the Qualcomm PMI632 mixed signal circuit GPIO.

  Improvements:

   - Add some missing pins and generic cleanups on the Renesas r8a779g0
     and r8a779g0 pin controllers. Generic Renesas extension for power
     source selection on several SoCs.

   - Misc cleanups for the Atmel AT91 and AT91-PIO4 pin controllers

   - Make the GPIO mode work on the Qualcomm SM8550-lpass-lpi driver.

   - Several device tree binding cleanups as the binding YAML syntax is
     solidifying"

* tag 'pinctrl-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (153 commits)
  pinctrl-bcm2835.c: fix race condition when setting gpio dir
  dt-bindings: pinctrl: qcom,sm8150: Drop duplicate function value "atest_usb2"
  dt-bindings: pinctrl: qcom: Add few missing functions
  pinctrl: qcom: spmi-gpio: Add PMI632 support
  dt-bindings: pinctrl: qcom,pmic-gpio: add PMI632
  pinctrl: wpcm450: select MFD_SYSCON
  pinctrl: qcom ssbi-gpio: Convert to immutable irq_chip
  pinctrl: qcom ssbi-mpp: Convert to immutable irq_chip
  pinctrl: qcom spmi-mpp: Convert to immutable irq_chip
  pinctrl: plgpio: Convert to immutable irq_chip
  pinctrl: pistachio: Convert to immutable irq_chip
  pinctrl: pic32: Convert to immutable irq_chip
  pinctrl: sx150x: Convert to immutable irq_chip
  pinctrl: stmfx: Convert to immutable irq_chip
  pinctrl: st: Convert to immutable irq_chip
  pinctrl: mcp23s08: Convert to immutable irq_chip
  pinctrl: equilibrium: Convert to immutable irq_chip
  pinctrl: npcm7xx: Convert to immutable irq_chip
  pinctrl: armada-37xx: Convert to immutable irq_chip
  pinctrl: nsp: Convert to immutable irq_chip
  ...
2023-05-02 15:40:41 -07:00
Linus Torvalds
b6a7828502 modules-6.4-rc1
The summary of the changes for this pull requests is:
 
  * Song Liu's new struct module_memory replacement
  * Nick Alcock's MODULE_LICENSE() removal for non-modules
  * My cleanups and enhancements to reduce the areas where we vmalloc
    module memory for duplicates, and the respective debug code which
    proves the remaining vmalloc pressure comes from userspace.
 
 Most of the changes have been in linux-next for quite some time except
 the minor fixes I made to check if a module was already loaded
 prior to allocating the final module memory with vmalloc and the
 respective debug code it introduces to help clarify the issue. Although
 the functional change is small it is rather safe as it can only *help*
 reduce vmalloc space for duplicates and is confirmed to fix a bootup
 issue with over 400 CPUs with KASAN enabled. I don't expect stable
 kernels to pick up that fix as the cleanups would have also had to have
 been picked up. Folks on larger CPU systems with modules will want to
 just upgrade if vmalloc space has been an issue on bootup.
 
 Given the size of this request, here's some more elaborate details
 on this pull request.
 
 The functional change change in this pull request is the very first
 patch from Song Liu which replaces the struct module_layout with a new
 struct module memory. The old data structure tried to put together all
 types of supported module memory types in one data structure, the new
 one abstracts the differences in memory types in a module to allow each
 one to provide their own set of details. This paves the way in the
 future so we can deal with them in a cleaner way. If you look at changes
 they also provide a nice cleanup of how we handle these different memory
 areas in a module. This change has been in linux-next since before the
 merge window opened for v6.3 so to provide more than a full kernel cycle
 of testing. It's a good thing as quite a bit of fixes have been found
 for it.
 
 Jason Baron then made dynamic debug a first class citizen module user by
 using module notifier callbacks to allocate / remove module specific
 dynamic debug information.
 
 Nick Alcock has done quite a bit of work cross-tree to remove module
 license tags from things which cannot possibly be module at my request
 so to:
 
   a) help him with his longer term tooling goals which require a
      deterministic evaluation if a piece a symbol code could ever be
      part of a module or not. But quite recently it is has been made
      clear that tooling is not the only one that would benefit.
      Disambiguating symbols also helps efforts such as live patching,
      kprobes and BPF, but for other reasons and R&D on this area
      is active with no clear solution in sight.
 
   b) help us inch closer to the now generally accepted long term goal
      of automating all the MODULE_LICENSE() tags from SPDX license tags
 
 In so far as a) is concerned, although module license tags are a no-op
 for non-modules, tools which would want create a mapping of possible
 modules can only rely on the module license tag after the commit
 8b41fc4454 ("kbuild: create modules.builtin without Makefile.modbuiltin
 or tristate.conf").  Nick has been working on this *for years* and
 AFAICT I was the only one to suggest two alternatives to this approach
 for tooling. The complexity in one of my suggested approaches lies in
 that we'd need a possible-obj-m and a could-be-module which would check
 if the object being built is part of any kconfig build which could ever
 lead to it being part of a module, and if so define a new define
 -DPOSSIBLE_MODULE [0]. A more obvious yet theoretical approach I've
 suggested would be to have a tristate in kconfig imply the same new
 -DPOSSIBLE_MODULE as well but that means getting kconfig symbol names
 mapping to modules always, and I don't think that's the case today. I am
 not aware of Nick or anyone exploring either of these options. Quite
 recently Josh Poimboeuf has pointed out that live patching, kprobes and
 BPF would benefit from resolving some part of the disambiguation as
 well but for other reasons. The function granularity KASLR (fgkaslr)
 patches were mentioned but Joe Lawrence has clarified this effort has
 been dropped with no clear solution in sight [1].
 
 In the meantime removing module license tags from code which could never
 be modules is welcomed for both objectives mentioned above. Some
 developers have also welcomed these changes as it has helped clarify
 when a module was never possible and they forgot to clean this up,
 and so you'll see quite a bit of Nick's patches in other pull
 requests for this merge window. I just picked up the stragglers after
 rc3. LWN has good coverage on the motivation behind this work [2] and
 the typical cross-tree issues he ran into along the way. The only
 concrete blocker issue he ran into was that we should not remove the
 MODULE_LICENSE() tags from files which have no SPDX tags yet, even if
 they can never be modules. Nick ended up giving up on his efforts due
 to having to do this vetting and backlash he ran into from folks who
 really did *not understand* the core of the issue nor were providing
 any alternative / guidance. I've gone through his changes and dropped
 the patches which dropped the module license tags where an SPDX
 license tag was missing, it only consisted of 11 drivers.  To see
 if a pull request deals with a file which lacks SPDX tags you
 can just use:
 
   ./scripts/spdxcheck.py -f \
 	$(git diff --name-only commid-id | xargs echo)
 
 You'll see a core module file in this pull request for the above,
 but that's not related to his changes. WE just need to add the SPDX
 license tag for the kernel/module/kmod.c file in the future but
 it demonstrates the effectiveness of the script.
 
 Most of Nick's changes were spread out through different trees,
 and I just picked up the slack after rc3 for the last kernel was out.
 Those changes have been in linux-next for over two weeks.
 
 The cleanups, debug code I added and final fix I added for modules
 were motivated by David Hildenbrand's report of boot failing on
 a systems with over 400 CPUs when KASAN was enabled due to running
 out of virtual memory space. Although the functional change only
 consists of 3 lines in the patch "module: avoid allocation if module is
 already present and ready", proving that this was the best we can
 do on the modules side took quite a bit of effort and new debug code.
 
 The initial cleanups I did on the modules side of things has been
 in linux-next since around rc3 of the last kernel, the actual final
 fix for and debug code however have only been in linux-next for about a
 week or so but I think it is worth getting that code in for this merge
 window as it does help fix / prove / evaluate the issues reported
 with larger number of CPUs. Userspace is not yet fixed as it is taking
 a bit of time for folks to understand the crux of the issue and find a
 proper resolution. Worst come to worst, I have a kludge-of-concept [3]
 of how to make kernel_read*() calls for modules unique / converge them,
 but I'm currently inclined to just see if userspace can fix this
 instead.
 
 [0] https://lore.kernel.org/all/Y/kXDqW+7d71C4wz@bombadil.infradead.org/
 [1] https://lkml.kernel.org/r/025f2151-ce7c-5630-9b90-98742c97ac65@redhat.com
 [2] https://lwn.net/Articles/927569/
 [3] https://lkml.kernel.org/r/20230414052840.1994456-3-mcgrof@kernel.org
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Merge tag 'modules-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/linux

Pull module updates from Luis Chamberlain:
 "The summary of the changes for this pull requests is:

   - Song Liu's new struct module_memory replacement

   - Nick Alcock's MODULE_LICENSE() removal for non-modules

   - My cleanups and enhancements to reduce the areas where we vmalloc
     module memory for duplicates, and the respective debug code which
     proves the remaining vmalloc pressure comes from userspace.

  Most of the changes have been in linux-next for quite some time except
  the minor fixes I made to check if a module was already loaded prior
  to allocating the final module memory with vmalloc and the respective
  debug code it introduces to help clarify the issue. Although the
  functional change is small it is rather safe as it can only *help*
  reduce vmalloc space for duplicates and is confirmed to fix a bootup
  issue with over 400 CPUs with KASAN enabled. I don't expect stable
  kernels to pick up that fix as the cleanups would have also had to
  have been picked up. Folks on larger CPU systems with modules will
  want to just upgrade if vmalloc space has been an issue on bootup.

  Given the size of this request, here's some more elaborate details:

  The functional change change in this pull request is the very first
  patch from Song Liu which replaces the 'struct module_layout' with a
  new 'struct module_memory'. The old data structure tried to put
  together all types of supported module memory types in one data
  structure, the new one abstracts the differences in memory types in a
  module to allow each one to provide their own set of details. This
  paves the way in the future so we can deal with them in a cleaner way.
  If you look at changes they also provide a nice cleanup of how we
  handle these different memory areas in a module. This change has been
  in linux-next since before the merge window opened for v6.3 so to
  provide more than a full kernel cycle of testing. It's a good thing as
  quite a bit of fixes have been found for it.

  Jason Baron then made dynamic debug a first class citizen module user
  by using module notifier callbacks to allocate / remove module
  specific dynamic debug information.

  Nick Alcock has done quite a bit of work cross-tree to remove module
  license tags from things which cannot possibly be module at my request
  so to:

   a) help him with his longer term tooling goals which require a
      deterministic evaluation if a piece a symbol code could ever be
      part of a module or not. But quite recently it is has been made
      clear that tooling is not the only one that would benefit.
      Disambiguating symbols also helps efforts such as live patching,
      kprobes and BPF, but for other reasons and R&D on this area is
      active with no clear solution in sight.

   b) help us inch closer to the now generally accepted long term goal
      of automating all the MODULE_LICENSE() tags from SPDX license tags

  In so far as a) is concerned, although module license tags are a no-op
  for non-modules, tools which would want create a mapping of possible
  modules can only rely on the module license tag after the commit
  8b41fc4454 ("kbuild: create modules.builtin without
  Makefile.modbuiltin or tristate.conf").

  Nick has been working on this *for years* and AFAICT I was the only
  one to suggest two alternatives to this approach for tooling. The
  complexity in one of my suggested approaches lies in that we'd need a
  possible-obj-m and a could-be-module which would check if the object
  being built is part of any kconfig build which could ever lead to it
  being part of a module, and if so define a new define
  -DPOSSIBLE_MODULE [0].

  A more obvious yet theoretical approach I've suggested would be to
  have a tristate in kconfig imply the same new -DPOSSIBLE_MODULE as
  well but that means getting kconfig symbol names mapping to modules
  always, and I don't think that's the case today. I am not aware of
  Nick or anyone exploring either of these options. Quite recently Josh
  Poimboeuf has pointed out that live patching, kprobes and BPF would
  benefit from resolving some part of the disambiguation as well but for
  other reasons. The function granularity KASLR (fgkaslr) patches were
  mentioned but Joe Lawrence has clarified this effort has been dropped
  with no clear solution in sight [1].

  In the meantime removing module license tags from code which could
  never be modules is welcomed for both objectives mentioned above. Some
  developers have also welcomed these changes as it has helped clarify
  when a module was never possible and they forgot to clean this up, and
  so you'll see quite a bit of Nick's patches in other pull requests for
  this merge window. I just picked up the stragglers after rc3. LWN has
  good coverage on the motivation behind this work [2] and the typical
  cross-tree issues he ran into along the way. The only concrete blocker
  issue he ran into was that we should not remove the MODULE_LICENSE()
  tags from files which have no SPDX tags yet, even if they can never be
  modules. Nick ended up giving up on his efforts due to having to do
  this vetting and backlash he ran into from folks who really did *not
  understand* the core of the issue nor were providing any alternative /
  guidance. I've gone through his changes and dropped the patches which
  dropped the module license tags where an SPDX license tag was missing,
  it only consisted of 11 drivers. To see if a pull request deals with a
  file which lacks SPDX tags you can just use:

    ./scripts/spdxcheck.py -f \
	$(git diff --name-only commid-id | xargs echo)

  You'll see a core module file in this pull request for the above, but
  that's not related to his changes. WE just need to add the SPDX
  license tag for the kernel/module/kmod.c file in the future but it
  demonstrates the effectiveness of the script.

  Most of Nick's changes were spread out through different trees, and I
  just picked up the slack after rc3 for the last kernel was out. Those
  changes have been in linux-next for over two weeks.

  The cleanups, debug code I added and final fix I added for modules
  were motivated by David Hildenbrand's report of boot failing on a
  systems with over 400 CPUs when KASAN was enabled due to running out
  of virtual memory space. Although the functional change only consists
  of 3 lines in the patch "module: avoid allocation if module is already
  present and ready", proving that this was the best we can do on the
  modules side took quite a bit of effort and new debug code.

  The initial cleanups I did on the modules side of things has been in
  linux-next since around rc3 of the last kernel, the actual final fix
  for and debug code however have only been in linux-next for about a
  week or so but I think it is worth getting that code in for this merge
  window as it does help fix / prove / evaluate the issues reported with
  larger number of CPUs. Userspace is not yet fixed as it is taking a
  bit of time for folks to understand the crux of the issue and find a
  proper resolution. Worst come to worst, I have a kludge-of-concept [3]
  of how to make kernel_read*() calls for modules unique / converge
  them, but I'm currently inclined to just see if userspace can fix this
  instead"

Link: https://lore.kernel.org/all/Y/kXDqW+7d71C4wz@bombadil.infradead.org/ [0]
Link: https://lkml.kernel.org/r/025f2151-ce7c-5630-9b90-98742c97ac65@redhat.com [1]
Link: https://lwn.net/Articles/927569/ [2]
Link: https://lkml.kernel.org/r/20230414052840.1994456-3-mcgrof@kernel.org [3]

* tag 'modules-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/linux: (121 commits)
  module: add debugging auto-load duplicate module support
  module: stats: fix invalid_mod_bytes typo
  module: remove use of uninitialized variable len
  module: fix building stats for 32-bit targets
  module: stats: include uapi/linux/module.h
  module: avoid allocation if module is already present and ready
  module: add debug stats to help identify memory pressure
  module: extract patient module check into helper
  modules/kmod: replace implementation with a semaphore
  Change DEFINE_SEMAPHORE() to take a number argument
  module: fix kmemleak annotations for non init ELF sections
  module: Ignore L0 and rename is_arm_mapping_symbol()
  module: Move is_arm_mapping_symbol() to module_symbol.h
  module: Sync code of is_arm_mapping_symbol()
  scripts/gdb: use mem instead of core_layout to get the module address
  interconnect: remove module-related code
  interconnect: remove MODULE_LICENSE in non-modules
  zswap: remove MODULE_LICENSE in non-modules
  zpool: remove MODULE_LICENSE in non-modules
  x86/mm/dump_pagetables: remove MODULE_LICENSE in non-modules
  ...
2023-04-27 16:36:55 -07:00
Linus Torvalds
2c96606a0f gpio updates for v6.4-rc1
New drivers:
 - add a driver for the Loongson GPIO controller
 - add a driver for the fxl6408 I2C GPIO expander
 - add a GPIO module containing code common for Intel Elkhart Lake and
   Merrifield platforms
 - add a driver for the Intel Elkhart Lake platform reusing the code from
   the intel tangier library
 
 GPIOLIB core:
 - GPIO ACPI improvements
 - simplify gpiochip_add_data_with_keys() fwnode handling
 - cleanup header inclusions (remove unneeded ones, order the rest
   alphabetically)
 - remove duplicate code (reuse krealloc() instead of open-coding it, drop
   a duplicated check in gpiod_find_and_request())
 - reshuffle the code to remove unnecessary forward declarations
 - coding style cleanups and improvements
 - add a helper for accessing device fwnodes
 - small updates in docs
 
 Driver improvements:
 - convert all remaining GPIO irqchip drivers to using immutable irqchips
 - drop unnecessary of_match_ptr() macro expansions
 - shrink the code in gpio-merrifield significantly by reusing the code from
   gpio-tangier + minor tweaks to the driver code
 - remove MODULE_LICENSE() from drivers that can only be built-in
 - add device-tree support to gpio-loongson1
 - use new regmap features in gpio-104-dio-48e and gpio-pcie-idio-24
 - minor tweaks and fixes to gpio-xra1403, gpio-sim, gpio-tegra194, gpio-omap,
   gpio-aspeed, gpio-raspberrypi-exp
 - shrink code in gpio-ich and gpio-pxa
 - Kconfig tweak for gpio-pmic-eic-sprd
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Merge tag 'gpio-updates-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "We have some new drivers, significant refactoring of existing intel
  platforms, lots of improvements all around, mass conversion to using
  immutable irqchips by drivers that had not been converted individually
  yet and some changes in the core library code.

  Summary:

  New drivers:
   - add a driver for the Loongson GPIO controller
   - add a driver for the fxl6408 I2C GPIO expander
   - add a GPIO module containing code common for Intel Elkhart Lake and
     Merrifield platforms
   - add a driver for the Intel Elkhart Lake platform reusing the code
     from the intel tangier library

  GPIOLIB core:
   - GPIO ACPI improvements
   - simplify gpiochip_add_data_with_keys() fwnode handling
   - cleanup header inclusions (remove unneeded ones, order the rest
     alphabetically)
   - remove duplicate code (reuse krealloc() instead of open-coding it,
     drop a duplicated check in gpiod_find_and_request())
   - reshuffle the code to remove unnecessary forward declarations
   - coding style cleanups and improvements
   - add a helper for accessing device fwnodes
   - small updates in docs

  Driver improvements:
   - convert all remaining GPIO irqchip drivers to using immutable
     irqchips
   - drop unnecessary of_match_ptr() macro expansions
   - shrink the code in gpio-merrifield significantly by reusing the
     code from gpio-tangier + minor tweaks to the driver code
   - remove MODULE_LICENSE() from drivers that can only be built-in
   - add device-tree support to gpio-loongson1
   - use new regmap features in gpio-104-dio-48e and gpio-pcie-idio-24
   - minor tweaks and fixes to gpio-xra1403, gpio-sim, gpio-tegra194,
     gpio-omap, gpio-aspeed, gpio-raspberrypi-exp
   - shrink code in gpio-ich and gpio-pxa
   - Kconfig tweak for gpio-pmic-eic-sprd"

* tag 'gpio-updates-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (99 commits)
  gpio: gpiolib: Simplify gpiochip_add_data_with_key() fwnode
  gpiolib: Add gpiochip_set_data() helper
  gpiolib: Move gpiochip_get_data() higher in the code
  gpiolib: Check array_info for NULL only once in gpiod_get_array()
  gpiolib: Replace open coded krealloc()
  gpiolib: acpi: Add a ignore wakeup quirk for Clevo NL5xNU
  gpiolib: acpi: Move ACPI device NULL check to acpi_get_driver_gpio_data()
  gpiolib: acpi: use the fwnode in acpi_gpiochip_find()
  gpio: mm-lantiq: Fix typo in the newly added header filename
  sh: mach-x3proto: Add missing #include <linux/gpio/driver.h>
  powerpc/40x: Add missing select OF_GPIO_MM_GPIOCHIP
  gpio: xlp: Convert to immutable irq_chip
  gpio: xilinx: Convert to immutable irq_chip
  gpio: xgs-iproc: Convert to immutable irq_chip
  gpio: visconti: Convert to immutable irq_chip
  gpio: tqmx86: Convert to immutable irq_chip
  gpio: thunderx: Convert to immutable irq_chip
  gpio: stmpe: Convert to immutable irq_chip
  gpio: siox: Convert to immutable irq_chip
  gpio: rda: Convert to immutable irq_chip
  ...
2023-04-25 17:18:18 -07:00
Linus Torvalds
d53c3eaaef ARM: SoC devicetree changes for 6.4
The devicetree changes overall are again dominated by the Qualcomm
 Snapdragon platform that weighs in at over 300 changesets, but there
 are many updates across other platforms as well, notably Mediatek, NXP,
 Rockchips, Renesas, TI, Samsung and ST Microelectronics. These all
 add new features for existing machines, as well as new machines and
 SoCs.
 
 The newly added SoCs are:
 
  - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V
    based D1 chip.
 
  - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core
    like its JH7100 predecessor, but with additional CPU cores
    and a GPU.
 
  - Apple M2 as used in current Macbook Air/Pro and Mac Mini
    gets added, with comparable support as its M1 predecessor.
 
  - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC
 
  - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs,
    based on the Cortex-A53 and Cortex-A73 cores, respectively.
 
  - Qualcomm sa8775p is an automotive SoC derived from the
    Snapdragon family.
 
 Including the initial board support for the added SoC platforms,
 there are 52 new machines. The largest group are 19 boards
 industrial embedded boards based on the NXP i.MX6 (32-bit)
 and i.MX8 (64-bit) families.
 
 Others include:
 
  - Two boards based on the Allwinner f1c200s ultra-low-cost chip
 
  - Three "Banana Pi" variants based on the Amlogic g12b
    (A311D, S922X) SoC.
 
  - The Gl.Inet mv1000 router based on Marvell Armada 3720
 
  - A Wifi/LTE Dongle based on Qualcomm msm8916
 
  - Two robotics boards based on Qualcomm QRB chips
 
  - Three Snapdragon based phones made by Xiaomi
 
  - Five developments boards based on various Rockchip SoCs,
    including the rk3588s-khadas-edge2 and a few NanoPi
    models
 
  - The AM625 Beagleplay industrial SBC
 
 Another 14 machines get removed: both boards for the obsolete "oxnas"
 platform, three boards for the Renesas r8a77950 SoC that were only for
 pre-production chips, and various chromebook models based on the Qualcomm
 Sc7180 "trogdor" design that were never part of products.
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Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The devicetree changes overall are again dominated by the Qualcomm
  Snapdragon platform that weighs in at over 300 changesets, but there
  are many updates across other platforms as well, notably Mediatek,
  NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These
  all add new features for existing machines, as well as new machines
  and SoCs.

  The newly added SoCs are:

   - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1
     chip.

   - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its
     JH7100 predecessor, but with additional CPU cores and a GPU.

   - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets
     added, with comparable support as its M1 predecessor.

   - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC

   - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on
     the Cortex-A53 and Cortex-A73 cores, respectively.

   - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon
     family.

  Including the initial board support for the added SoC platforms, there
  are 52 new machines. The largest group are 19 boards industrial
  embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit)
  families.

  Others include:

   - Two boards based on the Allwinner f1c200s ultra-low-cost chip

   - Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X)
     SoC.

   - The Gl.Inet mv1000 router based on Marvell Armada 3720

   - A Wifi/LTE Dongle based on Qualcomm msm8916

   - Two robotics boards based on Qualcomm QRB chips

   - Three Snapdragon based phones made by Xiaomi

   - Five developments boards based on various Rockchip SoCs, including
     the rk3588s-khadas-edge2 and a few NanoPi models

   - The AM625 Beagleplay industrial SBC

  Another 14 machines get removed: both boards for the obsolete 'oxnas'
  platform, three boards for the Renesas r8a77950 SoC that were only for
  pre-production chips, and various chromebook models based on the
  Qualcomm Sc7180 'trogdor' design that were never part of products"

* tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits)
  arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro
  arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b
  arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B
  arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b
  arm64: dts: apple: t8112: Add PWM controller
  arm64: dts: apple: t600x: Add PWM controller
  arm64: dts: apple: t8103: Add PWM controller
  arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x
  ARM: dts: nomadik: Replace deprecated spi-gpio properties
  ARM: dts: aspeed-g6: Add UDMA node
  ARM: dts: aspeed: greatlakes: add mctp device
  ARM: dts: aspeed: greatlakes: Add gpio names
  ARM: dts: aspeed: p10bmc: Change power supply info
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer
  arm64: dts: mediatek: mt6795: Add tertiary PWM node
  arm64: dts: rockchip: add panel to Anbernic RG353 series
  dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC
  dt-bindings: arm: fsl: Add chargebyte Tarragon
  dt-bindings: vendor-prefixes: add chargebyte
  ...
2023-04-25 12:11:54 -07:00
Hans Verkuil
b7badd752d pinctrl-bcm2835.c: fix race condition when setting gpio dir
In the past setting the pin direction called pinctrl_gpio_direction()
which uses a mutex to serialize this. That was changed to set the
direction directly in the pin controller driver, but that lost the
serialization mechanism. Since the direction of multiple pins are in
the same register you can have a race condition, something that was
in fact observed with the cec-gpio driver.

Add a new spinlock to serialize writing to the FSEL registers.

Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Fixes: 1a4541b68e ("pinctrl-bcm2835: don't call pinctrl_gpio_direction()")
Link: https://lore.kernel.org/r/4302b66b-ca20-0f19-d2aa-ee8661118863@xs4all.nl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-21 11:00:34 +02:00
Luca Weiss
7abf7f88df pinctrl: qcom: spmi-gpio: Add PMI632 support
Add support for the 8 GPIOs found on PMI632.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230414-pmi632-v2-2-98bafa909c36@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-21 10:28:51 +02:00
Jonathan Neuschäfer
f9a5502f8e pinctrl: wpcm450: select MFD_SYSCON
The pinctrl-wpcm450 driver relies on MFD_SYSCON functionality in order
to find some of its MMIO registers. Select MFD_SYSCON from
PINCTRL_WPCM450 to ensure that it's enabled.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20230412185049.3782842-1-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-21 10:21:44 +02:00
Linus Walleij
19bcff7e27 pinctrl: qcom ssbi-gpio: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-6-6b59a5186b00@linaro.org
2023-04-20 16:07:40 +02:00
Linus Walleij
5e75e24eb1 pinctrl: qcom ssbi-mpp: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-5-6b59a5186b00@linaro.org
2023-04-20 16:07:40 +02:00
Linus Walleij
9890a043b3 pinctrl: qcom spmi-mpp: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-4-6b59a5186b00@linaro.org
2023-04-20 16:07:40 +02:00
Linus Walleij
35d008679a pinctrl: plgpio: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-3-6b59a5186b00@linaro.org
2023-04-20 16:07:40 +02:00
Linus Walleij
33c56e5ca0 pinctrl: pistachio: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-2-6b59a5186b00@linaro.org
2023-04-20 16:07:40 +02:00
Linus Walleij
a0a53f1bf1 pinctrl: pic32: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition. Switch some call to use irqd_to_hwirq() in the
process.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-1-6b59a5186b00@linaro.org
2023-04-20 16:07:40 +02:00
Linus Walleij
df60325839 pinctrl: sx150x: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

I switched to consistently using irqd_to_hwirq() consistently
while we are at it.

As the driver now needs to get the gpio_chip in the .irq_mask
and .irq_unmask callbacks, I switched to a pattern where we
first fetch the gpio_chip and then the state container from
that in two steps. The compiler will do the same thing anyway.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-9-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Linus Walleij
7341944c78 pinctrl: stmfx: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

This driver rolls it's own resource handling and does not
use GPIOCHIP_IRQ_RESOURCE_HELPERS.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-8-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Linus Walleij
c36f8c06eb pinctrl: st: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

I switched to using irqd_to_hwirq() consistently while we
are at it.

This driver does not use the GPIOCHIP_IRQ_RESOURCE_HELPERS
as it defines its own resource reservations, simply in
order to turn IRQ lines into inputs on initialization.

Also switched the open coded calls to gpiochip_lock_as_irq()
to gpiochip_reqres_irq() so we also get the right module
reference counting.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-7-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Linus Walleij
cca973a823 pinctrl: mcp23s08: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

I switched to using irqd_to_hwirq() consistently while we
are at it.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-6-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Linus Walleij
52066a53bd pinctrl: equilibrium: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-5-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Linus Walleij
dcea54b7da pinctrl: npcm7xx: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

I refactored the way the state container was accessed in
the irq_chip callbacks to all look the same and switch to
use irqd_to_hwirq() while we are at it.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-4-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Linus Walleij
dccdc09199 pinctrl: armada-37xx: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-3-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Linus Walleij
bb7e64e60e pinctrl: nsp: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-2-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Linus Walleij
2cc4485e60 pinctrl: iproc: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-1-503788a7f6e6@linaro.org
2023-04-14 11:08:17 +02:00
Nick Alcock
b08401919c pinctrl: renesas: remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454 ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.

So remove it in the files in this commit, none of which can be built as
modules.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Luis Chamberlain <mcgrof@kernel.org>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2023-04-13 13:13:53 -07:00
Nick Alcock
7da1628cf3 pinctrl: mediatek: remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454 ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.

So remove it in the files in this commit, none of which can be built as
modules.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Luis Chamberlain <mcgrof@kernel.org>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: Sean Wang <sean.wang@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: linux-mediatek@lists.infradead.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2023-04-13 13:13:52 -07:00
Nick Alcock
feb7e8cba7 pinctrl: amd: remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454 ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.

So remove it in the files in this commit, none of which can be built as
modules.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Luis Chamberlain <mcgrof@kernel.org>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Cc: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2023-04-13 13:13:52 -07:00
Nick Alcock
c7b9975a44 pinctrl: bcm: ns: remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454 ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.

So remove it in the files in this commit, none of which can be built as
modules.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Luis Chamberlain <mcgrof@kernel.org>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2023-04-13 13:13:51 -07:00
Nick Alcock
1095ebc8d4 pinctrl: nuvoton: npcm7xx: remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454 ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.

So remove it in the files in this commit, none of which can be built as
modules.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Luis Chamberlain <mcgrof@kernel.org>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: Avi Fishman <avifishman70@gmail.com>
Cc: Tomer Maimon <tmaimon77@gmail.com>
Cc: Tali Perry <tali.perry1@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: openbmc@lists.ozlabs.org
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2023-04-13 13:13:50 -07:00
Nick Alcock
b9ef12eaa0 pinctrl: actions: remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454 ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.

So remove it in the files in this commit, none of which can be built as
modules.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Luis Chamberlain <mcgrof@kernel.org>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: "Andreas Färber" <afaerber@suse.de>
Cc: Manivannan Sadhasivam <mani@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-actions@lists.infradead.org
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2023-04-13 13:13:50 -07:00
Kornel Dulęba
534e465845 Revert "pinctrl: amd: Disable and mask interrupts on resume"
This reverts commit b26cd9325b.

This patch introduces a regression on Lenovo Z13, which can't wake
from the lid with it applied; and some unspecified AMD based Dell
platforms are unable to wake from hitting the power button

Signed-off-by: Kornel Dulęba <korneld@chromium.org>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230411134932.292287-1-korneld@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-11 22:45:42 +02:00
Linus Walleij
86169e657a pinctrl: renesas: Updates for v6.4 (take two)
- Retain POCCTRL0 register across s2ram on R-Car D3,
   - Add support for Ethernet power-sources on R-Car V3M, V3H, E3, D3,
     and V4H,
   - Annotate sentinels in tables,
   - Add bias pinconf support and PWM pin groups on R-Car H1,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.4 (take two)

  - Retain POCCTRL0 register across s2ram on R-Car D3,
  - Add support for Ethernet power-sources on R-Car V3M, V3H, E3, D3,
    and V4H,
  - Annotate sentinels in tables,
  - Add bias pinconf support and PWM pin groups on R-Car H1,
  - Miscellaneous fixes and improvements.
2023-04-11 00:23:27 +02:00
Douglas Anderson
b391efeeaf pinctrl: qcom: Add "and" to PIN_CONFIG_INPUT_ENABLE comment
The comment recently added talking about PIN_CONFIG_INPUT_ENABLE is
clearly missing the word "and". Comments live forever, so let's fix
it.

Fixes: e49eabe3e1 ("pinctrl: qcom: Support OUTPUT_ENABLE; deprecate INPUT_ENABLE")
Reported-by: Stephen Boyd <swboyd@chromium.org>
Link: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/4409769/comment/9a1d5def_e1e71db7/
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20230407142859.1.Ia5d70e320b60d6707c6182879097708e49b8b519@changeid
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-11 00:22:32 +02:00
Bartosz Golaszewski
0538897a01 pinctrl: qcom: spmi-gpio: add support for pmm8654au-gpio
Add support for the GPIO controller present on the pmm8654au PMIC.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230327125316.210812-14-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-11 00:08:26 +02:00
Tom Rix
743d333602 pinctrl: mlxbf3: set varaiable mlxbf3_pmx_funcs storage-class-specifier to static
smatch reports
drivers/pinctrl/pinctrl-mlxbf3.c:162:20: warning: symbol
  'mlxbf3_pmx_funcs' was not declared. Should it be static?

This variable is only used in one file so it should be static.

Signed-off-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/20230404004501.1913144-1-trix@redhat.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-04 16:07:06 +02:00
Lakshmi Sowjanya D
7edfe0eeef pinctrl: Remove Intel Thunder Bay pinctrl driver
Remove Thunder Bay specific code as the product got cancelled
and there are no end customers or users.

Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
Link: https://lore.kernel.org/r/20230403120235.939-1-lakshmi.sowjanya.d@intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-04 15:50:58 +02:00
Aleksander Jan Bajkowski
33a36b8188 pinctrl: xway: drop the deprecated compatible strings
This code are marked as deprecated since kernel 4.5[1]. Downstream OpenWRT
and upstream switched to the new string compatible 7 years ago. The old
compatible strings can safely be dropped.

[1] commit be14811c03 ("pinctrl/lantiq: introduce new dedicated devicetree bindings")

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://lore.kernel.org/r/20230330212225.10214-1-olek2@wp.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-31 14:38:20 +02:00
Mario Limonciello
010f493d90 pinctrl: amd: Add fields for interrupt status and wake status
If the firmware has misconfigured a GPIO it may cause interrupt
status or wake status bits to be set and not asserted. Add these
to debug output to catch this case.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230328174231.8924-3-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-31 14:23:59 +02:00
Mario Limonciello
75358cf331 pinctrl: amd: Adjust debugfs output
More fields are to be added, so to keep the display from being
too busy, adjust it.

1) Add a header to all columns
2) Except for interrupt, when fields have no data show empty
3) Remove otherwise blank whitespace

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230328174231.8924-2-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-31 14:23:59 +02:00
Geert Uytterhoeven
45e6cc8ef1 pinctrl: renesas: core: Drop unneeded #ifdef CONFIG_OF
As the of_node member of struct device always exists, and there is a
dummy of of_device_get_match_data() for the !CONFIG_OF case, there is no
longer a need to protect code using these interfaces with an #ifdef.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/55d72ce46b43ec2f41681cb5ba7ca7fcebdb98d1.1679416005.git.geert+renesas@glider.be
2023-03-30 15:41:14 +02:00
Geert Uytterhoeven
890c3a6ff2 pinctrl: renesas: r8a7779: Add PWM pins, groups, and functions
Add pins, groups, and functions for the PWM Timers on the Renesas R-Car
H1 (R8A7779) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cea9723e9c3df4b1408750caa38886aac1fab5f7.1679329090.git.geert+renesas@glider.be
2023-03-30 15:39:05 +02:00
Geert Uytterhoeven
63a66eb8ff pinctrl: renesas: r8a7779: Add bias pinconf support
Implement support for pull-up handling for the R-Car H1 SoC, using the
common R-Car bias handling.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/dd966cfc916ef881051ec53bc3393dce7eea8e03.1679328215.git.geert+renesas@glider.be
2023-03-30 15:39:05 +02:00
Geert Uytterhoeven
0256b6aeee pinctrl: renesas: Annotate sentinels in tables
It does not make sense to have a comma after a sentinel, as any new
elements must be added before the sentinel.  Hence drop all such commas.

Add comments to clarify the purpose of the empty elements.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/845f1d8285dd44522af1b0f429d4c6bd4759eb9e.1678272180.git.geert+renesas@glider.be
2023-03-30 15:39:05 +02:00
Geert Uytterhoeven
3c2465067f pinctrl: renesas: r8a779g0: Add support for AVB/TSN power-sources
Add support for configuring the I/O voltage levels of the Ethernet AVB
and Ethernet TSN pins on the R-Car V4H SoC.  "PIN_VDDQ_AVB[012]" and
"PIN_VDDQ_TSN0" can be configured for 1.8V or 2.5V operation.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c046e0be7d26302061d7aa629180a451734ddf8f.1678271030.git.geert+renesas@glider.be
2023-03-30 15:39:05 +02:00
Geert Uytterhoeven
d04b961dd4 pinctrl: renesas: r8a77995: Add support for AVB power-source
Add support for configuring the I/O voltage level of the Ethernet AVB
pins on the R-Car D3 SoC.  "PIN_VDDQ_AVB0" can be configured for 2.5V or
3.3V operation.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/8f9164487715d8a4898ca651038c0b4d5013764c.1678271030.git.geert+renesas@glider.be
2023-03-30 15:39:05 +02:00
Geert Uytterhoeven
7f25d5b04a pinctrl: renesas: r8a77990: Add support for AVB power-source
Add support for configuring the I/O voltage level of the Ethernet AVB
pins on the R-Car E3 SoC.  "PIN_VDDQ_AVB0" can be configured for 2.5V or
3.3V operation.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/57883cd2d94c7919dc0f0db07cf6169ca89538e6.1678271030.git.geert+renesas@glider.be
2023-03-30 15:39:05 +02:00
Geert Uytterhoeven
6cd853a453 pinctrl: renesas: r8a77980: Add support for AVB/GE power-sources
Add support for configuring the I/O voltage levels of the Ethernet AVB
and Gigabit Ethernet pins on the R-Car V3H SoC.  "PIN_VDDQ_AVB" and
"PIN_VDDQ_GE" can be configured for 2.5V or 3.3V operation.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3c26c4f3735a6d071685c507c065172e63af5d70.1678271030.git.geert+renesas@glider.be
2023-03-30 15:39:04 +02:00
Geert Uytterhoeven
a7bebdc590 pinctrl: renesas: r8a77970: Add support for AVB power-source
Add support for configuring the I/O voltage level of the Ethernet AVB
pins on the R-Car V3M SoC.  "PIN_VDDQ_AVB0" can be configured for 2.5V
or 3.3V operation.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/eb4db82bdeb67507a1a77f63b9d90280d6f38ba4.1678271030.git.geert+renesas@glider.be
2023-03-30 15:39:04 +02:00
Geert Uytterhoeven
b88e733ac5 pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels
Currently, the Renesas pin control driver supports pins that can switch
their I/O voltage levels between either 1.8V and 3.3V, or between 2.5V
and 3.3V.  However, some SoCs have pins that can switch between 1.8V and
2.5V.

Add support for this by replacing the separate SH_PFC_PIN_CFG_IO_VOLTAGE
capability and voltage level flags by a 2-bit field, to cover three
possible I/O voltage switching options.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0c04925457bf3f7e78e7e3851528d9a4c29246da.1678271030.git.geert+renesas@glider.be
2023-03-30 15:39:04 +02:00
Geert Uytterhoeven
a3ca1e1893 pinctrl: renesas: rcar: Phase out old SH_PFC_PIN_CFG_IO_VOLTAGE flag
Commit 537db25ca3 ("pinctrl: renesas: Add I/O voltage level
flag") introduced new flags to support pins that can switch their
voltage levels between either 1.8V and 3.3V, or between 2.5V and 3.3V.
The old SH_PFC_PIN_CFG_IO_VOLTAGE flag was retained to avoid having to
change existing drivers.

Replace SH_PFC_PIN_CFG_IO_VOLTAGE by SH_PFC_PIN_CFG_IO_VOLTAGE_18_33, to
make the voltage configuration explicit, and to prepare for the advent
of support for more voltage levels.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ae5f879c093f3e3cd50ba1495975bccfad81237b.1678271030.git.geert+renesas@glider.be
2023-03-30 15:39:04 +02:00
Geert Uytterhoeven
31f0a454d3 pinctrl: renesas: r8a77995: Retain POCCTRL0 register across suspend/resume
The POC Control Register 0 (POCCTRL0) on R-Car D3 is not registered in
the pinmux_ioctrl_regs[] array.  Hence it is not saved/restored during
suspend/resume, and its contents may be lost after s2ram.

This went unnoticed when improving suspend/resume support in commit
d92ee9cf8e ("pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register
across suspend/resume").

Fix this by moving the pinmux_ioctrl_regs[] array up, and adding the
POCCTRL0 register.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d17402b83b1f3fa0f572527c0382027bccb86205.1678271030.git.geert+renesas@glider.be
2023-03-30 15:39:04 +02:00
Uwe Kleine-König
c458290702 pinctrl: mcp23s08: Implement gpio bulk functions
To speed up some usecases implement reading and writing several IO lines
at once.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230324164957.485924-3-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-29 16:30:19 +02:00
Uwe Kleine-König
d490be6dd8 pinctrl: mcp23s08: Rename and change function that wraps regmap_update_bits()
The semantic of mcp_set_mask() was surprising to me when I first read
that driver. So it was unexpected that in the call

	mcp_set_mask(mcp, MCP_OLAT, mask, value);

value was a bool. Make the function a thinner wrapper around
regmap_update_bits() and rename it to also have a similar name.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230324164957.485924-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-29 16:30:19 +02:00
Linus Walleij
2a6ac65c94 Merge branch 'ib-qcom-quad-spi' into devel 2023-03-29 10:47:18 +02:00
Douglas Anderson
e49eabe3e1 pinctrl: qcom: Support OUTPUT_ENABLE; deprecate INPUT_ENABLE
The Qualcomm pinctrl driver has been violating the documented meaning
of PIN_CONFIG_INPUT_ENABLE. That documentation says:

  Note that this does not affect the pin's ability to drive output.

...yet the Qualcomm driver's sole action when asked to "enable input"
on a pin is to disable its output.

The Qualcomm driver's implementation stems from the fact that
"output-disable" is a "new" property from 2017. It was introduced in
commit 425562429d ("pinctrl: generic: Add output-enable
property"). The "input-enable" handling in Qualcomm drivers is from
2015 introduced in commit 407f5e392f ("pinctrl: qcom: handle
input-enable pinconf property").

Let's change the Qualcomm driver to move us in the right direction. As
part of this:
1. We'll now support PIN_CONFIG_OUTPUT_ENABLE
2. We'll still support using PIN_CONFIG_INPUT_ENABLE to disable a
   pin's output (in violation of the docs) with a big comment in the
   code. This is needed because old device trees have "input-enable"
   in them and, in some cases, people might need the old
   behavior. While we could programmatically change all old device
   trees, it doesn't really hurt to keep supporting the old behavior
   and we're _supposed_ to try to be compatible with old device trees
   anyway.

It can also be noted that the PIN_CONFIG_INPUT_ENABLE handling code
seems to have purposefully ignored its argument. That means that old
boards that had _either_ "input-disable" or "input-enable" in them
would have had the effect of disabling a pin's output. While we could
change this behavior, since we're only leaving the
PIN_CONFIG_INPUT_ENABLE there for backward compatibility we might as
well be fully backward compatible.

NOTE: despite the fact that we'll still support
PIN_CONFIG_INPUT_ENABLE for _setting_ config, we take it away from
msm_config_group_get(). This appears to be only used for populating
debugfs and fixing debugfs to "output enabled" where relevant instead
of "input enabled" makes more sense and has more truthiness.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230323102605.8.Id740ae6a993f9313b58add6b10f6a92795d510d4@changeid
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-29 10:46:59 +02:00
Kornel Dulęba
b26cd9325b pinctrl: amd: Disable and mask interrupts on resume
This fixes a similar problem to the one observed in:
commit 4e5a04be88 ("pinctrl: amd: disable and mask interrupts on probe").

On some systems, during suspend/resume cycle firmware leaves
an interrupt enabled on a pin that is not used by the kernel.
This confuses the AMD pinctrl driver and causes spurious interrupts.

The driver already has logic to detect if a pin is used by the kernel.
Leverage it to re-initialize interrupt fields of a pin only if it's not
used by us.

Cc: stable@vger.kernel.org
Fixes: dbad75dd1f ("pinctrl: add AMD GPIO driver support.")
Signed-off-by: Kornel Dulęba <korneld@chromium.org>
Link: https://lore.kernel.org/r/20230320093259.845178-1-korneld@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-28 15:20:18 +02:00
Chester Lin
966b0e64b6 pinctrl: s32cc: Use generic struct data to describe pin function
Replace struct s32_pmx_func with generic struct pinfunction since they
have the same data fields.

Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Chester Lin <clin@suse.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230327062754.3326-5-clin@suse.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-27 23:36:18 +02:00
Chester Lin
8ff169e844 pinctrl: s32cc: embed generic struct pingroup
Use generic data structure to describe pin control groups in S32 SoC family
and drop duplicated struct members.

Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Chester Lin <clin@suse.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230327062754.3326-4-clin@suse.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-27 23:35:35 +02:00
Chester Lin
48b016cbb2 pinctrl: s32cc: refactor pin config parsing
Move common codes into smaller inline functions and remove argument checks
that are not actually used by pull up/down bits in the S32 MSCR register.

Signed-off-by: Chester Lin <clin@suse.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230327062754.3326-3-clin@suse.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-27 23:35:00 +02:00
Chester Lin
08b71a71f3 pinctrl: s32: refine error/return/config checks and simplify driver codes
Improve error/return code handlings and config checks in order to have
better reliability and simplify driver codes such as removing/changing
improper macros, blanks, print formats and helper calls.

Signed-off-by: Chester Lin <clin@suse.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230327062754.3326-2-clin@suse.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-27 23:34:24 +02:00
Linus Walleij
617385bb27 pinctrl: renesas: Updates for v6.4
- Add pin groups for audio on R-Car V4H,
   - Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.4

  - Add pin groups for audio on R-Car V4H,
  - Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC,
  - Miscellaneous fixes and improvements.
2023-03-27 23:29:11 +02:00
Rob Herring
e0e8fbf846 pinctrl: Use of_property_present() for testing DT property presence
It is preferred to use typed property access functions (i.e.
of_property_read_<type> functions) rather than low-level
of_get_property/of_find_property functions for reading properties. As
part of this, convert of_get_property/of_find_property calls to the
recently added of_property_present() helper when we just want to test
for presence of a property and nothing more.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230310144721.1544669-1-robh@kernel.org
[Dropped hunk hitting drivers/pinctrl/renesas/pinctrl.c]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-23 09:28:38 +01:00
Asmaa Mnebhi
d11f932808 pinctrl: mlxbf3: Add pinctrl driver support
NVIDIA BlueField-3 SoC has a few pins that can be used as GPIOs
or take the default hardware functionality. Add a driver for
the pin muxing.

Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230315215027.30685-3-asmaa@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19 22:07:21 +01:00
Devi Priya
c74eef68fd pinctrl: qcom: Add IPQ9574 pinctrl driver
Add pinctrl definitions for the TLMM of IPQ9574

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20230316072940.29137-5-quic_devipriy@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19 22:00:47 +01:00
Danila Tikhonov
b915395c9e pinctrl: qcom: Add SM7150 pinctrl driver
Add pinctrl driver for TLMM block found in SM7150 SoC.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Link: https://lore.kernel.org/r/20230311212114.108870-3-danila@jiaxyga.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19 21:51:17 +01:00
Arınç ÜNAL
ea183c3731 pinctrl: mediatek: remove OF_GPIO as reverse dependency
The OF_GPIO option is enabled by default when GPIOLIB is enabled, and
cannot be disabled. Remove it as a reverse dependency where GPIOLIB is also
set as a reverse dependency.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20230317213011.13656-6-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19 21:47:25 +01:00
Arınç ÜNAL
dc6ae2057c pinctrl: ralink: move to mediatek as mtmips
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
introduced new SoCs which utilise this platform. Move the driver to
mediatek pinctrl directory. Rename the ralink core driver to mtmips.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Link: https://lore.kernel.org/r/20230317213011.13656-5-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19 21:47:25 +01:00
Arınç ÜNAL
f7dedad4e2 pinctrl: ralink: mt7620: split out to mt76x8
Split the driver out to pinctrl-mt76x8.c. Remove including the unnecessary
headers since is_mt76x8() is not being used anymore.

Introduce a new compatible string to be able to document the pin muxing
information properly.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20230317213011.13656-4-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19 21:47:25 +01:00
Arınç ÜNAL
5465d98912 pinctrl: ralink: rt305x: add new compatible string for every SoC
Add new compatible strings to make every SoC, or SoCs that use the same
pinmux data have a unique compatible string. This ensures that the pin
muxing information of every SoC, or a set of SoCs that use the same pinmux
data can be properly documented.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20230317213011.13656-3-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19 21:47:25 +01:00
Arınç ÜNAL
7c19147d9c pinctrl: ralink: reintroduce ralink,rt2880-pinmux compatible string
There have been stable releases with the ralink,rt2880-pinmux compatible
string included. Having it removed breaks the ABI. Reintroduce it.

Fixes: e5981cd461 ("pinctrl: ralink: add new compatible strings for each pinctrl subdriver")
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20230317213011.13656-2-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19 21:47:25 +01:00
Geert Uytterhoeven
9d7558ed83 pinctrl: renesas: Drop support for Renesas-specific properties
The last user of the Renesas-specific properties was converted to the
standard properties in commit af897250ea ("ARM: dts: gose: use
generic pinctrl properties in SDHI nodes") in v4.10.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/ff9c14781110bbf19b56b45dd1f01e6da90319ad.1678704441.git.geert+renesas@glider.be
2023-03-16 16:55:27 +01:00
Krzysztof Kozlowski
10fe4a1399 pinctrl: qcom: sm8550-lpass-lpi: allow GPIO function
All LPASS pins have basic GPIO function and most of the code is ready
for that.  Add missing glue pieces to allow LPASS pins to work as GPIO,
which is going to be used on MTP8550 and QRD8550 boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230309154949.658380-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:24:58 +01:00
Krzysztof Kozlowski
fae1466da9 pinctrl: qcom: lpass-lpi: allow glitch-free output GPIO
When choosing GPIO function for pins, use the same glitch-free method as
main TLMM pinctrl-msm.c driver in msm_pinmux_set_mux().  This replicates
the commit d21f4b7ffc ("pinctrl: qcom: Avoid glitching lines when we
first mux to output") to LPASS pin controller with same justification.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230309154949.658380-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:24:58 +01:00
Krzysztof Kozlowski
926cf596ce pinctrl: qcom: lpass-lpi: use consistent name for "group" variable
The set_mux callback in SoC TLMM driver (pinctrl-msm.c) uses "group",
not "group_num" for the number of the pin group.  Other places of
lpass-lpi also use "group", so let's be consistent for code readability.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230309154949.658380-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:24:58 +01:00
Krzysztof Kozlowski
163bfb0cb1 pinctrl: qcom: lpass-lpi: set output value before enabling output
As per Hardware Programming Guide, when configuring pin as output,
set the pin value before setting output-enable (OE).  Similar approach
is in main SoC TLMM pin controller.

Cc: <stable@vger.kernel.org>
Fixes: 6e261d1090 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230309154949.658380-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:24:57 +01:00
Konrad Dybcio
29f6e7e379 pinctrl: qcom: msm8998: Add MPM pin mappings
Add MPM <-> TLMM pin mappings to allow for waking up the AP from sleep
through MPM-connected pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230308213651.647098-1-konrad.dybcio@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:23:06 +01:00
Mark Brown
5361ebe94a pinctrl: at91: Remove pioc_index from struct at91_gpio_chip
The pioc_idx member of struct at91_gpio_chip is write only, just remove it.

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230216-gpio-at91-immutable-v2-2-326ef362dbc7@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:21:54 +01:00
Mark Brown
d61955da32 pinctrl: at91: Make the irqchip immutable
To help gpiolib not fiddle around with the internals of the irqchip
flag the chip as immutable, adding the calls into the gpiolib core
required to do so.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230216-gpio-at91-immutable-v2-1-326ef362dbc7@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:21:54 +01:00
Arnd Bergmann
f7fc5768e5 pinctrl: s32cc: fix !CONFIG_PM_SLEEP build error
The declaration of s32_pinctrl_suspend/s32_pinctrl_resume is hidden
in an #ifdef, causing a compilation failure when CONFIG_PM_SLEEP is
disabled:

drivers/pinctrl/nxp/pinctrl-s32g2.c:754:38: error: 's32_pinctrl_suspend' undeclared here (not in a function); did you mean 's32_pinctrl_probe'?
drivers/pinctrl/nxp/pinctrl-s32g2.c:754:9: note: in expansion of macro 'SET_LATE_SYSTEM_SLEEP_PM_OPS'
  754 |         SET_LATE_SYSTEM_SLEEP_PM_OPS(s32_pinctrl_suspend,
      |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~

Remove the bogus #ifdef and __maybe_unused annation on the global
functions, and instead use the proper LATE_SYSTEM_SLEEP_PM_OPS()
macro to pick set the function pointer.

As the function definition is still in the #ifdef block, this leads
to the correct code in all configurations.

Fixes: fd84aaa817 ("pinctrl: add NXP S32 SoC family support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20230310140250.359147-1-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:19:39 +01:00
Krzysztof Kozlowski
3f2d456089 pinctrl: sx150x: drop of_match_ptr for ID table
The driver will match mostly by DT table (even thought there is regular
ID table) so there is little benefit in of_match_ptr (this also allows
ACPI matching via PRP0001, even though it might not be relevant here).
This also fixes !CONFIG_OF error:

  drivers/pinctrl/pinctrl-sx150x.c:833:34: error: ‘sx150x_of_match’ defined but not used [-Werror=unused-const-variable=]

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230312132702.352832-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-13 11:17:50 +01:00
Wolfram Sang
47ea7ff19f pinctrl: renesas: Remove R-Car H3 ES1.* handling
R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds.  These become a maintenance
burden now, so our development group decided to remove upstream support
and disable booting for this SoC.  Public users only have ES2 onwards.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230307105645.5285-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-10 17:12:40 +01:00
Geert Uytterhoeven
9da805344d pinctrl: renesas: r8a779g0: Fix ERROROUTC function names
According to R-Car V4H Series User’s Manual: Hardware Rev. 0.54, the
ERROROUTC signal is active-low.  Hence add the missing "_N" suffix to
the pin function's names.

Resize column 2 of all IPxSR* definitions to accomodate the longer
names.

Fixes: b811062e5f ("pinctrl: renesas: r8a779g0: Add missing ERROROUTC_A")
Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1774303989e7d61f08fa81f1c2fa1b394505645f.1669036423.git.geert+renesas@glider.be
2023-03-10 17:12:40 +01:00
Geert Uytterhoeven
203734a041 pinctrl: renesas: r8a779g0: Fix Group 6/7 pin functions
According to R-Car V4H Series User’s Manual: Hardware Rev. 0.54, pin
groups 6 and 7 do not use Module Select Registers to configure pin
functions.

Hence:
  - Remove the non-existent Module Select Registers (MODSEL[67]),
  - Correct the affected PINMUX definitions.

Fixes: 36611d28f5 ("pinctrl: renesas: r8a779g0: Add missing MODSELx for AVBx")
Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/06972cafd0efa4cfb395cfa76000a1bdae5e9e73.1669036423.git.geert+renesas@glider.be
2023-03-10 17:12:37 +01:00
Geert Uytterhoeven
0a7a5226e7 pinctrl: renesas: r8a779g0: Fix Group 4/5 pin functions
According to R-Car V4H Series User’s Manual: Hardware Rev. 0.54, pin
groups 4 and 5 do not use Module Select Registers to configure pin
functions, but use Peripheral Function Select Registers instead.

Hence:
  - Remove the non-existent Module Select Registers (MODSEL[45]),
  - Add the missing Peripheral Function Select Registers (IPxSR[45]),
  - Correct the GPIO / Peripheral Function Select Register definitions
    (GPSR]45_*),
  - Correct the affected PINMUX definitions.

Fixes: 36611d28f5 ("pinctrl: renesas: r8a779g0: Add missing MODSELx for AVBx")
Fixes: 36fb7b8af5 ("pinctrl: renesas: r8a779g0: Add missing MODSELx for TSN0")
Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3d3833d1738f5e8fcc4c1002aa93832464d129a0.1669036423.git.geert+renesas@glider.be
2023-03-10 17:12:18 +01:00
Md Sadre Alam
713834cf2c pinctrl: qcom: Use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Link: https://lore.kernel.org/r/20230306144641.21955-1-quic_mdalam@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-09 14:50:26 +01:00
Rasmus Villemoes
6cf103bc03 pinctrl: freescale: remove generic pin config core support
No instance of "struct imx_pinctrl_soc_info" sets '.generic_pinconf =
true', so all of this is effectively dead code.

To make it easier to understand the actual code, remove all the unused
cruft. This effectively reverts a5cadbbb08 ("pinctrl: imx: add
generic pin config core support").

It was only in use by a single SOC (imx7ulp) for a few releases, and
the commit message of dbffda08f0 ("pinctrl: fsl: imx7ulp: change to
use imx legacy binding") suggests that it won't be used in the
future. Certainly no new user has appeared in 20+ releases, and should
the need arise, this can be dug out of git history again.

Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Reviewed-by: Fabio Estevam  <festevam@gmail.com>
Link: https://lore.kernel.org/r/20230302072132.1051590-1-linux@rasmusvillemoes.dk
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-07 14:15:37 +01:00
Claudiu Beznea
5a8f9cf269 pinctrl: at91-pio4: use proper format specifier for unsigned int
Use %u instead of %d as line is unsigned int.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230302110116.342486-5-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-07 14:13:04 +01:00
Claudiu Beznea
f03fff55e6 pinctrl: at91-pio4: use dev_err_probe()
Use dev_err_probe() to simplify the code.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230302110116.342486-4-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-07 14:10:52 +01:00
Claudiu Beznea
1ffd07c619 pinctrl: at91-pio4: use device_get_match_data()
Use device_get_match_data() to simplify the code.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230302110116.342486-3-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-07 14:10:44 +01:00
Claudiu Beznea
8d35039d76 pinctrl: at91-pio4: use devm_clk_get_enabled()
Use devm_clk_get_enabled() to simplify the code.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230302110116.342486-2-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-07 14:10:35 +01:00
Dario Binacchi
913a956c43 pinctrl: stm32: use dynamic allocation of GPIO base
Since commit 502df79b86 ("gpiolib: Warn on drivers still using static
gpiobase allocation"), one or more warnings are printed during boot on
systems where static allocation of GPIO base is used:

[    0.197707] gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.199942] stm32f429-pinctrl soc:pinctrl@40020000: GPIOA bank added
[    0.200711] gpio gpiochip1: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.202855] stm32f429-pinctrl soc:pinctrl@40020000: GPIOB bank added
[    0.203591] gpio gpiochip2: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.205704] stm32f429-pinctrl soc:pinctrl@40020000: GPIOC bank added
[    0.206338] gpio gpiochip3: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.208448] stm32f429-pinctrl soc:pinctrl@40020000: GPIOD bank added
[    0.209182] gpio gpiochip4: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.211282] stm32f429-pinctrl soc:pinctrl@40020000: GPIOE bank added
[    0.212094] gpio gpiochip5: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.214270] stm32f429-pinctrl soc:pinctrl@40020000: GPIOF bank added
[    0.215005] gpio gpiochip6: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.217110] stm32f429-pinctrl soc:pinctrl@40020000: GPIOG bank added
[    0.217845] gpio gpiochip7: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.219959] stm32f429-pinctrl soc:pinctrl@40020000: GPIOH bank added
[    0.220602] gpio gpiochip8: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.222714] stm32f429-pinctrl soc:pinctrl@40020000: GPIOI bank added
[    0.223483] gpio gpiochip9: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.225594] stm32f429-pinctrl soc:pinctrl@40020000: GPIOJ bank added
[    0.226336] gpio gpiochip10: Static allocation of GPIO base is deprecated, use dynamic allocation.
[    0.228490] stm32f429-pinctrl soc:pinctrl@40020000: GPIOK bank added

So let's follow the suggestion and use dynamic allocation.

Tested on STM32F429I-DISC1 board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20230227205131.2104082-1-dario.binacchi@amarulasolutions.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 15:20:28 +01:00
Horatiu Vultur
657fd9da2d pinctrl: ocelot: Fix alt mode for ocelot
In case the driver was trying to set an alternate mode for gpio
0 or 32 then the mode was not set correctly. The reason is that
there is computation error inside the function ocelot_pinmux_set_mux
because in this case it was trying to shift to left by -1.
Fix this by actually shifting the function bits and not the position.

Fixes: 4b36082e2e ("pinctrl: ocelot: fix pinmuxing for pins after 31")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20230206203720.1177718-1-horatiu.vultur@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 15:18:07 +01:00
Johan Hovold
7bb97e360a pinctrl: at91-pio4: fix domain name assignment
Since commit d59f6617ee ("genirq: Allow fwnode to carry name
information only") an IRQ domain is always given a name during
allocation (e.g. used for the debugfs entry).

Drop the no longer valid name assignment, which would lead to an attempt
to free a string constant when removing the domain on late probe
failures (e.g. probe deferral).

Fixes: d59f6617ee ("genirq: Allow fwnode to carry name information only")
Cc: stable@vger.kernel.org	# 4.13
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Claudiu Beznea <claudiu.beznea@microchip.com> # on SAMA7G5
Link: https://lore.kernel.org/r/20230224130828.27985-1-johan+linaro@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 14:56:25 +01:00
Chester Lin
fd84aaa817 pinctrl: add NXP S32 SoC family support
Add the pinctrl driver for NXP S32 SoC family. This driver is mainly based
on NXP's downstream implementation on nxp-auto-linux repo[1].

[1] https://github.com/nxp-auto-linux/linux/tree/bsp35.0-5.15.73-rt/drivers/pinctrl/freescale

Signed-off-by: Matthew Nunez <matthew.nunez@nxp.com>
Signed-off-by: Phu Luu An <phu.luuan@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com>
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@nxp.com>
Signed-off-by: Radu Pirea <radu-nicolae.pirea@nxp.com>
Signed-off-by: Chester Lin <clin@suse.com>
Link: https://lore.kernel.org/r/20230220023320.3499-3-clin@suse.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 14:27:15 +01:00
Arınç ÜNAL
6de67ca4da pinctrl: mediatek: fix naming inconsistency
Some options include "MediaTek", some "Mediatek". Rename all to "MediaTek"
to address the naming inconsistency.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20230218065108.8958-2-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 14:22:34 +01:00
Arınç ÜNAL
c0ad453e94 pinctrl: mediatek: add missing options to PINCTRL_MT7981
There are options missing from PINCTRL_MT7981 whilst being on every other
pin controller. Add them.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20230218065108.8958-1-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 14:22:34 +01:00
Andy Shevchenko
00408f28c3 pinctrl: at91: Utilise temporary variable for struct device
We have a temporary variable to keep pointer to struct device.
Utilise it inside the ->probe() implementation.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230215134242.37618-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 13:52:35 +01:00
Andy Shevchenko
472bbb2cfd pinctrl: at91: Use dev_err_probe() instead of custom messaging
The custom message has no value except printing the error code,
the same does dev_err_probe(). Let's use the latter for the sake
of unification.

Note that some APIs already have messaging in them and some simply
do not require the current noise.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230215134242.37618-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 13:52:34 +01:00
Andy Shevchenko
6194485db6 pinctrl: at91: Use of_device_get_match_data()
Use of_device_get_match_data() to simplify the code.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230215134242.37618-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 13:52:34 +01:00
Andy Shevchenko
415a099ea5 pinctrl: at91: Don't mix non-devm calls with devm ones
Replace devm_clk_get() by devm_clk_get_enabled() and drop
unneeded code pieces. This will make sure we keep the ordering
of the resource allocation correct.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230215134242.37618-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 13:52:34 +01:00
Andy Shevchenko
f494c1913c pinctrl: at91: use devm_kasprintf() to avoid potential leaks (part 2)
Use devm_kasprintf() instead of kasprintf() to avoid any potential
leaks. At the moment drivers have no remove functionality hence
there is no need for fixes tag.

While at it, switch to use devm_kasprintf_strarray().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230215134242.37618-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06 13:52:34 +01:00
Arnd Bergmann
eccb7a0061 gpiolib: remove asm-generic/gpio.h
The asm-generic/gpio.h file is now always included when
using gpiolib, so just move its contents into linux/gpio.h
with a few minor simplifications.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-03-06 12:33:01 +02:00
Linh Phung
b37d57e1da pinctrl: renesas: r8a779g0: Add Audio SSI pins, groups, and functions
Add pins, groups, and functions for the Serial Sound Interface (SSI) on
the Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/87bkmcang2.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-06 10:51:13 +01:00
Linh Phung
59e579a6af pinctrl: renesas: r8a779g0: Add Audio Clock pins, groups, and functions
Add pins, groups, and functions for the Audio Clock on the Renesas R-Car
V4H (R8A779G0) SoC.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/87cz6sanga.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-06 10:51:13 +01:00
Phong Hoang
60003351e9 pinctrl: renesas: r8a779f0: Fix tsn1_avtp_pps pin group
Correct a typo mistake in the definition of the tsn1_avtp_pps pin group
mux.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Fixes: babe298e9c ("pinctrl: renesas: r8a779f0: Add Ethernet pins, groups, and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/45ea6e87b91c36fd0b9706cf58ff50a4d1a99c44.1674825039.git.geert+renesas@glider.be
2023-03-06 10:51:13 +01:00
Hai Pham
a145c9a867 pinctrl: renesas: r8a779a0: Remove incorrect AVB[01] pinmux configuration
AVB[01]_{MAGIC,MDC,MDIO,TXCREFCLK} are registered as both
PINMUX_SINGLE(fn) and PINMUX_IPSR_GPSR(fn) in the pinmux_data array.

The latter are correct, hence remove the former.
Without this fix, the Ethernet PHY is not operational on the MDIO bus.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Fixes: 741a7370fc ("pinctrl: renesas: Initial R8A779A0 (V3U) PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6fd217b71e83ba9a8157513ed671a1fa218b23b6.1674824958.git.geert+renesas@glider.be
2023-03-06 10:51:12 +01:00
Linus Torvalds
11c7052998 ARM: SoC drivers for 6.3
As usual, there are lots of minor driver changes across SoC platforms
 from  NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung.
 These usually add support for additional chip variations in existing
 drivers, but also add features or bugfixes.
 
 The SCMI firmware subsystem gains a unified raw userspace interface
 through debugfs, which can be used for validation purposes.
 
 Newly added drivers include:
 
  - New power management drivers for StarFive JH7110, Allwinner D1 and
    Renesas RZ/V2M
 
  - A driver for Qualcomm battery and power supply status
 
  - A SoC device driver for identifying Nuvoton WPCM450 chips
 
  - A regulator coupler driver for Mediatek MT81xxv
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Merge tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "As usual, there are lots of minor driver changes across SoC platforms
  from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung.
  These usually add support for additional chip variations in existing
  drivers, but also add features or bugfixes.

  The SCMI firmware subsystem gains a unified raw userspace interface
  through debugfs, which can be used for validation purposes.

  Newly added drivers include:

   - New power management drivers for StarFive JH7110, Allwinner D1 and
     Renesas RZ/V2M

   - A driver for Qualcomm battery and power supply status

   - A SoC device driver for identifying Nuvoton WPCM450 chips

   - A regulator coupler driver for Mediatek MT81xxv"

* tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
  power: supply: Introduce Qualcomm PMIC GLINK power supply
  soc: apple: rtkit: Do not copy the reg state structure to the stack
  soc: sunxi: SUN20I_PPU should depend on PM
  memory: renesas-rpc-if: Remove redundant division of dummy
  soc: qcom: socinfo: Add IDs for IPQ5332 and its variant
  dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant
  dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1
  firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/
  MAINTAINERS: Update qcom CPR maintainer entry
  dt-bindings: firmware: document Qualcomm SM8550 SCM
  dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible
  soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants
  dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants
  soc: qcom: socinfo: Add support for new field in revision 17
  soc: qcom: smd-rpm: Add IPQ9574 compatible
  soc: qcom: pmic_glink: remove redundant calculation of svid
  soc: qcom: stats: Populate all subsystem debugfs files
  dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes
  soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies
  soc: qcom: pmic_glink: Introduce altmode support
  ...
2023-02-27 10:04:49 -08:00
Linus Torvalds
d5176cdbf6 Core changes:
- Add PINCTRL_PINFUNCTION() macro and use it in several
   drivers.
 
 New drivers:
 
 - New driver for the StarFive JH7110 SoC "sys" and "aon"
   (always-on) pin controllers. (RISC-V.)
 
 - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin
   controller.
 
 - New subdrivers for the Qualcomm SM8550 SoC and LPASS
   pin controllers.
 
 - New subdriver for the Qualcomm SA8775P SoC pin controller.
 
 - New subdriver for the Qualcomm IPQ5332 SoC pin controller.
 
 - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC
   pin control.
 
 - New subdriver for the Mediatek MT7981 SoC pin controller.
 
 Improvements:
 
 - Several cleanups and refactorings to the Intel drivers.
 
 - Add 4KOhm bias support to the Intel driver.
 
 - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver.
 
 - Support general purpose clocks in the Qualcomm MSM8226 SoC.
 
 - Several conversions to use the new I2C .probe_new() call.
 
 - Massive clean-up of the Qualcomm Device Tree YAML schemas.
 
 - Add VIN[45] pins, groups and functions to the Renesas
   r8a77950 SoC driver.
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Merge tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Nothing special, notably a lot of new Qualcomm hardware is supported,
  a RISC-V reference SoC and then some cleanups both in code and device
  tree bindings.

  Core changes:

   - Add PINCTRL_PINFUNCTION() macro and use it in several drivers

  New drivers:

   - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on)
     pin controllers. (RISC-V.)

   - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller

   - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin
     controllers

   - New subdriver for the Qualcomm SA8775P SoC pin controller

   - New subdriver for the Qualcomm IPQ5332 SoC pin controller

   - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin
     control

   - New subdriver for the Mediatek MT7981 SoC pin controller

  Improvements:

   - Several cleanups and refactorings to the Intel drivers

   - Add 4KOhm bias support to the Intel driver

   - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver

   - Support general purpose clocks in the Qualcomm MSM8226 SoC

   - Several conversions to use the new I2C .probe_new() call

   - Massive clean-up of the Qualcomm Device Tree YAML schemas

   - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC
     driver"

* tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits)
  pinctrl: qcom: Add support for i2c specific pull feature
  pinctrl: starfive: Add StarFive JH7110 aon controller driver
  pinctrl: starfive: Add StarFive JH7110 sys controller driver
  dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl
  dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl
  pinctrl: add mt7981 pinctrl driver
  dt-bindings: pinctrl: add bindings for MT7981 SoC
  dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated
  pinctrl: qcom: Introduce IPQ5332 TLMM driver
  dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl
  dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern
  pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS
  dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS
  pinctrl: at91: use devm_kasprintf() to avoid potential leaks
  dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
  dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs
  dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern
  dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern
  dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example
  dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example
  ...
2023-02-22 11:05:56 -08:00
Linus Torvalds
17bbc46fc9 gpio updates for v6.3
Core GPIOLIB:
 - drop several OF interfaces after moving a significant part of the code to
   using software nodes
 - remove more interfaces referring to the global GPIO numberspace that we're
   getting rid of
 - improvements in the gpio-regmap library
 - add helper for GPIO device reference counting
 - remove unused APIs
 - minor tweaks like sorting headers alphabetically
 
 Extended support in existing drivers:
 - add support for Tegra 234 PMC to gpio-tegra186
 
 Driver improvements:
 - migrate the 104-dio/idi family of drivers to using the regmap-irq API
 - migrate gpio-i8255 and gpio-mm to the GPIO regmap API
 - clean-ups in gpio-pca953x
 - remove duplicate assignments of of_gpio_n_cells in gpio-davinci, gpio-ge,
   gpio-xilinx, gpio-zevio and gpio-wcd934x
 - improvements to gpio-pcf857x: implement get/set_multiple callbacks, use
   generic device properties instead of OF + minor tweaks
 - fix OF-related header includes and Kconfig dependencies in gpio-zevio
 - dynamically allocate the GPIO base in gpio-omap
 - use a dedicated printf specifier for printing fwnode info in gpio-sim
 - use dev_name() for the GPIO chip label in gpio-vf610
 - other minor tweaks and fixes
 
 Documentation:
 - remove mentions of legacy API from comments in various places
 - convert the DT binding documents to YAML schema for Fujitsu MB86S7x, Unisoc
   GPIO and Unisoc EIC
 - document the Unisoc UMS512 controller in DT bindings
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Merge tag 'gpio-updates-for-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "A rather small update, there are no new drivers, just improvements and
  refactoring in existing ones.

  Thanks to migrating of several drivers to using generalized APIs and
  dropping of OF interfaces in favor of using software nodes we're
  actually removing more code than we're adding.

  Core GPIOLIB:
   - drop several OF interfaces after moving a significant part of the
     code to using software nodes
   - remove more interfaces referring to the global GPIO numberspace
     that we're getting rid of
   - improvements in the gpio-regmap library
   - add helper for GPIO device reference counting
   - remove unused APIs
   - minor tweaks like sorting headers alphabetically

  Extended support in existing drivers:
   - add support for Tegra 234 PMC to gpio-tegra186

  Driver improvements:
   - migrate the 104-dio/idi family of drivers to using the regmap-irq
     API
   - migrate gpio-i8255 and gpio-mm to the GPIO regmap API
   - clean-ups in gpio-pca953x
   - remove duplicate assignments of of_gpio_n_cells in gpio-davinci,
     gpio-ge, gpio-xilinx, gpio-zevio and gpio-wcd934x
   - improvements to gpio-pcf857x: implement get/set_multiple callbacks,
     use generic device properties instead of OF + minor tweaks
   - fix OF-related header includes and Kconfig dependencies in
     gpio-zevio
   - dynamically allocate the GPIO base in gpio-omap
   - use a dedicated printf specifier for printing fwnode info in
     gpio-sim
   - use dev_name() for the GPIO chip label in gpio-vf610
   - other minor tweaks and fixes

  Documentation:
   - remove mentions of legacy API from comments in various places
   - convert the DT binding documents to YAML schema for Fujitsu
     MB86S7x, Unisoc GPIO and Unisoc EIC
   - document the Unisoc UMS512 controller in DT bindings"

* tag 'gpio-updates-for-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (54 commits)
  gpio: sim: Use %pfwP specifier instead of calling fwnode API directly
  gpio: tegra186: remove unneeded loop in tegra186_gpio_init_route_mapping()
  gpiolib: of: Move enum of_gpio_flags to its only user
  gpio: mvebu: Use IS_REACHABLE instead of IS_ENABLED for CONFIG_PWM
  gpio: zevio: Add missing header
  gpio: Get rid of gpio_to_chip()
  gpio: pcf857x: Drop unneeded explicit casting
  gpio: pcf857x: Make use of device properties
  gpio: pcf857x: Get rid of legacy platform data
  gpio: rockchip: Do not mention legacy API in the code
  gpio: wcd934x: Remove duplicate assignment of of_gpio_n_cells
  gpio: zevio: Use proper headers and drop OF_GPIO dependency
  gpio: zevio: Remove duplicate assignment of of_gpio_n_cells
  gpio: xilinx: Remove duplicate assignment of of_gpio_n_cells
  dt-bindings: gpio: Add compatible string for Unisoc UMS512
  dt-bindings: gpio: Convert Unisoc EIC controller binding to yaml
  dt-bindings: gpio: Convert Unisoc GPIO controller binding to yaml
  gpio: ge: Remove duplicate assignment of of_gpio_n_cells
  gpio: davinci: Remove duplicate assignment of of_gpio_n_cells
  gpio: omap: use dynamic allocation of base
  ...
2023-02-22 11:01:17 -08:00
Linus Torvalds
ff0c7e1862 ARM: unused boardfile removal for 6.3
This is a follow-up to the deprecation of most of the old-style board
 files that was merged in linux-6.0, removing them for good.
 
 This branch is almost exclusively dead code removal based on those
 annotations. Some device driver removals went through separate subsystem
 trees, but the majority is in the same branch, in order to better handle
 dependencies between the patches and avoid breaking bisection.
 
 Unfortunately that leads to merge conflicts against other changes in the
 subsystem trees, but they should all be trivial to resolve by removing
 the files.
 
 See commit 7d0d3fa733 ("Merge tag 'arm-boardfiles-6.0' of
 git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc") for the
 description of which machines were marked unused and are now removed. The
 only removals that got postponed are Terastation WXL (mv78xx0) and
 Jornada720 (StrongARM1100), which turned out to still have potential
 users.
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Merge tag 'arm-boardfile-remove-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC boardfile updates from Arnd Bergmann
 "Unused boardfile removal for 6.3

  This is a follow-up to the deprecation of most of the old-style board
  files that was merged in linux-6.0, removing them for good.

  This branch is almost exclusively dead code removal based on those
  annotations. Some device driver removals went through separate
  subsystem trees, but the majority is in the same branch, in order to
  better handle dependencies between the patches and avoid breaking
  bisection.

  Unfortunately that leads to merge conflicts against other changes in
  the subsystem trees, but they should all be trivial to resolve by
  removing the files.

  See commit 7d0d3fa733 ("Merge tag 'arm-boardfiles-6.0' of
  git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc") for the
  description of which machines were marked unused and are now removed.

  The only removals that got postponed are Terastation WXL (mv78xx0) and
  Jornada720 (StrongARM1100), which turned out to still have potential
  users"

* tag 'arm-boardfile-remove-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (91 commits)
  mmc: omap: drop TPS65010 dependency
  ARM: pxa: restore mfp-pxa320.h
  usb: ohci-omap: avoid unused-variable warning
  ARM: debug: remove references in DEBUG_UART_8250_SHIFT to removed configs
  ARM: s3c: remove obsolete s3c-cpu-freq header
  MAINTAINERS: adjust SAMSUNG SOC CLOCK DRIVERS after s3c24xx support removal
  MAINTAINERS: update file entries after arm multi-platform rework and mach-pxa removal
  ARM: remove CONFIG_UNUSED_BOARD_FILES
  mfd: remove htc-pasic3 driver
  w1: remove ds1wm driver
  usb: remove ohci-tmio driver
  fbdev: remove w100fb driver
  fbdev: remove tmiofb driver
  mmc: remove tmio_mmc driver
  mfd: remove ucb1400 support
  mfd: remove toshiba tmio drivers
  rtc: remove v3020 driver
  power: remove pda_power supply driver
  ASoC: pxa: remove unused board support
  pcmcia: remove unused pxa/sa1100 drivers
  ...
2023-02-20 15:28:57 -08:00
Abel Vesa
099f37a539 pinctrl: qcom: Add support for i2c specific pull feature
Add support for the new i2c_pull property introduced for SM8550 setting
a I2C specific pull mode on I2C able pins. Add the bit to the SM8550
specific driver while at it.

Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230209074510.4153294-1-abel.vesa@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-10 23:47:07 +01:00
Jianlong Huang
b1170c4214 pinctrl: starfive: Add StarFive JH7110 aon controller driver
Add pinctrl driver for StarFive JH7110 SoC aon pinctrl controller.

Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230209143702.44408-5-hal.feng@starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-10 23:44:07 +01:00
Jianlong Huang
447976ab62 pinctrl: starfive: Add StarFive JH7110 sys controller driver
Add pinctrl driver for StarFive JH7110 SoC sys pinctrl controller.

Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230209143702.44408-4-hal.feng@starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-10 23:44:07 +01:00
Elliot Berman
3bf90eca76 firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/
Move include/linux/qcom_scm.h to include/linux/firmware/qcom/qcom_scm.h.
This removes 1 of a few remaining Qualcomm-specific headers into a more
approciate subdirectory under include/.

Suggested-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Elliot Berman <quic_eberman@quicinc.com>
Reviewed-by: Guru Das Srinagesh <quic_gurus@quicinc.com>
Acked-by: Mukesh Ojha <quic_mojha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230203210956.3580811-1-quic_eberman@quicinc.com
2023-02-08 19:15:16 -08:00
Daniel Golle
6c83b2d94f pinctrl: add mt7981 pinctrl driver
Add pinctrl driver for the MediaTek MT7981 SoC, based on the driver
which can also be found the SDK.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/ef5112946d16cacc67e65e439ba7b52a9950c1bb.1674693008.git.daniel@makrotopia.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-07 15:44:51 +01:00
Kathiravan T
75dc7e600e pinctrl: qcom: Introduce IPQ5332 TLMM driver
The IPQ5332 SoC comes with a TLMM block, like all other Qualcomm
platforms, so add a driver for it.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230206071217.29313-3-quic_kathirav@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-07 15:44:39 +01:00
Andy Shevchenko
a8520be3ff pinctrl: intel: Restore the pins that used to be in Direct IRQ mode
If the firmware mangled the register contents too much,
check the saved value for the Direct IRQ mode. If it
matches, we will restore the pin state.

Reported-by: Jim Minter <jimminter@microsoft.com>
Fixes: 6989ea4881 ("pinctrl: intel: Save and restore pins in "direct IRQ" mode")
Tested-by: Jim Minter <jimminter@microsoft.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230206141558.20916-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-07 10:13:51 +01:00
Krzysztof Kozlowski
5a6ca1f240 pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS
Add druver for pin controller in Low Power Audio SubSystem (LPASS).  The
driver is similar to SM8450 LPASS pin controller, with differences in
few pin groups (qua_mi2s -> i2s0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230203174645.597053-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-06 12:15:51 +01:00
Krzysztof Kozlowski
5921b250f4 pinctrl: qcom: sm8450-lpass-lpi: correct swr_rx_data group
According to hardware programming guide, the swr_rx_data pin group has
only two pins (GPIO5 and GPIO6).  This is also visible in "struct
sm8450_groups" in the driver - GPIO15 does not have swr_rx_data
function.

Fixes: ec1652fc4d ("pinctrl: qcom: Add sm8450 lpass lpi pinctrl driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230203165054.390762-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-06 12:14:23 +01:00
Claudiu Beznea
1c4e5c470a pinctrl: at91: use devm_kasprintf() to avoid potential leaks
Use devm_kasprintf() instead of kasprintf() to avoid any potential
leaks. At the moment drivers have no remove functionality thus
there is no need for fixes tag.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230203132714.1931596-1-claudiu.beznea@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-06 12:11:51 +01:00
Yadu MG
4b6b185599 pinctrl: qcom: add the tlmm driver sa8775p platforms
Add support for Lemans TLMM configuration and control via the pinctrl
framework.

Signed-off-by: Yadu MG <quic_ymg@quicinc.com>
Signed-off-by: Prasad Sodagudi <quic_psodagud@quicinc.com>
[Bartosz: made the driver ready for upstream]
Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230201150011.200613-3-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-01 23:44:49 +01:00
Joel Stanley
606d4ef492 pinctrl: aspeed: Revert "Force to disable the function's signal"
This reverts commit cf517fef60.

The commit cf517fef60 ("pinctrl: aspeed: Force to disable the
function's signal") exposed a problem with fetching the regmap for
reading the GFX register.

The Romulus machine the device tree contains a gpio hog for GPIO S7.
With the patch applied:

  Muxing pin 151 for GPIO
  Disabling signal VPOB9 for VPO
  aspeed-g5-pinctrl 1e6e2080.pinctrl: Failed to acquire regmap for IP block 1
  aspeed-g5-pinctrl 1e6e2080.pinctrl: request() failed for pin 151

The code path is aspeed-gpio -> pinmux-g5 -> regmap -> clk, and the
of_clock code returns an error as it doesn't have a valid struct clk_hw
pointer. The regmap call happens because pinmux wants to check the GFX
node (IP block 1) to query bits there.

For reference, before the offending patch:

  Muxing pin 151 for GPIO
  Disabling signal VPOB9 for VPO
  Want SCU8C[0x00000080]=0x1, got 0x0 from 0x00000000
  Disabling signal VPOB9 for VPOOFF1
  Want SCU8C[0x00000080]=0x1, got 0x0 from 0x00000000
  Disabling signal VPOB9 for VPOOFF2
  Want SCU8C[0x00000080]=0x1, got 0x0 from 0x00000000
  Enabling signal GPIOS7 for GPIOS7
  Muxed pin 151 as GPIOS7
  gpio-943 (seq_cont): hogged as output/low

We can't skip the clock check to allow pinmux to proceed, because the
write to disable VPOB9 will try to set a bit in the GFX register space
which will not stick when the IP is in reset. However, we do not want to
enable the IP just so pinmux can do a disable-enable dance for the pin.

For now, revert the offending patch while a correct solution is found.

Fixes: cf517fef60 ("pinctrl: aspeed: Force to disable the function's signal")
Link: https://github.com/openbmc/linux/issues/218
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230130220845.917985-1-joel@jms.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-30 23:51:03 +01:00
Linus Walleij
5ab4909d0b intel-pinctrl for v6.3-1
* Add ~4kOhm bias support to Intel pin control drivers
 * Convert Intel pin control drivers to use INTEL_COMMUNITY_*()
 * Add struct pinfunction and use it in Intel pin control drivers
 * Make pin control documentation up to date
 * Miscellaneous cleanups
 
 The following is an automated git shortlog grouped by driver:
 
 pinctrl:
  - Proofreading and updating the documentation accordingly
  - Proofreading and updating the documentation (part 2)
 
 alderlake:
  -  Replace ADL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 baytrail:
  -  Convert to use new memeber in struct intel_function
 
 broxton:
  -  Replace BXT_COMMUNITY() by INTEL_COMMUNITY_SIZE()
 
 cannonlake:
  -  Replace CNL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 cedarfork:
  -  Replace CDF_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 cherryview:
  -  Convert to use new memeber in struct intel_function
 
 denverton:
  -  Replace DNV_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 elkhartlake:
  -  Replace EHL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 emmitsburg:
  -  Replace EBG_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 geminilake:
  -  Replace GLK_COMMUNITY() by INTEL_COMMUNITY_SIZE()
 
 icelake:
  -  Replace ICL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 intel:
  -  Get rid of unused members in struct intel_function
  -  Make use of struct pinfunction and PINCTRL_PINFUNCTION()
  -  Define maximum pad number in the group
  -  Use same order of bit fields for PADCFG2
  -  Add ~4k bias support
  -  Add definitions to all possible biases
  -  Deduplicate some code in intel_config_set_pull()
  -  Add default case to intel_config_set_pull()
  -  Convert to generic_handle_domain_irq()
  -  Always use gpp_num_padown_regs in the main driver
  -  Introduce INTEL_COMMUNITY_*() to unify community macros
 
 Introduce struct pinfunction and PINCTRL_PINFUNCTION() macro:
  - Introduce struct pinfunction and PINCTRL_PINFUNCTION() macro
 
 jasperlake:
  -  Replace JSL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 lakefield:
  -  Replace LKF_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 lewisburg:
  -  Replace LBG_COMMUNITY() by INTEL_COMMUNITY_SIZE()
 
 lynxpoint:
  -  Convert to use new memeber in struct intel_function
 
 merrifield:
  -  Convert to use new memeber in struct intel_function
 
 meteorlake:
  -  Replace MTL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
 
 moorefield:
  -  Convert to use new memeber in struct intel_function
 
 sunrisepoint:
  -  Replace SPT_COMMUNITY() by INTEL_COMMUNITY_*()
 
 tigerlake:
  -  Replace TGL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
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Merge tag 'intel-pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v6.3-1

* Add ~4kOhm bias support to Intel pin control drivers
* Convert Intel pin control drivers to use INTEL_COMMUNITY_*()
* Add struct pinfunction and use it in Intel pin control drivers
* Make pin control documentation up to date
* Miscellaneous cleanups

The following is an automated git shortlog grouped by driver:

pinctrl:
 - Proofreading and updating the documentation accordingly
 - Proofreading and updating the documentation (part 2)

alderlake:
 -  Replace ADL_COMMUNITY() by INTEL_COMMUNITY_GPPS()

baytrail:
 -  Convert to use new memeber in struct intel_function

broxton:
 -  Replace BXT_COMMUNITY() by INTEL_COMMUNITY_SIZE()

cannonlake:
 -  Replace CNL_COMMUNITY() by INTEL_COMMUNITY_GPPS()

cedarfork:
 -  Replace CDF_COMMUNITY() by INTEL_COMMUNITY_GPPS()

cherryview:
 -  Convert to use new memeber in struct intel_function

denverton:
 -  Replace DNV_COMMUNITY() by INTEL_COMMUNITY_GPPS()

elkhartlake:
 -  Replace EHL_COMMUNITY() by INTEL_COMMUNITY_GPPS()

emmitsburg:
 -  Replace EBG_COMMUNITY() by INTEL_COMMUNITY_GPPS()

geminilake:
 -  Replace GLK_COMMUNITY() by INTEL_COMMUNITY_SIZE()

icelake:
 -  Replace ICL_COMMUNITY() by INTEL_COMMUNITY_GPPS()

intel:
 -  Get rid of unused members in struct intel_function
 -  Make use of struct pinfunction and PINCTRL_PINFUNCTION()
 -  Define maximum pad number in the group
 -  Use same order of bit fields for PADCFG2
 -  Add ~4k bias support
 -  Add definitions to all possible biases
 -  Deduplicate some code in intel_config_set_pull()
 -  Add default case to intel_config_set_pull()
 -  Convert to generic_handle_domain_irq()
 -  Always use gpp_num_padown_regs in the main driver
 -  Introduce INTEL_COMMUNITY_*() to unify community macros

Introduce struct pinfunction and PINCTRL_PINFUNCTION() macro:
 - Introduce struct pinfunction and PINCTRL_PINFUNCTION() macro

jasperlake:
 -  Replace JSL_COMMUNITY() by INTEL_COMMUNITY_GPPS()

lakefield:
 -  Replace LKF_COMMUNITY() by INTEL_COMMUNITY_GPPS()

lewisburg:
 -  Replace LBG_COMMUNITY() by INTEL_COMMUNITY_SIZE()

lynxpoint:
 -  Convert to use new memeber in struct intel_function

merrifield:
 -  Convert to use new memeber in struct intel_function

meteorlake:
 -  Replace MTL_COMMUNITY() by INTEL_COMMUNITY_GPPS()

moorefield:
 -  Convert to use new memeber in struct intel_function

sunrisepoint:
 -  Replace SPT_COMMUNITY() by INTEL_COMMUNITY_*()

tigerlake:
 -  Replace TGL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
2023-01-30 23:46:29 +01:00
Linus Walleij
19a2c394a2 pinctrl: renesas: Updates for v6.3
- Add pin groups for Video-In channels 4 and 5 on R-Car H3 ES1.x,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.3

  - Add pin groups for Video-In channels 4 and 5 on R-Car H3 ES1.x,
  - Miscellaneous fixes and improvements.
2023-01-30 23:12:12 +01:00
Linus Walleij
e3863fa123 gpio: Get rid of gpio_to_chip()
The gpio_to_chip() function refers to the global GPIO numberspace
which is a problem we want to get rid of. Get this function out
of the header and open code it into gpiolib with appropriate FIXME
notices so no new users appear in the kernel.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-30 15:55:30 +01:00
Rob Herring
91da7032d8 pinctrl: at91: fix deferred probing support
AT91 pinctrl deferred probing support is broken if the GPIO devices
haven't probed first and set gpio_banks to non-zero. The later condition
that only some GPIO devices haven't probed can't actually happen as
either all the GPIO devices have probed first or none of them have. Plus
the pinctrl driver has already returned -EINVAL, so it's not on the
deferred list to retry probing.

Fix this by consolidating the checking that all GPIO devices are probed.

Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com> # on sama5d3 xplained
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20180712192222.32481-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-27 13:48:07 +01:00
Maxim Korotkov
d2d73e6d48 pinctrl: single: fix potential NULL dereference
Added checking of pointer "function" in pcs_set_mux().
pinmux_generic_get_function() can return NULL and the pointer
"function" was dereferenced without checking against NULL.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Fixes: 571aec4df5 ("pinctrl: single: Use generic pinmux helpers for managing functions")
Signed-off-by: Maxim Korotkov <korotkov.maxim.s@gmail.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20221118104332.943-1-korotkov.maxim.s@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-27 13:43:55 +01:00
Mario Limonciello
c6e0679b83 pinctrl: amd: Fix debug output for debounce time
If one GPIO has debounce enabled but future GPIOs in the list don't
have debounce the time never gets reset and shows wrong value.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230121134812.16637-2-mario.limonciello@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-27 13:40:29 +01:00
Joel Stanley
287a344a11 pinctrl: aspeed: Fix confusing types in return value
The function signature is int, but we return a bool. Instead return a
negative errno as the kerneldoc suggests.

Fixes: 4d3d0e4272 ("pinctrl: Add core support for Aspeed SoCs")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20230119231856.52014-1-joel@jms.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-27 13:32:44 +01:00
Linus Walleij
a08cbeb1d1 pinctrl: at91: Tag suspend/resume __maybe_unused
Tag the suspend/resume callbacks as __maybe_unused to silence
complaints from the build robots.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-27 13:28:26 +01:00
Geert Uytterhoeven
698485cd87 pinctrl: renesas: r8a77950: Add VIN[45] pins, groups, and functions
Add pins, groups, and functions for channels 4 and 5 of the Video Input
Module (VIN) on the Renesas R-Car H3 ES1.x (R8A77950) SoC, based on
the version for the R-Car H3 ES2.0+ (R8A77951) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/92c9b3b535d27ea7fcc0aa73d298783d710c214a.1673425207.git.geert+renesas@glider.be
2023-01-26 16:45:49 +01:00
Lad Prabhakar
2d4a628cad pinctrl: renesas: rzg2l: Add BUILD_BUG_ON() checks
Add BUILD_BUG_ON() checks to avoid overflows for GPIO configs for each
supported SoC.

While at it, for readability set n_port_pins based on the GPIO pin configs
and not on GPIO names for r9a07g044_data as done for r9a07g043_data.

Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230102221815.273719-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-01-26 16:45:49 +01:00
Lad Prabhakar
00dfe29887 pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts
On the RZ/G2UL SoC we have less number of pins compared to RZ/G2L and also
the pin configs are completely different. This patch makes sure we use the
appropriate pin configs for each SoC (which is passed as part of the OF
data) while configuring the GPIO pin as interrupts instead of using
rzg2l_gpio_configs[] for all the SoCs.

Fixes: bfc69bdbaa ("pinctrl: renesas: rzg2l: Add RZ/G2UL support")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230102221815.273719-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-01-26 16:45:49 +01:00
Geert Uytterhoeven
34cf9a859f pinctrl: renesas: r8a779g0: Fix alignment in GPSR[678]_* macros
The alignment of the second column in the definitions of the GPSR[678]_*
macros does not match the alignment used in other definitions.
Fix this to improve uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9424a0e7f6d66a94d333df9fdc5cdf3b7defb8f5.1669036423.git.geert+renesas@glider.be
2023-01-26 16:45:36 +01:00
Guodong Liu
5754a1c98b pinctrl: mediatek: Fix the drive register definition of some Pins
The drive adjustment register definition of gpio13 and gpio81 is wrong:
"the start address for the range" of gpio18 is corrected to 0x000,
"the start bit for the first register within the range" of gpio81 is
corrected to 24.

Fixes: 6cf5e9ef36 ("pinctrl: add pinctrl driver on mt8195")
Signed-off-by: Guodong Liu <Guodong.Liu@mediatek.com>
Link: https://lore.kernel.org/r/20230118062116.26315-1-Guodong.Liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-26 14:41:51 +01:00
Guodong Liu
2e34f82ba2 pinctrl: mediatek: Initialize variable *buf to zero
Coverity spotted that *buf is not initialized to zero in
mtk_pctrl_dbg_show. Using uninitialized variable *buf as argument to %s
when calling seq_printf. Fix this coverity by initializing *buf as zero.

Fixes: 184d8e13f9 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.")
Signed-off-by: Guodong Liu <Guodong.Liu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230118062036.26258-3-Guodong.Liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-26 14:39:35 +01:00
Guodong Liu
a298c70a10 pinctrl: mediatek: Initialize variable pullen and pullup to zero
Coverity spotted that pullen and pullup is not initialized to zero in
mtk_pctrl_show_one_pin. The uninitialized variable pullen is used in
assignment statement "rsel = pullen;" in mtk_pctrl_show_one_pin, and
Uninitialized variable pullup is used when calling scnprintf. Fix this
coverity by initializing pullen and pullup as zero.

Fixes: 184d8e13f9 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.")
Signed-off-by: Guodong Liu <Guodong.Liu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230118062036.26258-2-Guodong.Liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-26 14:39:35 +01:00
Andy Shevchenko
9bd73ce087 pinctrl: qcom: Unify accessing to device fwnode
The device fwnode can be get via dev_fwnode() getter.
Use it where it makes sense.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230113220703.45686-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-26 13:40:55 +01:00
Andy Shevchenko
bc96299707 pinctrl: bcm2835: Switch to use ->add_pin_ranges()
Yeah, while the ->add_pin_ranges() shouldn't be used by DT drivers,
this one requires it to support quite old firmware descriptions that
do not have gpio-ranges property.

The change allows to clean up GPIO library from OF specifics.
There is no functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20230113215352.44272-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-26 13:38:55 +01:00
Andy Shevchenko
2d578dd278 pinctrl: bcm2835: Remove of_node_put() in bcm2835_of_gpio_ranges_fallback()
Remove wrong of_node_put() in bcm2835_of_gpio_ranges_fallback(),
there is no counterpart of_node_get() for it.

Fixes: d2b67744fd ("pinctrl: bcm2835: implement hook for missing gpio-ranges")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20230113215352.44272-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-26 13:38:55 +01:00
Jonas Karlman
431d153146 pinctrl: rockchip: fix mux route data for rk3568
IO mux selection is configured in PMU_GRF_SOC_CON4 and GRF_IOFUNC_SEL0-5
regs on RK3568. pwm0-2 is configured in PMU_GRF reg and the rest is
configured in GRF_IOFUNC regs according to TRM [1].

Update mux route data to reflect this and use proper detection pin for
UART1 IO mux M1.

This fixes HDMITX IO mux M1 selection and makes it possible to enable
HDMI CEC on my Radxa ROCK 3 Model A v1.31 board.

[1] http://opensource.rock-chips.com/images/2/26/Rockchip_RK3568_TRM_Part1_V1.3-20220930P.PDF

Fixes: c0dadc0e47 ("pinctrl: rockchip: add support for rk3568")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20230110084636.1141740-1-jonas@kwiboo.se
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-17 14:16:45 +01:00
ye xingchen
6eea5a80d2 pinctrl: nomadik: remove duplicate included header files
linux/seq_file.h is included more than once.

Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn>
Link: https://lore.kernel.org/r/202301161545238948580@zte.com.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 15:22:32 +01:00
Andy Shevchenko
083b0230e0 pinctrl: digicolor: Use proper headers and drop OF dependency
The driver doesn't depend on the OF to be complied. Hence
the proper header to use is mod_devicetable.h. Replace of*.h with
the above mentioned and drop redundant dependency.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/20230113143640.24302-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 15:14:03 +01:00
Andy Shevchenko
aeb3c200db pinctrl: digicolor: Remove duplicate assignment of of_gpio_n_cells
The of_gpio_n_cells default is 2 when ->of_xlate() callback is
not defined. No need to assign it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/20230113143640.24302-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 15:14:03 +01:00
Andy Shevchenko
ef4290e6bd pinctrl: sunplus: sppctl: Remove duplicate assignment of of_gpio_n_cells
The of_gpio_n_cells default is 2 when ->of_xlate() callback is
not defined. No need to assign it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230112185122.45216-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 15:03:08 +01:00
Andy Shevchenko
a3fc976a2d pinctrl: qcom: lpass-lpi: Remove duplicate assignment of of_gpio_n_cells
The of_gpio_n_cells default is 2 when ->of_xlate() callback is
not defined. No need to assign it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230112184923.80442-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 15:02:16 +01:00
Andy Shevchenko
0da58037ae pinctrl: mediatek: Remove duplicate assignment of of_gpio_n_cells
The of_gpio_n_cells default is 2 when ->of_xlate() callback is
not defined. No need to assign it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230112184340.79606-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 15:01:28 +01:00
Andy Shevchenko
03a13546c7 pinctrl: samsung: Do not mention legacy API in the code
Replace mentioning of legacy API by the latest one.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230112134849.59534-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 14:59:07 +01:00
Arınç ÜNAL
525792d1d2 pinctrl: ralink: rename variables which point out the pin group
These variables define a list of functions which can be muxed to the pin
group which the name of the pin group was originally intended to be pointed
out on the name of the said variables.

Therefore, rename "func" to "grp" across all subdrivers where this applies.

Fixes: 18653d4bd8 ("pinctrl: ralink: rename variable names for functions on MT7620 and MT7621")
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20221231160849.40544-2-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 14:56:46 +01:00
Jonas Karlman
31b62a98de pinctrl: rockchip: fix reading pull type on rk3568
When reading pinconf-pins from debugfs it fails to get the configured pull
type on RK3568, "unsupported pinctrl type" error messages is also reported.

Fix this by adding support for RK3568 in rockchip_get_pull, including a
reverse of the pull-up value swap applied in rockchip_set_pull so that
pull-up is correctly reported in pinconf-pins.
Also update the workaround comment to reflect affected pins, GPIO0_D3-D6.

Fixes: c0dadc0e47 ("pinctrl: rockchip: add support for rk3568")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jianqun Xu <jay.xu@rock-chips.com>
Link: https://lore.kernel.org/r/20230110172955.1258840-1-jonas@kwiboo.se
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 13:42:28 +01:00
Uwe Kleine-König
542c893caa pinctrl: sx150x: Convert to i2c's .probe_new()
.probe_new() doesn't get the i2c_device_id * parameter, so determine
that explicitly in the probe function.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20221118224540.619276-512-uwe@kleine-koenig.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16 13:40:32 +01:00
Arnd Bergmann
20ab62c479 pinctrl: remove s3c24xx driver
The s3c24xx platform was removed, so this driver has no
remaining users.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-16 09:26:06 +01:00
Arnd Bergmann
1ea35b3557 ARM: s3c: remove s3c24xx specific hacks
A number of device drivers reference CONFIG_ARM_S3C24XX_CPUFREQ or
similar symbols that are no longer available with the platform gone,
though the drivers themselves are still used on newer platforms,
so remove these hacks.

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-16 09:26:05 +01:00
Andy Shevchenko
091e81b867 pinctrl: pinmux: Drop duplicate error message in pinmux_select()
pinctrl_get_group_selector() prints an error message when group
is not found in the list. No need to repeat this in the caller.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230109132719.86009-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-10 09:03:27 +01:00
Uwe Kleine-König
8bb5811129 pinctrl: mcp23s08: Convert to i2c's .probe_new()
.probe_new() doesn't get the i2c_device_id * parameter, so determine
that explicitly in the probe function.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20221118224540.619276-511-uwe@kleine-koenig.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-10 09:00:19 +01:00
Luca Weiss
814ee08d9e pinctrl: qcom: msm8226: Add General Purpose clocks
Add support for the general purpose clocks that are found on MSM8226.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Co-developed-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Link: https://lore.kernel.org/r/20230106114403.275865-3-matti.lehtimaki@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-10 08:56:41 +01:00
Neil Armstrong
e8c39b3eba pinctrl: qcom: spmi-gpio: add support for pm8550 & pmr735d gpio control
Add support for the pm8550, pm8550b, pm8550ve, pm8550vs, pmk8550 & pmr735d
gpio controllers providing GPIO control over SPMI.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-spmi-v2-3-b839bf2d558a@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09 15:17:51 +01:00
Miaoqian Lin
c818ae563b pinctrl: rockchip: Fix refcount leak in rockchip_pinctrl_parse_groups
of_find_node_by_phandle() returns a node pointer with refcount incremented,
We should use of_node_put() on it when not needed anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: d3e5116119 ("pinctrl: add pinctrl driver for Rockchip SoCs")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20230102112845.3982407-1-linmq006@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09 15:14:10 +01:00
Miaoqian Lin
dcef18c8ac pinctrl: stm32: Fix refcount leak in stm32_pctrl_get_irq_domain
of_irq_find_parent() returns a node pointer with refcount incremented,
We should use of_node_put() on it when not needed anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: d86f4d71e4 ("pinctrl: stm32: check irq controller availability at probe")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20230102082503.3944927-1-linmq006@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09 15:13:15 +01:00
Adam Skladowski
a7cc0e2685 pinctrl: qcom: pinctrl-msm8976: Correct function names for wcss pins
Adjust names of function for wcss pins, also fix third gpio in bt group.

Fixes: bcd11493f0 ("pinctrl: qcom: Add a pinctrl driver for MSM8976 and 8956")
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20221231164250.74550-1-a39.skl@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09 14:40:22 +01:00
Abel Vesa
fcd26bf51c pinctrl: qcom: Add SM8550 pinctrl driver
Add pinctrl driver for TLMM block found in SM8550 SoC.

Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20221230203637.2539900-3-abel.vesa@linaro.org
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-09 14:20:52 +01:00
Andy Shevchenko
937e7a3906 pinctrl: nomadik: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.

While at it, sort headers alphabetically.

Fixes: e5530adc17 ("pinctrl: Clean up headers")
Cc: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20221229100746.35047-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-04 02:36:47 +01:00
Andy Shevchenko
afa349bbb5 pinctrl: intel: Get rid of unused members in struct intel_function
The driver has been converted to a generic data type and macro for
the pin function definition, hence get rid of not used members in
the struct intel_function.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30 10:22:53 +02:00
Andy Shevchenko
3b954b31e0 pinctrl: moorefield: Convert to use new memeber in struct intel_function
Convert driver to use generic data type and hence a new member in
the struct intel_function. No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30 10:22:53 +02:00
Andy Shevchenko
de82e6f018 pinctrl: merrifield: Convert to use new memeber in struct intel_function
Convert driver to use generic data type and hence a new member in
the struct intel_function. No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30 10:22:53 +02:00
Andy Shevchenko
b19d82e1f7 pinctrl: lynxpoint: Convert to use new memeber in struct intel_function
Convert driver to use generic data type and hence a new member in
the struct intel_function. No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30 10:22:53 +02:00
Andy Shevchenko
3899707add pinctrl: cherryview: Convert to use new memeber in struct intel_function
Convert driver to use generic data type and hence a new member in
the struct intel_function. No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30 10:22:53 +02:00