Commit Graph

157 Commits

Author SHA1 Message Date
Dave Airlie
af42cf30ea Driver Changes:
- Create and use XE_DEVICE_WA infrastructure (Atwood)
  - SRIOV: Mark BMG as SR-IOV capable (Michal)
  - Dont skip TLB invalidations on VF (Tejas)
  - Fix migration copy direction in access_memory (Auld)
  - General code clean-up (Lucas, Brost, Dr. David, Xin)
  - More missing XeLP workarounds (Tvrtko)
  - SRIOV: Relax VF/PF version negotiation (Michal)
  - SRIOV: LMTT invalidation (Michal)
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Merge tag 'drm-xe-next-2025-07-15' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

Driver Changes:
 - Create and use XE_DEVICE_WA infrastructure (Atwood)
 - SRIOV: Mark BMG as SR-IOV capable (Michal)
 - Dont skip TLB invalidations on VF (Tejas)
 - Fix migration copy direction in access_memory (Auld)
 - General code clean-up (Lucas, Brost, Dr. David, Xin)
 - More missing XeLP workarounds (Tvrtko)
 - SRIOV: Relax VF/PF version negotiation (Michal)
 - SRIOV: LMTT invalidation (Michal)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/aHacDvF9IaVHI61C@intel.com
2025-07-18 19:48:20 +10:00
Michal Wajdeczko
a6c384b24f drm/xe/pf: Stop requiring VF/PF version negotiation on every GT
While some VF/PF relay actions must be handled on the GT level,
like query for runtime registers, it was clarified by the arch
team that initial version negotiation can be done by the VF just
once, by using any available GuC/GT.

Move handling of the VF/PF ABI version negotiation on the PF side
from the GT level functions to the device level functions.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20250713103625.1964-7-michal.wajdeczko@intel.com
2025-07-14 18:19:31 +02:00
Simona Vetter
9800bf6fae UAPI Changes:
- Documentation fixes (Shuicheng)
 
 Cross-subsystem Changes:
  - MTD intel-dg driver for dgfx non-volatile memory device (Sasha)
  - i2c: designware changes to allow i2c integration with BMG (Heikki)
 
 Core Changes:
  - Restructure migration in preparation for multi-device (Brost, Thomas)
  - Expose fan control and voltage regulator version on sysfs (Raag)
 
 Driver Changes:
  - Add WildCat Lake support (Roper)
  - Add aux bus child device driver for NVM on DGFX (Sasha)
  - Some refactor and fixes to allow cleaner BMG w/a (Lucas, Maarten, Auld)
  - BMG w/a (Vinay)
  - Improve handling of aborted probe (Michal)
  - Do not wedge device on killed exec queues (Brost)
  - Init changes for flicker-free boot (Maarten)
  - Fix out-of-bounds field write in MI_STORE_DATA_IMM (Jia)
  - Enable the GuC Dynamic Inhibit Context Switch optimization (Daniele)
  - Drop bo->size (Brost)
  - Builds and KConfig fixes (Harry, Maarten)
  - Consolidate LRC offset calculations (Tvrtko)
  - Fix potential leak in hw_engine_group (Michal)
  - Future-proof for multi-tile + multi-GT cases (Roper)
  - Validate gt in pmu event (Riana)
  - SRIOV PF: Clear all LMTT pages on alloc (Michal)
  - Allocate PF queue size on pow2 boundary (Brost)
  - SRIOV VF: Make multi-GT migration less error prone (Tomasz)
  - Revert indirect ring state patch to fix random LRC context switches failures (Brost)
  - Fix compressed VRAM handling (Auld)
  - Add one additional BMG PCI ID (Ravi)
  - Recommend GuC v70.46.2 for BMG, LNL, DG2 (Julia)
  - Add GuC and HuC to PTL (Daniele)
  - Drop PTL force_probe requirement (Atwood)
  - Fix error flow in display suspend (Shuicheng)
  - Disable GuC communication on hardware initialization error (Zhanjun)
  - Devcoredump fixes and clean up (Shuicheng)
  - SRIOV PF: Downgrade some info to debug (Michal)
  - Don't allocate temporary GuC policies object (Michal)
  - Support for I2C attached MCUs (Heikki, Raag, Riana)
  - Add GPU memory bo trace points (Juston)
  - SRIOV VF: Skip some W/a (Michal)
  - Correct comment of xe_pm_set_vram_threshold (Shuicheng)
  - Cancel ongoing H2G requests when stopping CT (Michal)
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Merge tag 'drm-xe-next-2025-07-10' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

UAPI Changes:
 - Documentation fixes (Shuicheng)

Cross-subsystem Changes:
 - MTD intel-dg driver for dgfx non-volatile memory device (Sasha)
 - i2c: designware changes to allow i2c integration with BMG (Heikki)

Core Changes:
 - Restructure migration in preparation for multi-device (Brost, Thomas)
 - Expose fan control and voltage regulator version on sysfs (Raag)

Driver Changes:
 - Add WildCat Lake support (Roper)
 - Add aux bus child device driver for NVM on DGFX (Sasha)
 - Some refactor and fixes to allow cleaner BMG w/a (Lucas, Maarten, Auld)
 - BMG w/a (Vinay)
 - Improve handling of aborted probe (Michal)
 - Do not wedge device on killed exec queues (Brost)
 - Init changes for flicker-free boot (Maarten)
 - Fix out-of-bounds field write in MI_STORE_DATA_IMM (Jia)
 - Enable the GuC Dynamic Inhibit Context Switch optimization (Daniele)
 - Drop bo->size (Brost)
 - Builds and KConfig fixes (Harry, Maarten)
 - Consolidate LRC offset calculations (Tvrtko)
 - Fix potential leak in hw_engine_group (Michal)
 - Future-proof for multi-tile + multi-GT cases (Roper)
 - Validate gt in pmu event (Riana)
 - SRIOV PF: Clear all LMTT pages on alloc (Michal)
 - Allocate PF queue size on pow2 boundary (Brost)
 - SRIOV VF: Make multi-GT migration less error prone (Tomasz)
 - Revert indirect ring state patch to fix random LRC context switches failures (Brost)
 - Fix compressed VRAM handling (Auld)
 - Add one additional BMG PCI ID (Ravi)
 - Recommend GuC v70.46.2 for BMG, LNL, DG2 (Julia)
 - Add GuC and HuC to PTL (Daniele)
 - Drop PTL force_probe requirement (Atwood)
 - Fix error flow in display suspend (Shuicheng)
 - Disable GuC communication on hardware initialization error (Zhanjun)
 - Devcoredump fixes and clean up (Shuicheng)
 - SRIOV PF: Downgrade some info to debug (Michal)
 - Don't allocate temporary GuC policies object (Michal)
 - Support for I2C attached MCUs (Heikki, Raag, Riana)
 - Add GPU memory bo trace points (Juston)
 - SRIOV VF: Skip some W/a (Michal)
 - Correct comment of xe_pm_set_vram_threshold (Shuicheng)
 - Cancel ongoing H2G requests when stopping CT (Michal)

Signed-off-by: Simona Vetter <simona.vetter@ffwll.ch>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/aHA7184UnWlONORU@intel.com
2025-07-11 11:08:53 +02:00
Matt Atwood
f037e0b78e drm/xe: add xe_device_wa infrastructure
There are some workarounds that must be appplied before gt init,
wa_15015404425 for example. Instead of sprinking them conditionally
throughout the driver as we did for i915 generate an oob.rules file
reusing the RTP infrastructure to make these easier to track.

v2: rename xe_soc_wa to xe_device_wa
v5: derive prefix from argument rather than hard coding the values.
v6: split out xe_gen-wa_oob changes

Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250709221605.172516-3-matthew.s.atwood@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-07-10 15:36:30 -07:00
Heikki Krogerus
f0e53aadd7
drm/xe: Support for I2C attached MCUs
Adding adaption/glue layer where the I2C host adapter
(Synopsys DesignWare I2C adapter) and the I2C clients (the
microcontroller units) are enumerated.

The microcontroller units (MCU) that are attached to the GPU
depend on the OEM. The initially supported MCU will be the
Add-In Management Controller (AMC).

Co-developed-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://lore.kernel.org/r/20250701122252.2590230-4-heikki.krogerus@linux.intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
[Rodrigo fixed the co-developed tags and SPDX format in the .c file]
2025-07-10 10:19:41 -04:00
Ville Syrjälä
470022b5c2 drm/i915/flipq: Provide the nuts and bolts code for flip queue
Provide the lower level code for PIPEDMC based flip queue.

We'll use the so called semi-full flip queue mode where the
PIPEDMC will start the provided DSB on a scanline a little
ahead of the vblank. We need to program the triggering scanline
early enough so that the DSB has enough time to complete writing
all the double buffered registers before they get latched (at
start of vblank).

The firmware implements several queues:
- 3 "plane queues" which execute a single DSB per entry
- 1 "general queue" which can apparently execute 2 DSBs per entry
- 1 vestigial "fast queue" that replaced the "simple flip queue"
  on ADL+, but this isn't supposed to be used due to issues.

But we only need a single plane queue really, and we won't actually
use it as a real queue because we don't allow queueing multiple commits
ahead of time. So the whole thing is perhaps useless. I suppose
there migth be some power saving benefits if we would get the flip
scheduled by userspace early and then could keep some hardware powered
off a bit longer until the DMC kicks off the flipq programming. But that
is pure speculation at this time and needs to be proven.

The code to hook up the flip queue into the actual atomic commit
path will follow later.

TODO: need to think how to do the "wait for DMC firmware load" nicely
      need to think about VRR and PSR
      etc.

v2: Don't write DMC_FQ_W2_PTS_CFG_SEL on pre-lnl
    Don't oops at flipq init if there is no dmc
v3: Adapt to PTL+ flipq changes (different queue entry
    layout, different trigger event, need VRR TG)
    Use the actual CDCLK frequency
    Ask the DSB code how long things are expected to take
v3: Adjust the cdclk rounding (docs are 100% vague, Windows
    rounds like this)
    Initialize some undocumented magic DMC variables on PTL
v4: Use PIPEDMC_FQ_STATUS for busy check (the busy bit in
    PIPEDMC_FQ_CTRL is apparently gone on LNL+)
    Based the preempt timeout on the max exec time
    Preempt before disabling the flip queue
    Order the PIPEDMC_SCANLINECMP* writes a bit more carefully
    Fix some typos
v5: Try to deal with some clang-20 div-by-zero false positive (Nathan)
    Add some docs (Jani)

Cc: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

epr
Link: https://patchwork.freedesktop.org/patch/msgid/20250624170049.27284-5-ville.syrjala@linux.intel.com
2025-06-27 15:54:43 +03:00
Alexander Usyskin
c28bfb107d
drm/xe/nvm: add on-die non-volatile memory device
Enable access to internal non-volatile memory on DGFX
with GSC/CSC devices via a child device.
The nvm child device is exposed via auxiliary bus.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Link: https://lore.kernel.org/r/20250617145159.3803852-7-alexander.usyskin@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-06-23 13:14:50 -04:00
Jani Nikula
400ade1638 Merge drm/drm-next into drm-intel-next
Sync with drm_panel changes from drm-misc-next, and xe driver changes
from drm-xe-next.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23 10:57:13 +03:00
Jani Nikula
a649c2abfa drm/i915/plane: rename intel_atomic_plane.[ch] to intel_plane.[ch]
It's all atomic, no need to emphasize this.

v2: Also update Documentation/gpu/i915.rst (Gustavo)

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/ba5f304e9fe71723191d872e6828d461e1a572bd.1750147992.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-19 12:14:29 +03:00
Thomas Hellström
86e2d052c2 Merge drm/drm-next into drm-xe-next
Backmerging to bring in 6.16

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2025-06-09 18:54:05 +02:00
Michal Wajdeczko
eb9b34734c drm/xe/vf: Move tile-related VF functions to separate file
Some of our VF functions, even if they take a GT pointer, work
only on primary GT and really are tile-related and would be better
to keep them separate from the rest of true GT-oriented functions.
Move them to a file and update to take a tile pointer instead.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
Reviewed-by: Tomasz Lis <tomasz.lis@intel.com>
Link: https://lore.kernel.org/r/20250602103325.549-3-michal.wajdeczko@intel.com
2025-06-03 12:35:57 +02:00
Dave Airlie
806690425a Non-display related:
- Fix undefined reference to `intel_pxp_gsccs_is_ready_for_sessions'
 
 Display related:
 - More work towards display separation (Jani)
 - Stop writing VRR_CTL_IGN_MAX_SHIFT for MTL onwards (Jouni)
 - DSC checks for 3 engines (Ankit)
 - Add link rate and lane count to i915_display_info (Khaled)
 - PSR fixes and workaround for underrun on idle (Jouni)
 - LOBF enablement and ALMP fixes (Animesh)
 - Clean up VGA plane handling (Ville)
 - Use an intel_connector pointer everywhere (Imre)
 - Fix warning for coffeelake on SunrisePoint PCH (Jiajia)
 - Rework/Correction on minimum hblank calculation (Arun)
 - Dmesg clean up (Jani)
 - Add a couple of simple display workarounds (Ankit, Vinod)
 - Refactor HDCP GSC (Jani)
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Merge tag 'drm-intel-next-2025-05-08' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Non-display related:
- Fix undefined reference to `intel_pxp_gsccs_is_ready_for_sessions'

Display related:
- More work towards display separation (Jani)
- Stop writing VRR_CTL_IGN_MAX_SHIFT for MTL onwards (Jouni)
- DSC checks for 3 engines (Ankit)
- Add link rate and lane count to i915_display_info (Khaled)
- PSR fixes and workaround for underrun on idle (Jouni)
- LOBF enablement and ALMP fixes (Animesh)
- Clean up VGA plane handling (Ville)
- Use an intel_connector pointer everywhere (Imre)
- Fix warning for coffeelake on SunrisePoint PCH (Jiajia)
- Rework/Correction on minimum hblank calculation (Arun)
- Dmesg clean up (Jani)
- Add a couple of simple display workarounds (Ankit, Vinod)
- Refactor HDCP GSC (Jani)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/aByyL3bEufPu79OM@intel.com
2025-05-10 06:12:18 +10:00
Jani Nikula
9536d60202 drm/i915/rps: refactor display rps support
Make the gt rps code and display irq code interact via
intel_display_rps.[ch], instead of direct access. Add no-op static
inline stubs for xe instead of having a separate build unit doing
nothing. All of this clarifies the interfaces between i915 core and
display.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/ef2a46dc8f30b72282494f54e98cb5fed7523b58.1746536745.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-05-07 11:03:14 +03:00
Dave Airlie
d2b9e2f8a1 Core Changes:
Fix drm_gpusvm kernel-doc (Lucas)
 
 Driver Changes:
 - Release guc ids before cancelling work (Tejas)
 - Remove a duplicated pc_start_call (Rodrigo)
 - Fix an incorrect assert in previous userptr fixes (Thomas)
 - Remove gen11 assertions and prefixes (Lucas)
 - Drop sentinels from arg to xe_rtp_process_to_src (Lucas)
 - Temporarily disable D3Cold on BMG (Rodrigo)
 - Fix MOCS debugfs LNCF readout (Tvrtko)
 - Some ring flush cleanups (Tvrtko)
 - Use unsigned int for alignment in fb pinning code (Tvrtko)
 - Retry and wait longer for GuC PC start (Rodrigo)
 - Recognize 3DSTATE_COARSE_PIXEL in LRC dumps (Matt Roper)
 - Remove reduntant check in xe_vm_create_ioctl() (Xin)
 - A bunch of SRIOV updates (Michal)
 - Add stats for SVM page-faults (Francois)
 - Fix an UAF (Harish)
 - Expose fan speed (Raag)
 - Fix exporting xe buffer objects multiple times (Tomasz)
 - Apply a workaround (Vinay)
 - Simplify pinned bo iteration (Thomas)
 - Remove an incorrect "static" keywork (Lucas)
 - Add support for separate firmware files on each GT (Lucas)
 - Survivability handling fixes (Lucas)
 - Allow to inject error in early probe (Lucas)
 - Fix unmet direct dependencies warning (Yue Haibing)
 - More error injection during probe (Francois)
 - Coding style fix (Maarten)
 - Additional stats support (Riana)
 - Add fault injection for xe_oa_alloc_regs (Nakshrtra)
 - Add a BMG PCI ID (Matt Roper)
 - Some SVM fixes and preliminary SVM multi-device work (Thomas)
 - Switch the migrate code from drm managed to dev managed (Aradhya)
 - Fix an out-of-bounds shift when invalidating TLB (Thomas)
 - Ensure fixed_slice_mode gets set after ccs_mode change (Niranjana)
 - Use local fence in error path of xe_migrate_clear (Matthew Brost)
 - More Workarounds (Julia)
 - Define sysfs_ops on all directories (Tejas)
 - Set power state to D3Cold during s2idle/s3 (Badal)
 - Devcoredump output fix (John)
 - Avoid plain 64-bit division (Arnd Bergmann)
 - Reword a debug message (John)
 - Don't print a hwconfig error message when forcing execlists (Stuart)
 - Restore an error code to avoid a smatch warning (Rodrigo)
 - Invalidate L3 read-only cachelines for geometry streams too (Kenneth)
 - Make PPHWSP size explicit in xe_gt_lrc_size() (Gustavo)
 - Add GT frequency events (Vinay)
 - Fix xe_pt_stage_bind_walk kerneldoc (Thomas)
 - Add a workaround (Aradhya)
 - Rework pinned save/restore (Matthew Auld, Matthew Brost)
 - Allow non-contig VRAM kernel BO (Matthew Auld)
 - Support non-contig VRAM provisioning for SRIOV (Matthew Auld)
 - Allow scratch-pages for unmapped parts of page-faulting VMs. (Oak)
 - Ensure XE_BO_FLAG_CPU_ADDR_MIRROR had a unique value (Matt Roper)
 - Fix taking an invalid lock on wedge (Lucas)
 - Configs and documentation for survivability mode (Riana)
 - Remove an unused macro (Shuicheng)
 - Work around a page-fault full error (Matt Brost)
 - Enable a SRIOV workaround (John)
 - Bump the recommended GuC version (John)
 - Allow to drop VRAM resizing (Lucas)
 - Don't expose privileged debugfs files if VF (Michal)
 - Don't show GGTT/LMEM debugfs files under media GT (Michal)
 - Adjust ring-buffer emission for maximum possible size (Tvrtko)
 - Fix notifier vs folio lock deadlock (Matthew Auld)
 - Stop relying on placement for dma-buf unmap Matthew Auld)
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Merge tag 'drm-xe-next-2025-04-17' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

Core Changes:
Fix drm_gpusvm kernel-doc (Lucas)

Driver Changes:
- Release guc ids before cancelling work (Tejas)
- Remove a duplicated pc_start_call (Rodrigo)
- Fix an incorrect assert in previous userptr fixes (Thomas)
- Remove gen11 assertions and prefixes (Lucas)
- Drop sentinels from arg to xe_rtp_process_to_src (Lucas)
- Temporarily disable D3Cold on BMG (Rodrigo)
- Fix MOCS debugfs LNCF readout (Tvrtko)
- Some ring flush cleanups (Tvrtko)
- Use unsigned int for alignment in fb pinning code (Tvrtko)
- Retry and wait longer for GuC PC start (Rodrigo)
- Recognize 3DSTATE_COARSE_PIXEL in LRC dumps (Matt Roper)
- Remove reduntant check in xe_vm_create_ioctl() (Xin)
- A bunch of SRIOV updates (Michal)
- Add stats for SVM page-faults (Francois)
- Fix an UAF (Harish)
- Expose fan speed (Raag)
- Fix exporting xe buffer objects multiple times (Tomasz)
- Apply a workaround (Vinay)
- Simplify pinned bo iteration (Thomas)
- Remove an incorrect "static" keywork (Lucas)
- Add support for separate firmware files on each GT (Lucas)
- Survivability handling fixes (Lucas)
- Allow to inject error in early probe (Lucas)
- Fix unmet direct dependencies warning (Yue Haibing)
- More error injection during probe (Francois)
- Coding style fix (Maarten)
- Additional stats support (Riana)
- Add fault injection for xe_oa_alloc_regs (Nakshrtra)
- Add a BMG PCI ID (Matt Roper)
- Some SVM fixes and preliminary SVM multi-device work (Thomas)
- Switch the migrate code from drm managed to dev managed (Aradhya)
- Fix an out-of-bounds shift when invalidating TLB (Thomas)
- Ensure fixed_slice_mode gets set after ccs_mode change (Niranjana)
- Use local fence in error path of xe_migrate_clear (Matthew Brost)
- More Workarounds (Julia)
- Define sysfs_ops on all directories (Tejas)
- Set power state to D3Cold during s2idle/s3 (Badal)
- Devcoredump output fix (John)
- Avoid plain 64-bit division (Arnd Bergmann)
- Reword a debug message (John)
- Don't print a hwconfig error message when forcing execlists (Stuart)
- Restore an error code to avoid a smatch warning (Rodrigo)
- Invalidate L3 read-only cachelines for geometry streams too (Kenneth)
- Make PPHWSP size explicit in xe_gt_lrc_size() (Gustavo)
- Add GT frequency events (Vinay)
- Fix xe_pt_stage_bind_walk kerneldoc (Thomas)
- Add a workaround (Aradhya)
- Rework pinned save/restore (Matthew Auld, Matthew Brost)
- Allow non-contig VRAM kernel BO (Matthew Auld)
- Support non-contig VRAM provisioning for SRIOV (Matthew Auld)
- Allow scratch-pages for unmapped parts of page-faulting VMs. (Oak)
- Ensure XE_BO_FLAG_CPU_ADDR_MIRROR had a unique value (Matt Roper)
- Fix taking an invalid lock on wedge (Lucas)
- Configs and documentation for survivability mode (Riana)
- Remove an unused macro (Shuicheng)
- Work around a page-fault full error (Matt Brost)
- Enable a SRIOV workaround (John)
- Bump the recommended GuC version (John)
- Allow to drop VRAM resizing (Lucas)
- Don't expose privileged debugfs files if VF (Michal)
- Don't show GGTT/LMEM debugfs files under media GT (Michal)
- Adjust ring-buffer emission for maximum possible size (Tvrtko)
- Fix notifier vs folio lock deadlock (Matthew Auld)
- Stop relying on placement for dma-buf unmap Matthew Auld)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
Link: https://lore.kernel.org/r/aADWaEFKVmxSnDLo@fedora
2025-04-26 08:06:14 +10:00
Thomas Hellström
3ab7ae8e07 Merge drm/drm-next into drm-xe-next
Backmerge to bring in linux 6.15-rc.

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
2025-04-24 13:34:55 +02:00
Dave Airlie
b60301774a Cross-subsystem Changes:
- Update GVT MAINTAINERS (Jani)
 
 Driver Changes:
 - Updates for xe3lpd display (Gustavo)
 - Fix link training interrupted by HPD pulse (Imre)
 - Watermark bound checks for DSC (Ankit)
 - VRR Refactor and other fixes and improvements (Ankit)
 - More conversions towards intel_display struct (Gustavo, Jani)
 - Other clean-up patches towards a display separation (Jani)
 - Maintain asciibetical order for HAS_* macros (Ankit)
 - Fixes around probe/initialization (Janusz)
 - Fix build and doc build issue (Yue, Rodrigo)
 - DSI related fixes (Suraj, William, Jani)
 - Improve DC6 entry counter (Mohammed)
 - Fix xe2hpd memory type identification (Vivek)
 - PSR related fixes and improvements (Animesh, Jouni)
 - DP MST related fixes and improvements (Imre)
 - Fix scanline_offset for LNL+/BMG+ (Ville)
 - Some gvt related fixes and changes (Ville, Jani)
 - Some PLL code adjustment (Ville)
 - Display wa addition (Vinod)
 - DRAM type logging (Lucas)
 - Pimp the initial FB readout (Ville)
 - Some sagv/bw cleanup (Ville)
 - Remove i915_display_capabilities debugfs entry (Jani)
 - Move PCH type to display caps debugfs entry (Jani)
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Merge tag 'drm-intel-next-2025-04-11' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Cross-subsystem Changes:
- Update GVT MAINTAINERS (Jani)

Driver Changes:
- Updates for xe3lpd display (Gustavo)
- Fix link training interrupted by HPD pulse (Imre)
- Watermark bound checks for DSC (Ankit)
- VRR Refactor and other fixes and improvements (Ankit)
- More conversions towards intel_display struct (Gustavo, Jani)
- Other clean-up patches towards a display separation (Jani)
- Maintain asciibetical order for HAS_* macros (Ankit)
- Fixes around probe/initialization (Janusz)
- Fix build and doc build issue (Yue, Rodrigo)
- DSI related fixes (Suraj, William, Jani)
- Improve DC6 entry counter (Mohammed)
- Fix xe2hpd memory type identification (Vivek)
- PSR related fixes and improvements (Animesh, Jouni)
- DP MST related fixes and improvements (Imre)
- Fix scanline_offset for LNL+/BMG+ (Ville)
- Some gvt related fixes and changes (Ville, Jani)
- Some PLL code adjustment (Ville)
- Display wa addition (Vinod)
- DRAM type logging (Lucas)
- Pimp the initial FB readout (Ville)
- Some sagv/bw cleanup (Ville)
- Remove i915_display_capabilities debugfs entry (Jani)
- Move PCH type to display caps debugfs entry (Jani)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/Z_kTqPX5Mjruq1pL@intel.com
2025-04-15 05:06:51 +10:00
Rodrigo Vivi
6ca37b86f6 drm/{i915,xe}: Move intel_pch under display
The only usage of the "PCH" infra is to detect which South Display
Engine we should be using. Move it under display so we can convert
all its callers towards intel_display struct later.

No functional or code change.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/041e3dee494aa15c22172360f2bdd9b15e4acb00.1744364975.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-04-12 11:15:13 +03:00
Riana Tauro
16280ded45 drm/xe: Add configfs to enable survivability mode
Registers a configfs subsystem called 'xe' that creates a
directory in the mounted configfs directory (/sys/kernel/config)
Userspace can then create the device that has to be configured
under the xe directory

	mkdir /sys/kernel/config/xe/0000:03:00.0

The device created will have the following attributes to be
configured

	/sys/kernel/config/xe/
		.. 0000:03:00.0/
			... survivability_mode

v2: fix kernel-doc
    fix return value (Lucas)

v3: fix kernel-doc (Lucas)

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250407051414.1651616-2-riana.tauro@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-04-08 22:23:59 -07:00
Thomas Hellström
6c55404d4f drm/xe: Introduce CONFIG_DRM_XE_GPUSVM
Don't rely on CONFIG_DRM_GPUSVM because other drivers may enable it
causing us to compile in SVM support unintentionally.

Also take the opportunity to leave more code out of compilation if
!CONFIG_DRM_XE_GPUSVM and !CONFIG_DRM_XE_DEVMEM_MIRROR

v3:
- Fixes for compilation errors on 32-bit. This changes the Kconfig
  logic a bit.

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20250326080551.40201-2-thomas.hellstrom@linux.intel.com
2025-03-27 11:46:06 +01:00
Jani Nikula
336c0eaed2 drm/i915/display: add display specific runtime PM wrappers
Add display specific wrappers around the i915 and xe dedicated runtime
PM interfaces. There are no conversions here, just the wrappers.

Implement with_intel_display_rpm() without needing to provide a local
variable, which neatly narrows the scope and hides the type of the
wakeref cookie.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/086b312367fa0fbd8de92e9764117aa7ff4a8cc5.1742483007.git.jani.nikula@intel.com
2025-03-21 10:08:42 +02:00
Dave Airlie
11a5c6445a UAPI Changes:
- Expose per-engine activity via perf pmu (Riana, Lucas, Umesh)
  - Add support for EU stall sampling (Harish, Ashutosh)
  - Allow userspace to provide low latency hint for submission (Tejas)
  - GPU SVM and Xe SVM implementation (Matthew Brost)
 
 Cross-subsystem Changes:
  - devres handling for component drivers (Lucas)
  - Backmege drm-next to allow cross dependent change with i915
  - GPU SVM and Xe SVM implementation (Matthew Brost)
 
 Core Changes:
 
 Driver Changes:
  - Fixes to userptr and missing validations (Matthew Auld, Thomas
    Hellström, Matthew Brost)
  - devcoredump typos and error handling improvement (Shuicheng)
  - Allow oa_exponent value of 0 (Umesh)
  - Finish moving device probe to devm (Lucas)
  - Fix race between submission restart and scheduled being freed (Tejas)
  - Fix counter overflows in gt_stats (Francois)
  - Refactor and add missing workarounds and tunings for pre-Xe2 platforms
    (Aradhya, Tvrtko)
  - Fix PXP locks interaction with exec queues being killed (Daniele)
  - Eliminate TIMESTAMP_OVERRIDE from xe (Matt Roper)
  - Change xe_gen_wa_oob to allow building on MacOS (Daniel Gomez)
  - New workarounds for Panther Lake (Tejas)
  - Fix VF resume errors (Satyanarayana)
  - Fix workaround infra skipping some workarounds dependent on engine
    initialization (Tvrtko)
  - Improve per-IP descriptors (Gustavo)
  - Add more error injections to probe sequence (Francois)
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Merge tag 'drm-xe-next-2025-03-07' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

UAPI Changes:
 - Expose per-engine activity via perf pmu (Riana, Lucas, Umesh)
 - Add support for EU stall sampling (Harish, Ashutosh)
 - Allow userspace to provide low latency hint for submission (Tejas)
 - GPU SVM and Xe SVM implementation (Matthew Brost)

Cross-subsystem Changes:
 - devres handling for component drivers (Lucas)
 - Backmege drm-next to allow cross dependent change with i915
 - GPU SVM and Xe SVM implementation (Matthew Brost)

Core Changes:

Driver Changes:
 - Fixes to userptr and missing validations (Matthew Auld, Thomas
   Hellström, Matthew Brost)
 - devcoredump typos and error handling improvement (Shuicheng)
 - Allow oa_exponent value of 0 (Umesh)
 - Finish moving device probe to devm (Lucas)
 - Fix race between submission restart and scheduled being freed (Tejas)
 - Fix counter overflows in gt_stats (Francois)
 - Refactor and add missing workarounds and tunings for pre-Xe2 platforms
   (Aradhya, Tvrtko)
 - Fix PXP locks interaction with exec queues being killed (Daniele)
 - Eliminate TIMESTAMP_OVERRIDE from xe (Matt Roper)
 - Change xe_gen_wa_oob to allow building on MacOS (Daniel Gomez)
 - New workarounds for Panther Lake (Tejas)
 - Fix VF resume errors (Satyanarayana)
 - Fix workaround infra skipping some workarounds dependent on engine
   initialization (Tvrtko)
 - Improve per-IP descriptors (Gustavo)
 - Add more error injections to probe sequence (Francois)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ilc5jvtyaoyi6woyhght5a6sw5jcluiojjueorcyxbynrcpcjp@mw2mi6rd6a7l
2025-03-11 10:26:17 +10:00
Dave Airlie
d65a27f95f drm-misc-next for v6.15:
Cross-subsystem Changes:
 
 base:
 - component: Provide helper to query bound status
 
 fbdev:
 - fbtft: Remove access to page->index
 
 Core Changes:
 
 - Fix usage of logging macros in several places
 
 gem:
 - Add test function for imported dma-bufs and use it in core and helpers
 - Avoid struct drm_gem_object.import_attach
 
 tests:
 - Fix lockdep warnings
 
 ttm:
 - Add helpers for TTM shrinker
 
 Driver Changes:
 
 adp:
 - Add support for Apple Touch Bar displays on M1/M2
 
 amdxdna:
 - Fix interrupt handling
 
 appletbdrm:
 - Add support for Apple Touch Bar displays on x86
 
 bridge:
 - synopsys: Add HDMI audio support
 - ti-sn65dsi83: Support negative DE polarity
 
 ipu-v3:
 - Remove unused code
 
 nouveau:
 - Avoid multiple -Wflex-array-member-not-at-end warnings
 
 panthor:
 - Fix CS_STATUS_ defines
 - Improve locking
 
 rockchip:
 - analogix_dp: Add eDP support
 - lvds: Improve logging
 - vop2: Improve HDMI mode handling; Add support for RK3576
 - Fix shutdown
 - Support rk3562-mali
 
 xe:
 - Use TTM shrinker
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Merge tag 'drm-misc-next-2025-03-06' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next

drm-misc-next for v6.15:

Cross-subsystem Changes:

base:
- component: Provide helper to query bound status

fbdev:
- fbtft: Remove access to page->index

Core Changes:

- Fix usage of logging macros in several places

gem:
- Add test function for imported dma-bufs and use it in core and helpers
- Avoid struct drm_gem_object.import_attach

tests:
- Fix lockdep warnings

ttm:
- Add helpers for TTM shrinker

Driver Changes:

adp:
- Add support for Apple Touch Bar displays on M1/M2

amdxdna:
- Fix interrupt handling

appletbdrm:
- Add support for Apple Touch Bar displays on x86

bridge:
- synopsys: Add HDMI audio support
- ti-sn65dsi83: Support negative DE polarity

ipu-v3:
- Remove unused code

nouveau:
- Avoid multiple -Wflex-array-member-not-at-end warnings

panthor:
- Fix CS_STATUS_ defines
- Improve locking

rockchip:
- analogix_dp: Add eDP support
- lvds: Improve logging
- vop2: Improve HDMI mode handling; Add support for RK3576
- Fix shutdown
- Support rk3562-mali

xe:
- Use TTM shrinker

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20250306130700.GA485504@linux.fritz.box
2025-03-07 09:55:50 +10:00
Matthew Brost
6fd979c2f3 drm/xe: Add SVM init / close / fini to faulting VMs
Add SVM init / close / fini to faulting VMs. Minimual implementation
acting as a placeholder for follow on patches.

v2:
 - Add close function
v3:
 - Better commit message (Thomas)
 - Kernel doc (Thomas)
 - Update chunk array to be unsigned long (Thomas)
 - Use new drm_gpusvm.h header location (Thomas)
 - Newlines between functions in xe_svm.h (Thomas)
 - Call drm_gpusvm_driver_set_lock in init (Thomas)
v6:
 - Only compile if CONFIG_DRM_GPUSVM selected (CI, Lucas)
v7:
 - Only select CONFIG_DRM_GPUSVM if DEVICE_PRIVATE (CI)

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250306012657.3505757-10-matthew.brost@intel.com
2025-03-06 11:35:35 -08:00
Thomas Hellström
00c8efc318 drm/xe: Add a shrinker for xe bos
Rather than relying on the TTM watermark accounting add a shrinker
for xe_bos in TT or system memory.

Leverage the newly added TTM per-page shrinking and shmem backup
support.

Although xe doesn't fully support WONTNEED (purgeable) bos yet,
introduce and add shrinker support for purgeable ttm_tts.

v2:
- Cleanups bugfixes and a KUNIT shrinker test.
- Add writeback support, and activate if kswapd.
v3:
- Move the try_shrink() helper to core TTM.
- Minor cleanups.
v4:
- Add runtime pm for the shrinker. Shrinking may require an active
  device for CCS metadata copying.
v5:
- Separately purge ghost- and zombie objects in the shrinker.
- Fix a format specifier - type inconsistency. (Kernel test robot).
v7:
- s/long/s64/ (Christian König)
- s/sofar/progress/ (Matt Brost)
v8:
- Rebase on Xe KUNIT update.
- Add content verifying to the shrinker kunit test.
- Split out TTM changes to a separate patch.
- Get rid of multiple bool arguments for clarity (Matt Brost)
- Avoid an error pointer dereference (Matt Brost)
- Avoid an integer overflow (Matt Auld)
- Address misc review comments by Matt Brost.
v9:
- Fix a compliation error.
- Rebase.
v10:
- Update to new LRU walk interface.
- Rework ghost-, zombie and purged object shrinking.
- Rebase.
v11:
- Use additional TTM helpers.
- Honor __GFP_FS and __GFP_IO
- Rebase.
v13:
- Use ttm_tt_setup_backup().
v14:
- Don't set up backup on imported bos.
v15:
- Rebase on backup interface changes.

Cc: Christian König <christian.koenig@amd.com>
Cc: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: <dri-devel@lists.freedesktop.org>
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Acked-by: Christian König <christian.koenig@amd.com>
Link: https://lore.kernel.org/intel-xe/20250305092220.123405-7-thomas.hellstrom@linux.intel.com
2025-03-05 17:08:59 +01:00
Lucas De Marchi
0410c61215 Merge drm/drm-next into drm-xe-next
Sync to fix conlicts between drm-xe-next and drm-intel-next.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-02-28 06:54:14 -08:00
Dave Airlie
33e26f3544 UAPI Changes:
- Add mmap support for PCI memory barrier (Tejas, Matthew Auld)
  - Enable integration with perf pmu, exposing event counters: for now, just
    GT C6 residency (Vinay, Lucas)
  - Add "survivability mode" to allow putting the driver in a state capable of
    firmware upgrade on critical failures (Riana, Rodrigo)
  - Add PXP HWDRM support and enable for compatible platforms:
    Meteor Lake and Lunar Lake (Daniele, John Harrison)
  - Expose package and vram temperature over hwmon subsystem (Raag, Badal, Rodrigo)
 
 Cross-subsystem Changes:
  - Backmege drm-next to synchronize with i915 display and other internal APIs
 
 Display Changes (including i915):
  - Device probe re-order to help with flicker-free boot (Maarten)
  - Align watermark, hpd and dsm with i915 (Rodrigo)
  - Better abstraction for d3cold (Rodrigo)
 
 Driver Changes:
  - Make sure changes to ccs_mode is with helper for gt sync reset (Maciej)
  - Drop mmio_ext abstraction since it didn't prove useful in its current form
    (Matt Roper)
  - Reject BO eviction if BO is bound to current VM (Oak, Thomas Hellström)
  - Add GuC Power Conservation debugfs (Rodrigo)
  - L3 cache topology updates for Xe3 (Francois, Matt Atwood)
  - Better logging about missing GuC logs (John Harrison)
  - Better logging for hwconfig-related data availability (John Harrison)
  - Tracepoint updates for xe_bo_create, xe_vm and xe_vma (Oak)
  - Add missing SPDX licenses (Francois)
  - Xe suballocator imporovements (Michal Wajdeczko)
  - Improve logging for native vs SR-IOV driver mode (Satyanarayana)
  - Make sure VF bootstrap is not attempted in execlist mode (Maarten)
  - Add GuC Buffer Cache abstraction for some CTB H2G actions and use
    during VF provisioning (Michal Wajdeczko)
  - Better synchronization in gtidle for new users (Vinay)
  - New workarounds for Panther Lake (Nirmoy, Vinay)
  - PCI ID updates for Panther Lake (Matt Atwood)
  - Enable SR-IOV for Panther Lake (Michal Wajdeczko)
  - Update MAINTAINERS to stop directing xe changes to drm-misc (Lucas)
  - New PCI IDs for Battle Mage (Shekhar)
  - Better pagefault logging (Francois)
  - SR-IOV fixes and refactors for past and new platforms (Michal Wajdeczko)
  - Platform descriptor refactors and updates (Sai Teja)
  - Add gt stats debugfs (Francois)
  - Add guc_log debugfs to dump to dmesg (Lucas)
  - Abstract per-platform LMTT availability (Piotr Piórkowski)
  - Refactor VRAM manager location (Piotr Piórkowski)
  - Add missing xe_pm_runtime_put when forcing wedged mode (Shuicheng)
  - Fix possible lockup when forcing wedged mode (Xin Wang)
  - Probe refactors to use cleanup actions with better error handling (Lucas)
  - XE_IOCTL_DBG clarification for userspace (Maarten)
  - Better xe_mmio initialization and abstraction (Ilia)
  - Drop unnecessary GT lookup (Matt Roper)
  - Skip client engine usage from fdinfo for VFs (Marcin Bernatowicz)
  - Allow to test xe_sync_entry_parse with error injection (Priyanka)
  - OA fix for polled read (Umesh)
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Merge tag 'drm-xe-next-2025-02-24' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

UAPI Changes:
 - Add mmap support for PCI memory barrier (Tejas, Matthew Auld)
 - Enable integration with perf pmu, exposing event counters: for now, just
   GT C6 residency (Vinay, Lucas)
 - Add "survivability mode" to allow putting the driver in a state capable of
   firmware upgrade on critical failures (Riana, Rodrigo)
 - Add PXP HWDRM support and enable for compatible platforms:
   Meteor Lake and Lunar Lake (Daniele, John Harrison)
 - Expose package and vram temperature over hwmon subsystem (Raag, Badal, Rodrigo)

Cross-subsystem Changes:
 - Backmege drm-next to synchronize with i915 display and other internal APIs

Display Changes (including i915):
 - Device probe re-order to help with flicker-free boot (Maarten)
 - Align watermark, hpd and dsm with i915 (Rodrigo)
 - Better abstraction for d3cold (Rodrigo)

Driver Changes:
 - Make sure changes to ccs_mode is with helper for gt sync reset (Maciej)
 - Drop mmio_ext abstraction since it didn't prove useful in its current form
   (Matt Roper)
 - Reject BO eviction if BO is bound to current VM (Oak, Thomas Hellström)
 - Add GuC Power Conservation debugfs (Rodrigo)
 - L3 cache topology updates for Xe3 (Francois, Matt Atwood)
 - Better logging about missing GuC logs (John Harrison)
 - Better logging for hwconfig-related data availability (John Harrison)
 - Tracepoint updates for xe_bo_create, xe_vm and xe_vma (Oak)
 - Add missing SPDX licenses (Francois)
 - Xe suballocator imporovements (Michal Wajdeczko)
 - Improve logging for native vs SR-IOV driver mode (Satyanarayana)
 - Make sure VF bootstrap is not attempted in execlist mode (Maarten)
 - Add GuC Buffer Cache abstraction for some CTB H2G actions and use
   during VF provisioning (Michal Wajdeczko)
 - Better synchronization in gtidle for new users (Vinay)
 - New workarounds for Panther Lake (Nirmoy, Vinay)
 - PCI ID updates for Panther Lake (Matt Atwood)
 - Enable SR-IOV for Panther Lake (Michal Wajdeczko)
 - Update MAINTAINERS to stop directing xe changes to drm-misc (Lucas)
 - New PCI IDs for Battle Mage (Shekhar)
 - Better pagefault logging (Francois)
 - SR-IOV fixes and refactors for past and new platforms (Michal Wajdeczko)
 - Platform descriptor refactors and updates (Sai Teja)
 - Add gt stats debugfs (Francois)
 - Add guc_log debugfs to dump to dmesg (Lucas)
 - Abstract per-platform LMTT availability (Piotr Piórkowski)
 - Refactor VRAM manager location (Piotr Piórkowski)
 - Add missing xe_pm_runtime_put when forcing wedged mode (Shuicheng)
 - Fix possible lockup when forcing wedged mode (Xin Wang)
 - Probe refactors to use cleanup actions with better error handling (Lucas)
 - XE_IOCTL_DBG clarification for userspace (Maarten)
 - Better xe_mmio initialization and abstraction (Ilia)
 - Drop unnecessary GT lookup (Matt Roper)
 - Skip client engine usage from fdinfo for VFs (Marcin Bernatowicz)
 - Allow to test xe_sync_entry_parse with error injection (Priyanka)
 - OA fix for polled read (Umesh)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/m3gbuh32wgiep43i4zxbyhxqbenvtgvtao5sczivlasj7tikwv@dmlba4bfg2ny
2025-02-27 10:08:29 +10:00
Harish Chegondi
1537ec85eb drm/xe/uapi: Introduce API for EU stall sampling
A new hardware feature first introduced in PVC gives capability to
periodically sample EU stall state and record counts for different stall
reasons, on a per IP basis, aggregate across all EUs in a subslice and
record the samples in a buffer in each subslice. Eventually, the aggregated
data is written out to a buffer in the memory. This feature is also
supported in XE2 and later architecture GPUs.

Use an existing IOCTL - DRM_IOCTL_XE_OBSERVATION as the interface into the
driver from the user space to do initial setup and obtain a file descriptor
for the EU stall data stream.  Input parameter to the IOCTL is a struct
drm_xe_observation_param in which observation_type should be set to
DRM_XE_OBSERVATION_TYPE_EU_STALL, observation_op should be
DRM_XE_OBSERVATION_OP_STREAM_OPEN and param should point to a chain of
drm_xe_ext_set_property structures in which each structure has a pair of
property and value. The EU stall sampling input properties are defined in
drm_xe_eu_stall_property_id enum.

With the file descriptor obtained from DRM_IOCTL_XE_OBSERVATION, user space
can enable and disable EU stall sampling with the IOCTLs:
DRM_XE_OBSERVATION_IOCTL_ENABLE and DRM_XE_OBSERVATION_IOCTL_DISABLE.
User space can also call poll() to check for availability of data in the
buffer. The data can be read with read(). Finally, the file descriptor
can be closed with close().

v11: Changed a couple of variables in struct eu_stall_open_properties
     from unsigned int to int.
v10: Use extension number while parsing chain of extensions.
     Remove function description for static functions.
     Move code around as per review feedback.
v9: Changed some u32 to unsigned int.
    Moved some code around as per review feedback from v8.
v8: Used div_u64 instead of / to fix 32-bit build issue.
    Changed copyright year in xe_eu_stall.c/h to 2025.
v7: Renamed input property DRM_XE_EU_STALL_PROP_EVENT_REPORT_COUNT
    to DRM_XE_EU_STALL_PROP_WAIT_NUM_REPORTS to be consistent with
    OA. Renamed the corresponding internal variables.
    Fixed some commit messages based on review feedback.
v6: Change the input sampling rate to GPU cycles instead of
    GPU cycles multiplier.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bb707a27975c33e4a912b9839b023acb7a1f9c90.1740533885.git.harish.chegondi@intel.com
2025-02-26 11:30:57 -08:00
Riana Tauro
b729ea271e drm/xe: Add engine activity support
GuC provides support to read engine counters to calculate the
engine activity. KMD exposes two counters via the PMU interface to
calculate engine activity

Engine Active Ticks(engine-active-ticks) - active ticks of engine
Engine Total Ticks (engine-total-ticks) - total ticks of engine

Engine activity percentage can be calculated as below
Engine activity % = (engine active ticks/engine total ticks) * 100.

v2: fix cosmetic review comments
    add forcewake for gpm_ts (Umesh)

v3: fix CI hooks error
    change function parameters and unpin bo on error
    of allocate_activity_buffers
    fix kernel-doc (Umesh)
    use engine activity (Umesh, Lucas)
    rename xe_engine_activity to xe_guc_engine_*
    fix commit message to use engine activity (Lucas, Umesh)

v4: add forcewake in PMU layer

v5: fix makefile
    use drmm_kcalloc instead of kmalloc_array
    remove managed bo
    skip init for VF
    fix cosmetic review comments (Michal)

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250224053903.2253539-2-riana.tauro@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-02-24 12:32:09 -08:00
Daniele Ceraolo Spurio
385a8015b2 drm/xe/pxp: Add PXP debugfs support
This patch introduces 2 PXP debugfs entries:

- info: prints the current PXP status and key instance
- terminate: simulate a termination interrupt

The first one is useful for debug, while the second one can be used for
testing the termination flow.

v2: move the info prints inside the lock (John)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250129174140.948829-13-daniele.ceraolospurio@intel.com
2025-02-03 11:51:28 -08:00
Daniele Ceraolo Spurio
dcdd6b84d9 drm/xe/pxp: Allocate PXP execution resources
PXP requires submissions to the HW for the following operations

1) Key invalidation, done via the VCS engine
2) Communication with the GSC FW for session management, done via the
   GSCCS.

Key invalidation submissions are serialized (only 1 termination can be
serviced at a given time) and done via GGTT, so we can allocate a simple
BO and a kernel queue for it.

Submissions for session management are tied to a PXP client (identified
by a unique host_session_id); from the GSC POV this is a user-accessible
construct, so all related submission must be done via PPGTT. The driver
does not currently support PPGTT submission from within the kernel, so
to add this support, the following changes have been included:

- a new type of kernel-owned VM (marked as GSC), required to ensure we
  don't use fault mode on the engine and to mark the different lock
  usage with lockdep.
- a new function to map a BO into a VM from within the kernel.

v2: improve comments and function name, remove unneeded include (John)
v3: fix variable/function names in documentation

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250129174140.948829-3-daniele.ceraolospurio@intel.com
2025-02-03 11:51:05 -08:00
Daniele Ceraolo Spurio
ff48e05d8d drm/xe/pxp: Initialize PXP structure and KCR reg
As the first step towards adding PXP support, hook in the PXP init
function, allocate the PXP structure and initialize the KCR register to
allow PXP HWDRM sessions.

v2: remove unneeded includes, free PXP memory on error (John)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250129174140.948829-2-daniele.ceraolospurio@intel.com
2025-02-03 11:51:02 -08:00
Lucas De Marchi
220ed69043 Merge drm/drm-next into drm-xe-next
Backmerge drm-next to get the common APIs and refactors as well as
getting the display changes from i915 in xe so the probe order can be
improved.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-01-30 14:35:52 -08:00
Gustavo Sousa
c13a42f210 drm/xe: Fix sort order of .o lists in Makefile
The Makefile for xe asks us to keep the lists of object files sorted:

  # Please keep these build lists sorted!

Reshuffle the lists into the correct sort order. That was done by
filtering each unsorted list through 'LC_ALL=C sort'.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250115140812.20799-1-gustavo.sousa@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-01-30 09:41:59 -08:00
Riana Tauro
5e940312a2
drm/xe: Add functions and sysfs for boot survivability
Boot Survivability is a software based workflow for recovering a system
in a failed boot state. Here system recoverability is concerned with
recovering the firmware responsible for boot.

This is implemented by loading the driver with bare minimum (no drm card)
to allow the firmware to be flashed through mei-gsc and collect telemetry.
The driver's probe flow is modified such that it enters survivability mode
when pcode initialization is incomplete and boot status denotes a failure.
In this mode, drm card is not exposed and presence of survivability_mode
entry in PCI sysfs  is used to indicate survivability mode and
provide additional information required for debug

This patch adds initialization functions and exposes admin
readable sysfs entries

The new sysfs will have the below layout

	/sys/bus/.../bdf
             	     ├── survivability_mode

v2: reorder headers
    fix doc
    remove survivability info and use mode to display information
    use separate function for logging survivability information
    for critical error (Rodrigo)

v3: use for loop
    use dev logs instead of drm
    use helper function for aux history(Rodrigo)
    remove unnecessary error check of greater than max_scratch
    as we are reading only 3 bit

v4: fix checkpatch warnings
    fix space (Rodrigo)
    rename register

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Acked-by: Ashwin Kumar Kulkarni <ashwin.kumar.kulkarni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250128095632.1294722-2-riana.tauro@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-01-28 08:58:45 -05:00
Gustavo Sousa
f14d81b710 drm/i915/cmtg: Disable the CMTG
The CMTG is a timing generator that runs in parallel with transcoders
timing generators and can be used as a reference for synchronization.

We have observed that we are inheriting from GOP a display configuration
with the CMTG enabled. Because our driver doesn't currently implement
any CMTG sequences, the CMTG ends up still enabled after our driver
takes over.

We need to make sure that the CMTG is not enabled if we are not going to
use it. For that, let's add a partial implementation in our driver that
only cares about disabling the CMTG if it was found enabled during
initial hardware readout. In the future, we can also implement sequences
for using the CMTG if that becomes a needed feature.

For now, we only deal with cases when it is possible to disable the CMTG
without requiring a modeset. For earlier display versions, we simply
skip if we find the CMTG enabled and we can't disable it without a
proper modeset. In the future, we need to properly handle that case.

v2:
 - DG2 does not have the CMTG. Update HAS_CMTG() accordingly.
 - Update logic to force disabling of CMTG only for initial commit.
v3:
 - Add missing changes for v2 that were staged but not committed.
v4:
 - Avoid if/else duplication in intel_cmtg_dump_state() by using "n/a"
   for CMTG B enabled/disabled string for platforms without it. (Jani)
 - Prefer intel_cmtg_readout_hw_state() over intel_cmtg_readout_state().
   (Jani)
 - Use display struct instead of i915 as first parameter for
   TRANS_DDI_FUNC_CTL2(). (Jani)
 - Fewer continuation lines in variable declaration/initialization for
   better readability. (Jani)
 - Coding style improvements. (Jani)
 - Use drm_dbg_kms() instead of drm_info() for logging the disabling
   of the CMTG.
 - Make struct intel_cmtg_state entirely private to intel_cmtg.c.
v5:
 - Do the disable sequence as part of the sanitization step after
   hardware readout instead of initial modeset commit. (Jani)
 - Adapt to commit 1513358246 ("drm/i915/display: convert global state
   to struct intel_display") by using a display struct instead of i915
   as argument for intel_atomic_global_obj_init().
v6:
 - Do not track CMTG state as a global state. (Ville)
 - Simplify the driver logic by only disabling the CMTG only on cases
   when a modeset is not required. (Ville)
v7:
 - Remove the call to drm_WARN_ON() when checking
   intel_cmtg_disable_requires_modeset() and use a FIXME in the comment
   instead.
 - Remove the !HAS_CMTG() guard from intel_cmtg_get_config(), which is
   static and its caller is already protected by that same condition.
 - Also take the opportunity to put some Bspec references in the commit
   trailers section.
v8:
 - Use HAS_TRANSCODER() instead of intel_crtc_for_pipe(). (Ville)
 - Ensure transcoder power well is enabled before reading
   TRANS_DDI_FUNC_CTL2. (Ville)

Bspec: 68915, 49262
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250124173956.46534-1-gustavo.sousa@intel.com
2025-01-27 14:06:23 -03:00
Vinay Belgaumkar
011c1e246a drm/xe/pmu: Enable PMU interface
Basic PMU enabling patch. Setup the basic framework
for adding events.

Based on previous versions by Bommu Krishnaiah, Aravind Iddamsetty and
Riana Tauro, using i915 and rapl as reference implementations.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250124050411.2189060-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-01-27 08:54:06 -08:00
Ankit Nautiyal
5947642004 drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2
Add helpers to calculate the necessary parameters for configuring the
HDMI PLL for SNPS MPLLB and C10 PHY.

The pll parameters are computed for desired pixel clock, curve data
and other inputs used for interpolation and finally stored in the
pll_state.

Currently the helper is used to compute PLLs for DG2 SNPS PHY.
Support for computing Plls for C10 PHY is added in subsequent patches.

v2:
-Used kernel types instead of C99 types. (Jani)
-Fixed styling issues and renamed few variables to more meaningful
 names. (Jani)
-Added Xe make file changes. (Jani)
-Fixed build errors reported by kernel test robot

v3:
-Renamed helper to align with file name. (Jani)

v4:
-Removed erroraneous comment, and added Bspec# as part of trailer. (Suraj)
-Fixed warning flagged by kernel test robot.

Bspec: 54032
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250120042122.1029481-2-ankit.k.nautiyal@intel.com
2025-01-23 09:57:24 +05:30
Michal Wajdeczko
696bfdf273 drm/xe/guc: Introduce the GuC Buffer Cache
The purpose of the GuC Buffer Cache is to maintain a set ofreusable
buffers that could be used while sending some of the CTB H2G actions
that require separate buffer with indirect data. Currently only few
PF actions need this so initialize it only when running as a PF.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241220194205.995-9-michal.wajdeczko@intel.com
2025-01-19 00:12:03 +01:00
Imre Deak
73900dce57 drm/xe/dp: Enable DP tunneling
Enable the DP tunneling functionality in the xe driver.

v2: Keep using IS_ENABLED() for kconfig options. (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250114122857.1050090-1-imre.deak@intel.com
2025-01-16 20:32:35 +02:00
Jani Nikula
6f0f335b73 Merge drm/drm-next into drm-intel-next
Backmerge to get the DRM DP payload and ACT helpers to drm-intel-next.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-01-07 18:07:54 +02:00
Jani Nikula
adceb41688 drm/i915/display: add intel_display_conversion.c to hide stuff better
The __to_intel_display() generics require the definition of struct
drm_i915_private i.e. inclusion of i915_drv.h. Add
intel_display_conversion.c with a __i915_to_display() function to do the
conversion without the intel_display_conversion.h having an implicit
dependency on i915_drv.h.

The long term goal is to remove __to_intel_display() and the
intel_display_conversion.[ch] files altoghether, and this is merely a
transitional step to make the dependencies on i915_drv.h explicit.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/39e99b765b8c1a05d001659c39686a661ac268e2.1732104170.git.jani.nikula@intel.com
2024-12-16 18:09:35 +02:00
Michael J. Ruhl
0c45e76fcc
drm/xe/vsec: Support BMG devices
The Battlemage (BMG) discrete graphics card supports the Platform,
Monitoring Technology (PMT) feature directly on the primary PCI device.

Utilize the PMT callback API to add support for the BMG devices.

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203153639.2982162-1-michael.j.ruhl@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-12-03 15:02:55 -05:00
Rodrigo Vivi
8f109f287f
Merge drm/drm-next into drm-xe-next
A backmerge to get the PMT preparation work for
merging the BMG PMT support.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-12-02 11:22:11 -05:00
Tomasz Lis
6e6d7b41f9 drm/xe/vf: React to MIGRATED interrupt
To properly support VF Save/Restore procedure, fixups need to be
applied after PF driver finishes its part of VF Restore. The fixups
are required to adjust the ongoing execution for a hardware switch
that happened, because some GFX resources are not fully virtualized,
and assigned to a VF as range from a global pool. The VF on which
a VM is restored will often have different ranges provisioned than
the VF on which save process happened. Those resource fixups are
applied by the VF driver within a restored VM.

A VF driver gets informed that it was migrated by receiving an
interrupt from each GuC. The interrupt assigned for that purpose
is "GUC SW interrupt 0". Seeing that fields set from within the
irq handler should be the trigger for fixups.

The VF can safely do post-migration fixups on resources associated
to each GuC only after that GuC issued the MIGRATED interrupt.

This change introduces a worker to be used for post-migration fixups,
and a mechanism to schedule said worker when all GuCs sent the irq.

v2: renamed and moved functions, updated logged messages, removed
  unused includes, used anon struct (Michal)
v3: ordering, kerneldoc, asserts, debug messages,
  on_all_tiles -> on_all_gts (Michal)
v4: fixed missing header include
v5: Explained what fixups are, explained which IRQ is used, style
  fixes (Michal)

Bspec: 50868
Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241104213449.1455694-2-tomasz.lis@intel.com
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
2024-11-06 14:53:35 +01:00
Lucas De Marchi
a7238ee33c drm/xe: Add trace to lrc timestamp update
Help debugging when LRC timestamp is updated for a exec queue.

Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241104143815.2112272-2-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2024-11-05 13:38:46 -08:00
Ville Syrjälä
0f16cd2aad drm/i915/pfit: Extract intel_pfit.c
The panel fitter code doesn't really have much to do with the
rest of intel_panel.c, so extract it all into its own file.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241016143134.26903-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-10-23 18:22:37 +03:00
Dave Airlie
f1864235dd Merge tag 'drm-intel-next-2024-10-11' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next
drm/i915 features for v6.13:

[airlied: fixed build problem xe->display]
Features and functionality:
- Enable BMG and LNL+ ultra joiner support to join 2+2 pipes (Ankit, Stan)
- Enable 10bpc+CCS scanout for ICL+ and fp16+CCS scanout for TGL+ (Ville)
- Use DSB for plane/color management commits (Ville)
- Expose package temperature in hwmon (Raag)
- Add more Arrow Lake (ARL) PCI IDs (Dnyaneshwar)
- Add intel_display_caps debugfs for display capabilities and params (Jani)
- Debug log detected LTTPR PHY descriptors (Imre)

Refactoring and cleanups:
- Add intel_bo abstraction to remove drm/xe -Ddrm_i915_gem_object=xe_bo hack (Jani)
- IRQ enable/disable/suspend/resume cleanups (Rodrigo)
- Pre-SKL watermark/CxSR cleanups (Ville)
- Joiner refactoring and cleanups (Ankit, Stan)
- Unify PCI ROM vs. SPI flash VBT read code paths (Ville)
- Use the common gen3+ irq code for gen2 (Ville)
- Display include cleanups (Jani)
- Conversions from drm_i915_private to struct intel_display (Jani, Ville, Suraj)
- Convert wakeref_t underlying type to struct ref_tracker * (Jani)
- Hide VLV/CHV/BXT/GLK specific PPS handling better (Jani)
- Split out DP test request handling to a separate file (Jani)
- Add display snapshot abstraction for error state (Jani)
- Register macro cleanups (Jani)
- Add irq IMR/IER/IIR register triplet abstraction (Jani)
- Remove IS_LP() (Jani)
- Remove xe compat raw reg read/write support (Jani)
- Remove unused macro parameter (He Lugang)
- Fix typos and spelling (Yan Zhen, Shen Lichuan, Colin Ian King)
- Minor code fixes (Yuesong Li, Chen Ni)
- Minor modeset refactoring (Ville)

Fixes:
- Fix a number of DP 2.1 Panel Replay issues (Jouni)
- Fix drm/xe display lockdep issues on runtime suspend/resume (Suraj)
- Fix MTL C20 PHY PLL values for UHBR20 (Dnyaneshwar)
- Fix DP FEC enabling for UHBR rates (Chaitanya)
- Fix BMG supported UHBR rates (10 and 13.5) (Arun)
- Fix BMG CCS modifiers (Juha-Pekka)
- Fix AUX IO power enabling for eDP PSR (Imre)
- Add PSR workarounds (Jouni)
- Check for too low DSC BPC (Suraj)
- Improve HDCP wakeup robustness after suspend/resume (Suraj)
- Reduce ICP+ hotplug filter to 250 us to match DP spec (Suraj)
- Fix PSR sink enable sequence (Ville)
- Fix DP colorimetry detection (Ville)
- Apply i915gm/i945gm irq C-state workaround to CRC interrupts (Ville)

Merges:
- Backmerge to fix cross-tree conflicts (Jani)
- Backmerge to get v6.12-rc1 (Jani)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/878quu6go9.fsf@intel.com
2024-10-18 09:13:31 +10:00
Rodrigo Vivi
c141cf7691
Merge drm/drm-next into drm-intel-next
Needed to bring some KVM changes to be able to include a fix in our Kconfig.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-10-17 12:52:05 -04:00
Zhanjun Dong
9c8c7a7e6f drm/xe/guc: Prepare GuC register list and update ADS size for error capture
Add referenced registers defines and list of registers.
Update GuC ADS size allocation to include space for
the lists of error state capture register descriptors.

Then, populate GuC ADS with the lists of registers we want
GuC to report back to host on engine reset events. This list
should include global, engine-class and engine-instance
registers for every engine-class type on the current hardware.

Ensure we allocate a persistent storage for the register lists
that are populated into ADS so that we don't need to allocate
memory during GT resets when GuC is reloaded and ADS population
happens again.

Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241004193428.3311145-2-zhanjun.dong@intel.com
2024-10-08 09:34:04 -07:00
Ville Syrjälä
e622905020 drm/i915/bios: Extract soc/intel_rom.c
Abstract away the nuts and bolts of the SPI vs. PCI ROM
stuff, and hide it all in soc/intel_rom.c so that the
VBT code doesn't have to care about this stuff.

This leaves intel_bios.c with a single codepath that
can focus on the details related to the VBT layout.

This should have no functional changes.

v2: Rebase due to vbt_signature changes
    Drop unnecessary cast (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240923152453.11230-7-ville.syrjala@linux.intel.com
2024-10-01 17:30:58 +03:00