Commit Graph

17 Commits

Author SHA1 Message Date
Vivian Wang
57fa4ba6d0
riscv: dts: spacemit: Move eMMC under storage-bus for K1
SDHCI devices in Spacemit K1 use storage-bus translations. Move the node
emmc under storage-bus to reflect this fact.

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Link: https://lore.kernel.org/r/20250623-k1-dma-buses-rfc-wip-v1-3-c0144082061f@iscas.ac.cn
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09 13:49:27 +08:00
Vivian Wang
277f8525ed
riscv: dts: spacemit: Move UARTs under dma-bus for K1
UART devices in Spacemit K1 use dma-bus DMA translations. Move these
nodes under dma-bus to reflect this fact.

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Reviewed-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250623-k1-dma-buses-rfc-wip-v1-2-c0144082061f@iscas.ac.cn
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09 13:49:23 +08:00
Vivian Wang
2f793d0f8f
riscv: dts: spacemit: Add DMA translation buses for K1
The SpacemiT K1 has various static translations of DMA accesses. Add
these as simple-bus nodes with dma-ranges. Devices actually using these
translations will be added to or moved inside the bus nodes in later
patches.

The bus names are assigned according to consensus with SpacemiT [1].

Link: https://lore.kernel.org/r/CAH1PCMaC+imcMZCFYtRdmH6ge=dPgnANn_GqVfsGRS=+YhyJCw@mail.gmail.com [1]
Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Reviewed-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250623-k1-dma-buses-rfc-wip-v1-1-c0144082061f@iscas.ac.cn
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09 13:49:18 +08:00
Guodong Xu
c71dbeb4c0
riscv: dts: spacemit: add pwm14_1 pinctrl setting
This patch adds the option 1 (hence the name pwm14_1) pinctrl
configuration for PWM14 on the SpacemiT K1 SoC.

PWM14 option 1 is used for PWM-based backlight control on MIPI displays.
This configuration is present on all existing K1 development boards,
such as the Banana Pi BPI-F3 and the Milk-V Jupiter.

For reference, a more complete list of PWM0-PWM19 pinctrl configurations
including all options can be found in [1].

Note: Since the corresponding functionality for other pins is not yet
in use or ready for upstreaming, this patch includes only the pwm14_1
setting.

[1] https://lore.kernel.org/all/20250411131423.3802611-7-guodong@riscstar.com/

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250429085048.1310409-5-guodong@riscstar.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09 13:49:14 +08:00
Guodong Xu
66f56c7a64
riscv: dts: spacemit: add PWM support for K1 SoC
The SpacemiT K1 SoC features a PWM controller with 20 independent
channels. Add the corresponding 20 PWM nodes to the device tree.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250429085048.1310409-4-guodong@riscstar.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-09 13:49:06 +08:00
Alex Elder
2c0cf4fed0
riscv: dts: spacemit: add reset support for the K1 SoC
Define syscon nodes for the RCPU, RCPU2, and APBC2 SpacemiT CCUS, which
currently support resets but not clocks in the SpacemiT K1.

Signed-off-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250702113709.291748-7-elder@riscstar.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-07-04 08:44:56 +08:00
Yixun Lan
37df56ac50 riscv: dts: spacemit: enable eMMC for K1 SoC
Enable eMMC support for SpacemiT K1 SoC, successfully tested on
Bananapi-F3 board which shipped with a 16GB eMMC chip - KLMAG1JETD-B041.

Link: https://lore.kernel.org/r/20250523-22-k1-sdhci-v1-1-6e0adddf7494@gentoo.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-06-10 00:42:58 +08:00
Yixun Lan
3aa64cd126
riscv: dts: spacemit: add gpio LED for system heartbeat
Leverage GPIO to support system LED to indicate activity of CPUs.

Link: https://lore.kernel.org/r/20250424-03-k1-gpio-v9-3-eaece8cc5a86@gentoo.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-05-14 11:43:59 +08:00
Yixun Lan
5933312899
riscv: dts: spacemit: add gpio support for K1 SoC
Populate the GPIO node in the device tree for SpacemiT K1 SoC.
Each of 32 pins will act as one bank and map pins to pinctrl controller.

Link: https://lore.kernel.org/r/20250424-03-k1-gpio-v9-2-eaece8cc5a86@gentoo.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-05-14 11:43:55 +08:00
Yixun Lan
3b2802c2d6
riscv: dts: spacemit: Acquire clocks for UART
The K1 SoC features two clocks for UART controller, Acquire them
explicitly in the driver. Also it is required to remove the
clock-frequency properties from the uart node, otherwise the new
clock properties are ignored by of_platform_serial_setup() in "8250_of.c".

Reviewed-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Haylen Chu <heylenay@4d2.org>
Link: https://lore.kernel.org/r/20250424-05-dts-clock-v2-2-17d83a705c4c@gentoo.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-05-14 11:43:51 +08:00
Yixun Lan
c4f3c45a47
riscv: dts: spacemit: Acquire clocks for pinctrl
Pinctrl of K1 SoC need two clocks, so explicitly acquire them.

Reviewed-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Haylen Chu <heylenay@4d2.org>
Link: https://lore.kernel.org/r/20250424-05-dts-clock-v2-1-17d83a705c4c@gentoo.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-05-14 11:43:47 +08:00
Haylen Chu
a6fafa64b0
riscv: dts: spacemit: Add clock tree for SpacemiT K1
Describe the PLL and system controllers that're capable of generating
clock signals in the devicetree.

Signed-off-by: Haylen Chu <heylenay@4d2.org>
Reviewed-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250508111528.10508-2-heylenay@4d2.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-05-14 11:43:43 +08:00
Javier Martinez Canillas
5b90a3d609
riscv: dts: spacemit: Add Milk-V Jupiter board device tree
Add initial support for the Milk-V Jupiter board [1], which is a Mini ITX
computer based on the SpacemiT K1/M1 Octa-Core X60 64-bit RISC-V SoC [2].

There are two variant for this board, one using the K1 chip and another
using the M1 chip. The main difference is that the M1 can run at a higher
frequency than the K1, thanks to its packaging.

For now, only a DTS for the K1 variant is added since there isn't support
yet for the X60 cores operating performance and thermal trip points.

The support is minimal, but at least allows to boot into a serial console.

Link: https://milkv.io/jupiter [1]
Link: https://www.spacemit.com/en/key-stone-k1 [2]
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250214151700.666544-3-javierm@redhat.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-02-17 21:11:50 +08:00
Yixun Lan
3d72d603af riscv: dts: spacemit: move aliases to board dts
aliases info should belong to board dts, instead of
putting it at SoC dtsi file.

Fixes: d8fe646919 ("riscv: dts: add initial SpacemiT K1 SoC device tree")
Link: https://lore.kernel.org/all/6a8bb914-858e-479d-a7d9-09e0ff688160@app.fastmail.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-01-17 08:05:42 +08:00
Yixun Lan
3579b3506f riscv: dts: spacemit: add pinctrl property to uart0 in BPI-F3
Before pinctrl driver implemented, the uart0 controller reply on
bootloader for setting correct pin mux and configurations.

Now, let's add pinctrl property to uart0 of Bananapi-F3 board.

Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-01-17 07:53:52 +08:00
Yangyu Chen
d60d57ab6b riscv: dts: spacemit: add Banana Pi BPI-F3 board device tree
Banana Pi BPI-F3 [1] is a industrial grade RISC-V development board, it
design with SpacemiT K1 8 core RISC-V chip [2].

Currently only support booting into console with only uart enabled,
other features will be added soon later.

Link: https://docs.banana-pi.org/en/BPI-F3/BananaPi_BPI-F3 [1]
Link: https://www.spacemit.com/en/spacemit-key-stone-2/ [2]
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Acked-by: Jesse Taube <jesse@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-01-17 07:53:52 +08:00
Yangyu Chen
d8fe646919 riscv: dts: add initial SpacemiT K1 SoC device tree
Banana Pi BPI-F3 motherboard is powered by SpacemiT K1[1].

Key features:
- 4 cores per cluster, 2 clusters on chip
- UART IP is Intel XScale UART

Some key considerations:
- ISA string is inferred from vendor documentation[2]
- Cluster topology is inferred from datasheet[1] and L2 in vendor dts[3]
- No coherent DMA on this board
    Inferred by taking vendor ethernet and MMC drivers to the mainline
    kernel. Without dma-noncoherent in soc node, the driver fails.
- Add cache nodes
    K1 SoC has 128 sets of 32KiB L1 I/D Cache for each hart, and 512 sets
    of 512KiB L2 Cache for each cluster.

Currently only support booting into console with only uart, other
features will be added soon later.

Link: https://docs.banana-pi.org/en/BPI-F3/SpacemiT_K1_datasheet [1]
Link: https://developer.spacemit.com/#/documentation?token=BWbGwbx7liGW21kq9lucSA6Vnpb [2]
Link: https://gitee.com/bianbu-linux/linux-6.1/blob/bl-v1.0.y/arch/riscv/boot/dts/spacemit/k1-x.dtsi [3]
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Acked-by: Jesse Taube <jesse@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-01-17 07:53:52 +08:00