2 Commits

Author	SHA1	Message	Date
Dmitry Baryshkov	e59334a088	arm64: dts: qcom: sm8550: correct sleep clock frequency ... The SM8550 platform uses PMK8550 to provide sleep clock. According to the documentation, that clock has 32.7645 kHz frequency. Correct the sleep clock definition. Fixes: 0b12da4e28 ("arm64: dts: qcom: add base AIM300 dtsi") Fixes: b5e25ded27 ("arm64: dts: qcom: sm8550: add support for the SM8550-HDK board") Fixes: 71342fb91e ("arm64: dts: qcom: Add base SM8550 MTP dts") Fixes: d228efe884 ("arm64: dts: qcom: sm8550-qrd: add QRD8550") Fixes: ba2c082a40 ("arm64: dts: qcom: sm8550: Add support for Samsung Galaxy Z Fold5") Fixes: 39c596304e ("arm64: dts: qcom: Add SM8550 Xperia 1 V") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20241224-fix-board-clocks-v3-16-e9b08fbeadd3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2024-12-26 21:51:11 -06:00
Tengfei Fan	0b12da4e28	arm64: dts: qcom: add base AIM300 dtsi ... AIM300 Series is a highly optimized family of modules designed to support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip etc. Here is a diagram of AIM300 SoM: +----------------------------------------+ |AIM300 SoM | | | | +-----+ | | |--->| UFS | | | | +-----+ | | | | | | | 3.7v | +-----------------+ | +---------+ | ---------->| PMIC |----->| QCS8550 | | | +-----------------+ +---------+ | | | | | | | | | +-----+ | | |--->| ... | | | +-----+ | | | +----------------------------------------+ Co-developed-by: Fenglin Wu <quic_fenglinw@quicinc.com> Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20240618072202.2516025-4-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>	2024-06-21 00:55:18 -05:00