Commit Graph

27 Commits

Author SHA1 Message Date
André Apitzsch
cf3dcd80db arm64: dts: qcom: msm8976: Add sdc2 GPIOs
Downstream vendor code for reference:

https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/blob/LA.BR.1.3.7.c26/arch/arm/boot/dts/qcom/msm8976-pinctrl.dtsi#L223-263

Signed-off-by: André Apitzsch <git@apitzsch.eu>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250615-bqx5plus-v2-3-72b45c84237d@apitzsch.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18 15:55:12 -05:00
André Apitzsch
76270a18db arm64: dts: qcom: msm8976: Make blsp_dma controlled-remotely
The blsp_dma controller is shared between the different subsystems,
which is why it is already initialized by the firmware. We should not
reinitialize it from Linux to avoid potential other users of the DMA
engine to misbehave.

In mainline this can be described using the "qcom,controlled-remotely"
property. In the downstream/vendor kernel from Qualcomm there is an
opposite "qcom,managed-locally" property. This property is *not* set
for the qcom,sps-dma@7884000 and qcom,sps-dma@7ac4000 [1] so adding
"qcom,controlled-remotely" upstream matches the behavior of the
downstream/vendor kernel.

Adding this fixes booting Longcheer L9360.

[1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/blob/LA.BR.1.3.7.c26/arch/arm/boot/dts/qcom/msm8976.dtsi#L1149-1163

Fixes: 0484d3ce09 ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: André Apitzsch <git@apitzsch.eu>
Link: https://lore.kernel.org/r/20250615-bqx5plus-v2-1-72b45c84237d@apitzsch.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18 15:55:12 -05:00
Krzysztof Kozlowski
b06f27d09e arm64: dts: qcom: msm8976: Use the header with DSI phy clock IDs
Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-7-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-08 16:56:15 -05:00
Krzysztof Kozlowski
2df0741cee arm64: dts: qcom: msm: change labels to lower-case
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-2-0505bc7d2c56@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22 19:07:00 -05:00
Krzysztof Kozlowski
8a77bb1e14 arm64: dts: qcom: minor whitespace cleanup
The DTS code coding style expects exactly one space around '='
character.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240905-dts-cleanup-v1-4-f4c5f7b2c8c2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-05 22:18:59 -05:00
Barnabás Czémán
a13676eac2 arm64: dts: qcom: msm8976: Add restart node
Add a pshold restart node what can be found in downstream for
enable to perform restart operations.

Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/r/20240807-pshold-v1-1-0fa7927e99ce@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-14 21:58:52 -05:00
Dmitry Baryshkov
0b7d94e9d1 arm64: dts: qcom: add generic compat string to RPM glink channels
Add the generic qcom,smd-rpm / qcom,glink-smd-rpm compatible to RPM
nodes to follow the schema.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240729-fix-smd-rpm-v2-5-0776408a94c5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-14 21:41:50 -05:00
Luca Weiss
585141c57a arm64: dts: qcom: msm8976: Use mboxes in smsm node
With the smsm bindings and driver finally supporting mboxes, switch to
that and stop using apcs as syscon.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240619-smsm-mbox-dts-v1-5-268ab7eef779@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-23 15:56:22 -05:00
Konrad Dybcio
adfb64b78f arm64: dts: qcom: msm8976-*: Remove thermal zone polling delays
All of the thermal zone suppliers are interrupt-driven, remove the
bogus and unnecessary polling that only wastes CPU time.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240510-topic-msm-polling-cleanup-v2-7-436ca4218da2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-07 18:03:43 -05:00
Luca Weiss
a3d5570d8c arm64: dts: qcom: msm8976: Use mboxes properties for APCS
Instead of passing the syscon to the various nodes, use the mbox
interface using the mboxes property.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240424-apcs-mboxes-v1-6-6556c47cb501@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-04 15:20:52 -05:00
Rob Herring (Arm)
c8a346e408 arm64: dts: qcom: Split PMU nodes for heterogeneous CPUs
Arm heterogeneous configurations should have separate PMU nodes for each
CPU uarch as the uarch specific events can be different. The
"arm,armv8-pmuv3" compatible is also intended for s/w models rather than
specific uarch implementations.

All the kryo CPUs are missing PMU compatibles, so they can't be fixed.

Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20240417204247.3216703-1-robh@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-28 16:07:35 -05:00
Adam Skladowski
4587897322 arm64: dts: qcom: msm8976: Add WCNSS node
Add node describing wireless connectivity subsystem.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Link: https://lore.kernel.org/r/20240508163455.8757-5-a39.skl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 11:50:42 -05:00
Adam Skladowski
00e67d8e80 arm64: dts: qcom: msm8976: Add Adreno GPU
Add Adreno GPU node.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Link: https://lore.kernel.org/r/20240508163455.8757-4-a39.skl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 11:50:42 -05:00
Adam Skladowski
b0516dbf8e arm64: dts: qcom: msm8976: Add MDSS nodes
Add MDSS nodes to support displays on MSM8976 SoC.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Link: https://lore.kernel.org/r/20240508163455.8757-3-a39.skl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 11:50:42 -05:00
Adam Skladowski
418c2ffd7d arm64: dts: qcom: msm8976: Add IOMMU nodes
Add the nodes describing the apps and gpu iommu and its context banks
that are found on msm8976 SoCs.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Link: https://lore.kernel.org/r/20240508163455.8757-2-a39.skl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 11:50:42 -05:00
Adam Skladowski
684277525c arm64: dts: qcom: msm8976: Fix ipc bit shifts
Update bits to match downstream irq-bitmask values.

Fixes: 0484d3ce09 ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs")
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Link: https://lore.kernel.org/r/20230812112534.8610-8-a39.skl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-20 10:21:50 -07:00
Adam Skladowski
31c133b4a0 arm64: dts: qcom: msm8976: Split lpass region
MSM8976 downstream dts define reloc region which is used by pil-tz
to load both wcnss and lpass, on mainline however we might not be
able to do it and we need separate regions(also validating dts might get
problematic if we had to put memory-region(rproc node) per device).
Luckily it seems size and entry points in firmware headers appears
to be static across multiple devices including Sony Loire platform
and Xiaomi Redmi Note 3 Pro this should let us fit in first ~17MB
Split lpass region(reloc on downstream) into two separate regions.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Link: https://lore.kernel.org/r/20230812112534.8610-7-a39.skl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-20 10:21:50 -07:00
Krzysztof Kozlowski
b79663a551 arm64: dts: qcom: use defines for interrupts
Replace hard-coded interrupt parts (GIC, flags) with standard defines
for readability.  No changes in resulting DTBs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230730180638.23539-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-03 08:08:36 -07:00
Stephan Gerhold
091efd5633 arm64: dts: qcom: Add rpm-proc node for SMD platforms
Rather than having the RPM SMD channels as the only child of a dummy
SMD node, switch to representing the RPM as remoteproc like all the
other remoteprocs (WCNSS, modem DSP).

This allows assigning additional subdevices to it like the MPM
interrupt-controller or rpm-master-stats.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20230531-rpm-rproc-v3-10-a07dcdefd918@gerhold.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-13 22:19:09 -07:00
Linus Torvalds
6c1561fb90 ARM: SoC devicetree updates for 6.5
The biggest change this time is for the 32-bit devicetree files, which
 are all moved to a new location, using separate subdirectories for each
 SoC vendor, following the same scheme that is used on arm64, mips and
 riscv. This has been discussed for many years, but so far we never did
 this as there was a plan to move the files out of the kernel entirely,
 which has never happened.
 
 The impact of this will be that all external patches no longer apply,
 and anything depending on the location of the dtb files in the build
 directory will have to change. The installed files after 'make
 dtbs_install' keep the current location.
 
 There are six added SoCs here that are largely variants of previously
 added chips. Two other chips are added in a separate branch along
 with their device drivers.
 
 * The Samsung Exynos 4212 makes its return after the Samsung Galaxy
   Express phone is addded at last. The SoC support was originally
   added in 2012 but removed again in 2017 as it was unused at the time.
 
 * Amlogic C3 is a Cortex-A35 based smart IP camera chip
 
 * Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
   the still common MSM8916 (Snapdragon 410) phone chip that has been
   supported for a long time.
 
 * Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
   laptop chips, used in the Lenovo Flex 5G, which is added along with
   the reference board.
 
 * Qualcomm SDX75 is the latest generation modem chip that is used
   as a peripherial in phones but can also run a standalone Linux.  Unlike
   the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
 
 * Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie
   C910 core, a step up from all previously added rv64 chips.
 
 All of the above come with reference board implementations, those included
 there are 39 new board files, but only five more 32-bit this time, probably
 a new low:
 
 * Marantec Maveo board based on dhcor imx6ull module
 
 * Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
 
 * Epson Moverio BT-200 AR glasses based on TI OMAP4
 
 * PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
 
 * ICnova ADB4006 board based on Allwinner A20
 
 On the 64-bit side, there are also fewer addded machines than
 we had in the recent releases:
 
 * Three boards based on NXP i.MX8: Emtop SoM & Baseboard,
   NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice
   gw7905-2x device.
 
 * NVIDIA IGX Orin and Jetson Orin Nano boards, both based on
   tegra234
 
 * Qualcomm gains support for 6 reference boards on various members
   of their IPQ networking SoC series, as well as the Sony Xperia M4
   Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board
   on top of the various reference platforms for their new chips.
 
 * Rockchips support for several newer boards: Indiedroid Nova (rk3588),
   Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C
   Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S
   (rk3568)
 
 * TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin
   family with AM62 COM, carrier and dev boards
 
 Other changes to existing boards contain the usual minor improvements
 along with
 
 * continued updates to clean up dts files based on dtc warnings and
   binding checks, in particular cache properties and node names
 
 * support for devicetree overlays on at91, bcm283x
 
 * significant additions to existing SoC support on mediatek, qualcomm,
   ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1
 
 As usual, a lot more detail is available in the individual merge
 commits.
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Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The biggest change this time is for the 32-bit devicetree files, which
  are all moved to a new location, using separate subdirectories for
  each SoC vendor, following the same scheme that is used on arm64, mips
  and riscv. This has been discussed for many years, but so far we never
  did this as there was a plan to move the files out of the kernel
  entirely, which has never happened.

  The impact of this will be that all external patches no longer apply,
  and anything depending on the location of the dtb files in the build
  directory will have to change. The installed files after 'make
  dtbs_install' keep the current location.

  There are six added SoCs here that are largely variants of previously
  added chips. Two other chips are added in a separate branch along with
  their device drivers.

   - The Samsung Exynos 4212 makes its return after the Samsung Galaxy
     Express phone is addded at last. The SoC support was originally
     added in 2012 but removed again in 2017 as it was unused at the
     time.

   - Amlogic C3 is a Cortex-A35 based smart IP camera chip

   - Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
     the still common MSM8916 (Snapdragon 410) phone chip that has been
     supported for a long time.

   - Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
     laptop chips, used in the Lenovo Flex 5G, which is added along with
     the reference board.

   - Qualcomm SDX75 is the latest generation modem chip that is used as
     a peripherial in phones but can also run a standalone Linux. Unlike
     the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.

   - Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
     Xuantie C910 core, a step up from all previously added rv64 chips.

  All of the above come with reference board implementations, those
  included there are 39 new board files, but only five more 32-bit this
  time, probably a new low:

   - Marantec Maveo board based on dhcor imx6ull module

   - Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip

   - Epson Moverio BT-200 AR glasses based on TI OMAP4

   - PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM

   - ICnova ADB4006 board based on Allwinner A20

  On the 64-bit side, there are also fewer addded machines than we had
  in the recent releases:

   - Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
     EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.

   - NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234

   - Qualcomm gains support for 6 reference boards on various members of
     their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
     phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
     of the various reference platforms for their new chips.

   - Rockchips support for several newer boards: Indiedroid Nova
     (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
     NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
     Fastrhino R66S/R68S (rk3568)

   - TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
     Verdin family with AM62 COM, carrier and dev boards

  Other changes to existing boards contain the usual minor improvements
  along with

   - continued updates to clean up dts files based on dtc warnings and
     binding checks, in particular cache properties and node names

   - support for devicetree overlays on at91, bcm283x

   - significant additions to existing SoC support on mediatek,
     qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
     STM32MP1

  As usual, a lot more detail is available in the individual merge
  commits"

* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
  ARM: mvebu: fix unit address on armada-390-db flash
  ARM: dts: Move .dts files to vendor sub-directories
  kbuild: Support flat DTBs install
  ARM: dts: Add .dts files missing from the build
  ARM: dts: allwinner: Use quoted #include
  ARM: dts: lan966x: kontron-d10: add PHY interrupts
  ARM: dts: lan966x: kontron-d10: fix SPI CS
  ARM: dts: lan966x: kontron-d10: fix board reset
  ARM: dts: at91: Enable device-tree overlay support for AT91 boards
  arm: dts: Enable device-tree overlay support for AT91 boards
  arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
  ARM: dts: at91: use generic name for shutdown controller
  ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
  dt-bindings: firmware: brcm,kona-smc: convert to YAML
  riscv: dts: sort makefile entries by directory
  riscv: defconfig: enable T-HEAD SoC
  MAINTAINERS: add entry for T-HEAD RISC-V SoC
  riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
  riscv: dts: add initial T-HEAD TH1520 SoC device tree
  riscv: Add the T-HEAD SoC family Kconfig option
  ...
2023-06-29 15:07:06 -07:00
Krzysztof Kozlowski
80284797a4 arm64: dts: qcom: msm8976: correct MMC unit address
Match unit-address to reg entry to fix dtbs W=1 warnings:

  Warning (simple_bus_reg): /soc@0/mmc@7824000: simple-bus unit address format error, expected "7824900"
  Warning (simple_bus_reg): /soc@0/mmc@7864000: simple-bus unit address format error, expected "7864900"
  Warning (simple_bus_reg): /soc@0/mmc@7a24000: simple-bus unit address format error, expected "7a24900"

Fixes: 0484d3ce09 ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230419211856.79332-7-krzysztof.kozlowski@linaro.org
2023-05-24 21:50:45 -07:00
Krzysztof Kozlowski
9c6e72fb20 arm64: dts: qcom: add missing cache properties
Add required cache-level and cache-unified properties to fix warnings
like:

  qdu1000-idp.dtb: l3-cache: 'cache-unified' is a required property
  qdu1000-idp.dtb: l2-cache: 'cache-level' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416101134.95686-3-krzysztof.kozlowski@linaro.org
2023-05-17 19:21:26 -07:00
Krzysztof Kozlowski
81cd4883b1 arm64: dts: qcom: msm8976: add compatible fallback to mailbox
MSM8976 mailbox is compatible with MSM8994.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230322174148.810938-5-krzysztof.kozlowski@linaro.org
2023-04-07 11:40:01 -07:00
Adam Skladowski
4a2c9b9e12 arm64: dts: qcom: msm8976: Add and provide xo clk to rpmcc
In order for consumers of RPMCC XO clock to probe successfully
their parent needs to be feed with reference clock to obtain proper rate,
add fixed xo-board clock and supply it to rpmcc to make consumers happy.
Frequency setting is left per board basis just like on other recent trees.

Fixes: 0484d3ce09 ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs")
Fixes: ff7f6d34ca ("arm64: dts: qcom: Add support for SONY Xperia X/X Compact")
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Squashed the two patches]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230302123051.12440-1-a39.skl@gmail.com
Link: https://lore.kernel.org/r/20230302123051.12440-2-a39.skl@gmail.com
2023-03-15 17:28:01 -07:00
Krzysztof Kozlowski
d882778eb4 arm64: dts: qcom: drop incorrect cell-index from SPMI
The SPMI controller (PMIC Arbiter)) does not use nor allow 'cell-index'
property:

  sm8150-microsoft-surface-duo.dtb: spmi@c440000: Unevaluated properties are not allowed ('cell-index' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308125906.236885-1-krzysztof.kozlowski@linaro.org
2023-03-15 15:41:53 -07:00
Dmitry Baryshkov
4d403f7a90 arm64: dts: qcom: msm8976: specify per-sensor calibration cells
Specify pre-parsed per-sensor calibration nvmem cells in the tsens
device node rather than parsing the whole data blob in the driver.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230101194034.831222-18-dmitry.baryshkov@linaro.org
2023-01-18 17:33:10 -06:00
AngeloGioacchino Del Regno
0484d3ce09 arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs
This commit adds device trees for MSM8956 and MSM8976 SoCs.
They are *almost* identical, with minor differences, such as
MSM8956 having two A72 cores less.

However, there is a bug in Sony Loire bootloader that requires presence
of all 8 cores in the cpu{} node, so these will not be deleted.

Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Co-developed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111120156.48040-11-angelogioacchino.delregno@collabora.com
2022-12-06 11:05:29 -06:00