mirror of
https://github.com/rust-vmm/vhost-device.git
synced 2025-12-27 07:29:24 +00:00
i2c: Implement low level I2C helpers
This patch implements the low level I2C helpers responsible for transferring data and parsing the adapters and their clients. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
This commit is contained in:
parent
0142902927
commit
0eedf21f4e
@ -5,18 +5,383 @@
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//
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// SPDX-License-Identifier: Apache-2.0
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use std::io::Result;
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use libc::{c_ulong, ioctl, EADDRINUSE, EADDRNOTAVAIL, EINVAL};
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use std::fs::{File, OpenOptions};
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use std::os::unix::io::AsRawFd;
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use vmm_sys_util::errno::{errno_result, Error, Result};
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// The type of the `req` parameter is different for the `musl` library. This will enable
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// successful build for other non-musl libraries.
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#[cfg(target_env = "musl")]
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type IoctlRequest = libc::c_int;
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#[cfg(not(target_env = "musl"))]
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type IoctlRequest = c_ulong;
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/// Linux I2C/SMBUS definitions
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/// IOCTL commands
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/// NOTE: Slave address is 7 or 10 bits, but 10-bit addresses are NOT supported!
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/// (due to code brokenness)
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const I2C_SLAVE: IoctlRequest = 0x0703; // Use this slave address
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const I2C_FUNCS: IoctlRequest = 0x0705; // Get the adapter functionality mask
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const I2C_RDWR: IoctlRequest = 0x0707; // Combined R/W transfer (one STOP only)
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const I2C_SMBUS: IoctlRequest = 0x0720; // SMBus transfer
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/// Functions
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const I2C_FUNC_I2C: u64 = 0x00000001;
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const I2C_FUNC_SMBUS_READ_BYTE: u64 = 0x00020000;
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const I2C_FUNC_SMBUS_WRITE_BYTE: u64 = 0x00040000;
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const I2C_FUNC_SMBUS_READ_BYTE_DATA: u64 = 0x00080000;
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const I2C_FUNC_SMBUS_WRITE_BYTE_DATA: u64 = 0x00100000;
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const I2C_FUNC_SMBUS_READ_WORD_DATA: u64 = 0x00200000;
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const I2C_FUNC_SMBUS_WRITE_WORD_DATA: u64 = 0x00400000;
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const I2C_FUNC_SMBUS_BYTE: u64 = I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE;
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const I2C_FUNC_SMBUS_BYTE_DATA: u64 =
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I2C_FUNC_SMBUS_READ_BYTE_DATA | I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
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const I2C_FUNC_SMBUS_WORD_DATA: u64 =
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I2C_FUNC_SMBUS_READ_WORD_DATA | I2C_FUNC_SMBUS_WRITE_WORD_DATA;
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const I2C_FUNC_SMBUS_ALL: u64 =
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I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA;
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/// I2C protocol definitions
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pub const I2C_M_RD: u16 = 0x0001; // read data, from slave to master
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/// Copied (partially) from Linux's include/uapi/linux/i2c.h
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///
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/// I2cMsg - an I2C transaction segment beginning with START
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///
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/// @addr: Slave address, only 7 bit supported by virtio specification.
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///
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/// @flags:
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/// Supported by all adapters:
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/// %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001!
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///
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/// Optional:
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/// These aren't supported by virtio specification yet.
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///
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/// @len: Number of data bytes in @buf being read from or written to the I2C
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/// slave address.
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///
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/// @buf: The buffer into which data is read, or from which it's written.
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///
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/// An I2cMsg is the low level representation of one segment of an I2C
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/// transaction.
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///
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/// Each transaction begins with a START. That is followed by the slave
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/// address, and a bit encoding read versus write. Then follow all the
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/// data bytes, possibly including a byte with SMBus PEC. The transfer
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/// terminates with a NAK, or when all those bytes have been transferred
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/// and ACKed. If this is the last message in a group, it is followed by
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/// a STOP. Otherwise it is followed by the next @I2cMsg transaction
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/// segment, beginning with a (repeated) START.
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#[repr(C)]
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struct I2cMsg {
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addr: u16,
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flags: u16,
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len: u16,
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buf: *mut u8,
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}
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/// This is the structure as used in the I2C_RDWR ioctl call
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#[repr(C)]
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pub struct I2cRdwrIoctlData {
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msgs: *mut I2cMsg,
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nmsgs: u32,
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}
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/// SMBUS protocol definitions
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/// SMBUS read or write markers
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const I2C_SMBUS_WRITE: u8 = 0;
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const I2C_SMBUS_READ: u8 = 1;
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/// SMBus transaction types (size parameter in the above functions)
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const I2C_SMBUS_QUICK: u32 = 0;
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const I2C_SMBUS_BYTE: u32 = 1;
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const I2C_SMBUS_BYTE_DATA: u32 = 2;
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const I2C_SMBUS_WORD_DATA: u32 = 3;
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/// As specified in SMBus standard
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const I2C_SMBUS_BLOCK_MAX: usize = 32;
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#[repr(C)]
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union I2cSmbusData {
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byte: u8,
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word: u16,
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/// block[0] is used for length, and one more for user-space compatibility
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block: [u8; I2C_SMBUS_BLOCK_MAX + 2],
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}
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/// This is the structure as used in the I2C_SMBUS ioctl call
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#[repr(C)]
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pub struct I2cSmbusIoctlData {
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read_write: u8,
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command: u8,
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size: u32,
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data: *mut I2cSmbusData,
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}
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impl I2cSmbusIoctlData {
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/// Based on Linux's drivers/i2c/i2c-core-smbus.c:i2c_smbus_xfer_emulated().
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///
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/// These smbus related functions try to reverse what Linux does, only
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/// support basic modes (up to word transfer).
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fn new(reqs: &mut [I2cReq]) -> Result<I2cSmbusIoctlData> {
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let mut data = I2cSmbusData {
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block: [0; I2C_SMBUS_BLOCK_MAX + 2],
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};
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let read_write: u8;
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let size: u32;
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// Write messages have only one request message, while read messages
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// will have two (except for few special cases of I2C_SMBUS_QUICK and
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// I2C_SMBUS_BYTE, where only one request messages is sent).
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match reqs.len() {
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// Write requests (with some exceptions as mentioned above)
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1 => {
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if (reqs[0].flags & I2C_M_RD) != 0 {
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// Special Read requests, reqs[0].len can be 0 or 1 only.
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if reqs[0].len > 1 {
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println!(
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"Incorrect message length for read operation: {}",
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reqs[0].len
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);
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return Err(Error::new(EINVAL));
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}
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read_write = I2C_SMBUS_READ;
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} else {
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read_write = I2C_SMBUS_WRITE;
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}
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size = match reqs[0].len {
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// Special Read requests
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0 => I2C_SMBUS_QUICK,
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1 => I2C_SMBUS_BYTE,
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// Write requests
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2 => {
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data.byte = reqs[0].buf[1];
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I2C_SMBUS_BYTE_DATA
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}
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3 => {
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data.word = reqs[0].buf[1] as u16 | ((reqs[0].buf[2] as u16) << 8);
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I2C_SMBUS_WORD_DATA
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}
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_ => {
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println!(
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"Message length not supported for write operation: {}",
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reqs[0].len
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);
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return Err(Error::new(EINVAL));
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}
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}
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}
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// Read requests
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2 => {
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// The first request contains the command, so its length must be
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// set to 1 and shouldn't have I2C_M_RD set in flags.
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//
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// The second request contains the read buffer, so must have its
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// I2C_M_RD flag set. We don't support block transfers yet and
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// so its length shouldn't be greater than 2.
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if ((reqs[0].flags & I2C_M_RD) != 0)
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|| ((reqs[1].flags & I2C_M_RD) == 0)
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|| (reqs[0].len != 1)
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|| (reqs[1].len > 2)
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{
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println!(
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"Expecting a valid read smbus transfer: {:?}",
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(reqs.len(), reqs[0].len, reqs[1].len)
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);
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return Err(Error::new(EINVAL));
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}
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read_write = I2C_SMBUS_READ;
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if reqs[1].len == 1 {
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size = I2C_SMBUS_BYTE_DATA;
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} else {
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size = I2C_SMBUS_WORD_DATA;
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}
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}
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_ => {
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println!("Invalid number of messages for smbus xfer: {}", reqs.len());
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return Err(Error::new(EINVAL));
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}
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}
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Ok(I2cSmbusIoctlData {
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read_write,
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command: reqs[0].buf[0],
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size,
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data: &mut data,
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})
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}
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}
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/// I2C definitions
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pub struct I2cReq {
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pub addr: u16,
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pub flags: u16,
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pub len: u16,
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pub buf: Vec<u8>,
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}
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/// I2C adapter and helpers
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pub trait I2cAdapterTrait: Send + Sync + 'static {
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fn new(bus: &str) -> Result<Self>
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where
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Self: Sized;
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fn bus(&self) -> u32;
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fn is_smbus(&self) -> bool;
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/// Sets device's address for an I2C adapter.
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fn set_device_addr(&self, addr: usize) -> Result<()>;
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/// Gets adapter's functionality
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fn get_func(&mut self) -> Result<()>;
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/// Transfer data
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fn do_i2c_transfer(&self, data: &I2cRdwrIoctlData, addr: u16) -> Result<()>;
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fn do_smbus_transfer(&self, data: &I2cSmbusIoctlData, addr: u16) -> Result<()>;
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/// Perform I2C_RDWR transfer
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fn i2c_transfer(&self, reqs: &mut [I2cReq]) -> Result<()> {
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let mut msgs: Vec<I2cMsg> = Vec::with_capacity(reqs.len());
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let len = reqs.len();
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let addr = reqs[0].addr;
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for req in reqs {
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msgs.push(I2cMsg {
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addr: req.addr,
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flags: req.flags,
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len: req.len,
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buf: req.buf.as_mut_ptr(),
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});
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}
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let data = I2cRdwrIoctlData {
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msgs: msgs.as_mut_ptr(),
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nmsgs: len as u32,
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};
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self.do_i2c_transfer(&data, addr)
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}
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/// Perform I2C_SMBUS transfer
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fn smbus_transfer(&self, reqs: &mut [I2cReq]) -> Result<()> {
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let smbus_data = I2cSmbusIoctlData::new(reqs)?;
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self.do_smbus_transfer(&smbus_data, reqs[0].addr)?;
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if smbus_data.read_write == I2C_SMBUS_READ {
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unsafe {
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match smbus_data.size {
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I2C_SMBUS_BYTE => reqs[0].buf[0] = (*smbus_data.data).byte,
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I2C_SMBUS_BYTE_DATA => reqs[1].buf[0] = (*smbus_data.data).byte,
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I2C_SMBUS_WORD_DATA => {
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reqs[1].buf[0] = ((*smbus_data.data).word & 0xff) as u8;
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reqs[1].buf[1] = ((*smbus_data.data).word >> 8) as u8;
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}
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_ => {
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println!("Invalid SMBUS command: {}", smbus_data.size);
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return Err(Error::new(EINVAL));
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}
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}
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}
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}
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Ok(())
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}
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}
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pub struct I2cAdapter {
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fd: File,
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bus: u32,
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smbus: bool,
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}
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impl I2cAdapterTrait for I2cAdapter {
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fn new(bus: &str) -> Result<I2cAdapter> {
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let i2cdev = String::from("/dev/i2c-") + bus;
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Ok(I2cAdapter {
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bus: bus.parse::<u32>().map_err(|_| Error::new(EINVAL))?,
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smbus: false,
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fd: OpenOptions::new().read(true).write(true).open(i2cdev)?,
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})
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}
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fn bus(&self) -> u32 {
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self.bus
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}
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fn is_smbus(&self) -> bool {
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self.smbus
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}
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/// Sets device's address for an I2C adapter.
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fn set_device_addr(&self, addr: usize) -> Result<()> {
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let ret = unsafe { ioctl(self.fd.as_raw_fd(), I2C_SLAVE, addr as c_ulong) };
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if ret == -1 {
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println!("Failed to set device addr to {:x}", addr);
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errno_result()
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} else {
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Ok(())
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}
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}
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/// Gets adapter's functionality
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fn get_func(&mut self) -> Result<()> {
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let func: u64 = I2C_FUNC_SMBUS_ALL;
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let ret = unsafe { ioctl(self.fd.as_raw_fd(), I2C_FUNCS, &func) };
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if ret == -1 {
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println!("Failed to get I2C function");
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return errno_result();
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}
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if (func & I2C_FUNC_I2C) != 0 {
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self.smbus = false;
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} else if (func & I2C_FUNC_SMBUS_ALL) != 0 {
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self.smbus = true;
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} else {
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println!("Invalid functionality {:x}", func);
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return Err(Error::new(EINVAL));
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}
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Ok(())
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}
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/// Transfer data
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fn do_i2c_transfer(&self, data: &I2cRdwrIoctlData, addr: u16) -> Result<()> {
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let ret = unsafe { ioctl(self.fd.as_raw_fd(), I2C_RDWR, data) };
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if ret == -1 {
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println!("Failed to transfer i2c data to device addr to {:x}", addr);
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errno_result()
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} else {
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Ok(())
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}
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}
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fn do_smbus_transfer(&self, data: &I2cSmbusIoctlData, addr: u16) -> Result<()> {
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let ret = unsafe { ioctl(self.fd.as_raw_fd(), I2C_SMBUS, data) };
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if ret == -1 {
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println!("Failed to transfer smbus data to device addr to {:x}", addr);
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return errno_result();
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}
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Ok(())
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}
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}
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/// I2C map and helpers
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@ -29,13 +394,75 @@ pub struct I2cMap<A: I2cAdapterTrait> {
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}
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impl<A: I2cAdapterTrait> I2cMap<A> {
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pub fn new(_list: &str) -> Result<Self> {
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let device_map: [u32; MAX_I2C_VDEV] = [I2C_INVALID_ADAPTER; MAX_I2C_VDEV];
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let adapters: Vec<A> = Vec::new();
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pub fn new(list: &str) -> Result<Self>
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where
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Self: Sized,
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{
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let mut device_map: [u32; MAX_I2C_VDEV] = [I2C_INVALID_ADAPTER; MAX_I2C_VDEV];
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let mut adapters: Vec<A> = Vec::new();
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let busses: Vec<&str> = list.split(',').collect();
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for (i, businfo) in busses.iter().enumerate() {
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let list: Vec<&str> = businfo.split(':').collect();
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let mut adapter = A::new(list[0])?;
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let devices = &list[1..];
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adapter.get_func()?;
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for device in devices {
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let device = device.parse::<usize>().map_err(|_| Error::new(EINVAL))?;
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if device > MAX_I2C_VDEV {
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println!("Invalid device address {}", device);
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return Err(Error::new(EADDRNOTAVAIL));
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}
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if device_map[device] != I2C_INVALID_ADAPTER {
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println!(
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"Client address {} is already used by {}",
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device,
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adapters[device_map[device] as usize].bus()
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);
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return Err(Error::new(EADDRINUSE));
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}
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adapter.set_device_addr(device)?;
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device_map[device] = i as u32;
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}
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println!(
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"Added I2C master with bus id: {:x} for devices: {:?}",
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adapter.bus(),
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devices
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);
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adapters.push(adapter);
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}
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Ok(I2cMap {
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adapters,
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device_map,
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})
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}
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pub fn transfer(&self, reqs: &mut [I2cReq]) -> Result<()> {
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let device = reqs[0].addr as usize;
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let index = self.device_map[device];
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// This can happen a lot while scanning the bus, don't print any errors.
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if index == I2C_INVALID_ADAPTER {
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return Err(Error::new(EINVAL));
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}
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let adapter = &self.adapters[index as usize];
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// Set device's address
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adapter.set_device_addr(device)?;
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if adapter.is_smbus() {
|
||||
adapter.smbus_transfer(reqs)
|
||||
} else {
|
||||
adapter.i2c_transfer(reqs)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user