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5b0c40f746
Move code not dependent on mips_def_t from cpu_mips_init() into a QOM initfn, as a start. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
70 lines
1.8 KiB
C
70 lines
1.8 KiB
C
/*
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* QEMU MIPS CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "cpu.h"
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#include "qemu-common.h"
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/* CPUClass::reset() */
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static void mips_cpu_reset(CPUState *s)
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{
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MIPSCPU *cpu = MIPS_CPU(s);
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MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(cpu);
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CPUMIPSState *env = &cpu->env;
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mcc->parent_reset(s);
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cpu_state_reset(env);
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}
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static void mips_cpu_initfn(Object *obj)
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{
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MIPSCPU *cpu = MIPS_CPU(obj);
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CPUMIPSState *env = &cpu->env;
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cpu_exec_init(env);
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}
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static void mips_cpu_class_init(ObjectClass *c, void *data)
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{
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MIPSCPUClass *mcc = MIPS_CPU_CLASS(c);
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CPUClass *cc = CPU_CLASS(c);
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mcc->parent_reset = cc->reset;
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cc->reset = mips_cpu_reset;
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}
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static const TypeInfo mips_cpu_type_info = {
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.name = TYPE_MIPS_CPU,
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.parent = TYPE_CPU,
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.instance_size = sizeof(MIPSCPU),
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.instance_init = mips_cpu_initfn,
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.abstract = false,
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.class_size = sizeof(MIPSCPUClass),
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.class_init = mips_cpu_class_init,
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};
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static void mips_cpu_register_types(void)
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{
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type_register_static(&mips_cpu_type_info);
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}
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type_init(mips_cpu_register_types)
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