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afcb737512
qemu/target-sparc
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Tsuneo Saito afcb737512 SPARC64: fix VIS1 SIMD signed compare instructions 
The destination registers of SIMD signed compare instructions
(fcmp*<16|32>) are not FP registers but general purpose r registers.
Comparisons should be freg_rs1 CMP freg_rs2, that were reversed.

Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-20 20:44:23 +00:00
..
cpu.h Sparc: fix FPU and AM enable checks for translation 2011-07-14 17:30:43 +00:00
exec.h Move cpu_has_work and cpu_pc_from_tb to cpu.h 2011-06-26 18:25:31 +00:00
helper.c Remove exec-all.h include directives 2011-06-26 18:25:35 +00:00
helper.h SPARC64: fix VIS1 SIMD signed compare instructions 2011-07-20 20:44:23 +00:00
machine.c Remove exec-all.h include directives 2011-06-26 18:25:35 +00:00
op_helper.c SPARC64: fix VIS1 SIMD signed compare instructions 2011-07-20 20:44:23 +00:00
TODO Remove unnecessary trailing newlines 2008-12-13 09:32:43 +00:00
translate.c SPARC64: fix VIS1 SIMD signed compare instructions 2011-07-20 20:44:23 +00:00