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qemu/target-mips
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Nathan Froyd bbfa8f72e9 target-mips: add microMIPS exception handler support 
Unlike MIPS16, microMIPS lets you choose the ISA mode for your exception
handlers.  The ISA mode is selectable via a user-writable CP0.Config3
flag.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09 16:10:51 +02:00
..
cpu.h target-mips: add microMIPS exception handler support 2010-06-09 16:10:51 +02:00
exec.h kill regs_to_env and env_to_regs 2010-01-19 16:31:02 -06:00
helper.c target-mips: add microMIPS exception handler support 2010-06-09 16:10:51 +02:00
helper.h target-mips: microMIPS ASE support 2010-06-09 16:10:50 +02:00
machine.c target-mips: rename CP0_LLAddr into lladdr 2009-11-22 14:12:13 +01:00
mips-defs.h target-mips: microMIPS ASE support 2010-06-09 16:10:50 +02:00
op_helper.c target-mips: microMIPS ASE support 2010-06-09 16:10:50 +02:00
TODO target-mips: add copyright notice for mips16 work 2009-12-13 20:20:20 +01:00
translate_init.c target-mips: No MIPS16 support for 4Kc, 4KEc cores 2009-12-17 00:28:58 +01:00
translate.c target-mips: microMIPS ASE support 2010-06-09 16:10:50 +02:00