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		39bffca203
		
	
	
	
	
		
			
			This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
		
			
				
	
	
		
			103 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			103 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  IOAPIC emulation logic - internal interfaces
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|  *
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|  *  Copyright (c) 2004-2005 Fabrice Bellard
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|  *  Copyright (c) 2009      Xiantao Zhang, Intel
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|  *  Copyright (c) 2011 Jan Kiszka, Siemens AG
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|  *
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|  * This library is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU Lesser General Public
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|  * License as published by the Free Software Foundation; either
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|  * version 2 of the License, or (at your option) any later version.
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|  *
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|  * This library is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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|  * Lesser General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU Lesser General Public
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|  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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|  */
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| 
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| #ifndef QEMU_IOAPIC_INTERNAL_H
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| #define QEMU_IOAPIC_INTERNAL_H
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| 
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| #include "hw.h"
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| #include "memory.h"
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| #include "sysbus.h"
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| 
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| #define MAX_IOAPICS                     1
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| 
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| #define IOAPIC_VERSION                  0x11
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| 
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| #define IOAPIC_LVT_DEST_SHIFT           56
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| #define IOAPIC_LVT_MASKED_SHIFT         16
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| #define IOAPIC_LVT_TRIGGER_MODE_SHIFT   15
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| #define IOAPIC_LVT_REMOTE_IRR_SHIFT     14
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| #define IOAPIC_LVT_POLARITY_SHIFT       13
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| #define IOAPIC_LVT_DELIV_STATUS_SHIFT   12
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| #define IOAPIC_LVT_DEST_MODE_SHIFT      11
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| #define IOAPIC_LVT_DELIV_MODE_SHIFT     8
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| 
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| #define IOAPIC_LVT_MASKED               (1 << IOAPIC_LVT_MASKED_SHIFT)
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| #define IOAPIC_LVT_REMOTE_IRR           (1 << IOAPIC_LVT_REMOTE_IRR_SHIFT)
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| 
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| #define IOAPIC_TRIGGER_EDGE             0
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| #define IOAPIC_TRIGGER_LEVEL            1
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| 
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| /*io{apic,sapic} delivery mode*/
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| #define IOAPIC_DM_FIXED                 0x0
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| #define IOAPIC_DM_LOWEST_PRIORITY       0x1
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| #define IOAPIC_DM_PMI                   0x2
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| #define IOAPIC_DM_NMI                   0x4
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| #define IOAPIC_DM_INIT                  0x5
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| #define IOAPIC_DM_SIPI                  0x6
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| #define IOAPIC_DM_EXTINT                0x7
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| #define IOAPIC_DM_MASK                  0x7
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| 
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| #define IOAPIC_VECTOR_MASK              0xff
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| 
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| #define IOAPIC_IOREGSEL                 0x00
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| #define IOAPIC_IOWIN                    0x10
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| 
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| #define IOAPIC_REG_ID                   0x00
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| #define IOAPIC_REG_VER                  0x01
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| #define IOAPIC_REG_ARB                  0x02
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| #define IOAPIC_REG_REDTBL_BASE          0x10
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| #define IOAPIC_ID                       0x00
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| 
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| #define IOAPIC_ID_SHIFT                 24
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| #define IOAPIC_ID_MASK                  0xf
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| 
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| #define IOAPIC_VER_ENTRIES_SHIFT        16
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| 
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| typedef struct IOAPICCommonState IOAPICCommonState;
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| 
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| #define TYPE_IOAPIC_COMMON "ioapic-common"
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| #define IOAPIC_COMMON(obj) \
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|      OBJECT_CHECK(IOAPICCommonState, (obj), TYPE_IOAPIC_COMMON)
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| #define IOAPIC_COMMON_CLASS(klass) \
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|      OBJECT_CLASS_CHECK(IOAPICCommonClass, (klass), TYPE_IOAPIC_COMMON)
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| #define IOAPIC_COMMON_GET_CLASS(obj) \
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|      OBJECT_GET_CLASS(IOAPICCommonClass, (obj), TYPE_IOAPIC_COMMON)
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| 
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| typedef struct IOAPICCommonClass {
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|     SysBusDeviceClass parent_class;
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|     void (*init)(IOAPICCommonState *s, int instance_no);
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|     void (*pre_save)(IOAPICCommonState *s);
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|     void (*post_load)(IOAPICCommonState *s);
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| } IOAPICCommonClass;
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| 
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| struct IOAPICCommonState {
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|     SysBusDevice busdev;
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|     MemoryRegion io_memory;
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|     uint8_t id;
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|     uint8_t ioregsel;
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|     uint32_t irr;
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|     uint64_t ioredtbl[IOAPIC_NUM_PINS];
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| };
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| 
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| void ioapic_reset_common(DeviceState *dev);
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| 
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| #endif /* !QEMU_IOAPIC_INTERNAL_H */
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