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	 2507c12ab0
			
		
	
	
		2507c12ab0
		
	
	
	
	
		
			
			As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
		
			
				
	
	
		
			94 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			94 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * QEMU Empty Slot
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|  *
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|  * The empty_slot device emulates known to a bus but not connected devices.
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|  *
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|  * Copyright (c) 2010 Artyom Tarasenko
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|  *
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|  * This code is licensed under the GNU GPL v2 or (at your option) any later
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|  * version.
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|  */
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| 
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| #include "hw.h"
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| #include "sysbus.h"
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| #include "empty_slot.h"
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| 
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| //#define DEBUG_EMPTY_SLOT
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| 
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| #ifdef DEBUG_EMPTY_SLOT
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| #define DPRINTF(fmt, ...)                                       \
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|     do { printf("empty_slot: " fmt , ## __VA_ARGS__); } while (0)
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| #else
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| #define DPRINTF(fmt, ...) do {} while (0)
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| #endif
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| 
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| typedef struct EmptySlot {
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|     SysBusDevice busdev;
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|     uint64_t size;
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| } EmptySlot;
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| 
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| static uint32_t empty_slot_readl(void *opaque, target_phys_addr_t addr)
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| {
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|     DPRINTF("read from " TARGET_FMT_plx "\n", addr);
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|     return 0;
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| }
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| 
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| static void empty_slot_writel(void *opaque, target_phys_addr_t addr,
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|                               uint32_t val)
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| {
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|     DPRINTF("write 0x%x to " TARGET_FMT_plx "\n", val, addr);
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| }
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| 
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| CPUReadMemoryFunc * const empty_slot_read[3] = {
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|     empty_slot_readl,
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|     empty_slot_readl,
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|     empty_slot_readl,
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| };
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| 
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| static CPUWriteMemoryFunc * const empty_slot_write[3] = {
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|     empty_slot_writel,
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|     empty_slot_writel,
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|     empty_slot_writel,
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| };
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| 
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| void empty_slot_init(target_phys_addr_t addr, uint64_t slot_size)
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| {
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|     DeviceState *dev;
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|     SysBusDevice *s;
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|     EmptySlot *e;
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| 
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|     dev = qdev_create(NULL, "empty_slot");
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|     s = sysbus_from_qdev(dev);
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|     e = FROM_SYSBUS(EmptySlot, s);
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|     e->size = slot_size;
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| 
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|     qdev_init_nofail(dev);
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| 
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|     sysbus_mmio_map(s, 0, addr);
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| }
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| 
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| static int empty_slot_init1(SysBusDevice *dev)
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| {
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|     EmptySlot *s = FROM_SYSBUS(EmptySlot, dev);
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|     ram_addr_t empty_slot_offset;
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| 
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|     empty_slot_offset = cpu_register_io_memory(empty_slot_read,
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|                                                empty_slot_write, s,
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|                                                DEVICE_NATIVE_ENDIAN);
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|     sysbus_init_mmio(dev, s->size, empty_slot_offset | IO_MEM_RAM);
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|     return 0;
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| }
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| 
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| static SysBusDeviceInfo empty_slot_info = {
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|     .init = empty_slot_init1,
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|     .qdev.name  = "empty_slot",
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|     .qdev.size  = sizeof(EmptySlot),
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| };
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| 
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| static void empty_slot_register_devices(void)
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| {
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|     sysbus_register_withprop(&empty_slot_info);
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| }
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| 
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| device_init(empty_slot_register_devices);
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