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	 a2cb15b0dd
			
		
	
	
		a2cb15b0dd
		
	
	
	
	
		
			
			update all users so we can remove the makefile hack. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
		
			
				
	
	
		
			303 lines
		
	
	
		
			8.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			303 lines
		
	
	
		
			8.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef XEN_PT_H
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| #define XEN_PT_H
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| 
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| #include "qemu-common.h"
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| #include "xen_common.h"
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| #include "pci/pci.h"
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| #include "xen-host-pci-device.h"
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| 
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| void xen_pt_log(const PCIDevice *d, const char *f, ...) GCC_FMT_ATTR(2, 3);
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| 
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| #define XEN_PT_ERR(d, _f, _a...) xen_pt_log(d, "%s: Error: "_f, __func__, ##_a)
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| 
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| #ifdef XEN_PT_LOGGING_ENABLED
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| #  define XEN_PT_LOG(d, _f, _a...)  xen_pt_log(d, "%s: " _f, __func__, ##_a)
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| #  define XEN_PT_WARN(d, _f, _a...) \
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|     xen_pt_log(d, "%s: Warning: "_f, __func__, ##_a)
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| #else
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| #  define XEN_PT_LOG(d, _f, _a...)
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| #  define XEN_PT_WARN(d, _f, _a...)
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| #endif
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| 
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| #ifdef XEN_PT_DEBUG_PCI_CONFIG_ACCESS
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| #  define XEN_PT_LOG_CONFIG(d, addr, val, len) \
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|     xen_pt_log(d, "%s: address=0x%04x val=0x%08x len=%d\n", \
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|                __func__, addr, val, len)
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| #else
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| #  define XEN_PT_LOG_CONFIG(d, addr, val, len)
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| #endif
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| 
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| 
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| /* Helper */
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| #define XEN_PFN(x) ((x) >> XC_PAGE_SHIFT)
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| 
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| typedef struct XenPTRegInfo XenPTRegInfo;
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| typedef struct XenPTReg XenPTReg;
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| 
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| typedef struct XenPCIPassthroughState XenPCIPassthroughState;
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| 
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| /* function type for config reg */
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| typedef int (*xen_pt_conf_reg_init)
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|     (XenPCIPassthroughState *, XenPTRegInfo *, uint32_t real_offset,
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|      uint32_t *data);
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| typedef int (*xen_pt_conf_dword_write)
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|     (XenPCIPassthroughState *, XenPTReg *cfg_entry,
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|      uint32_t *val, uint32_t dev_value, uint32_t valid_mask);
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| typedef int (*xen_pt_conf_word_write)
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|     (XenPCIPassthroughState *, XenPTReg *cfg_entry,
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|      uint16_t *val, uint16_t dev_value, uint16_t valid_mask);
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| typedef int (*xen_pt_conf_byte_write)
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|     (XenPCIPassthroughState *, XenPTReg *cfg_entry,
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|      uint8_t *val, uint8_t dev_value, uint8_t valid_mask);
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| typedef int (*xen_pt_conf_dword_read)
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|     (XenPCIPassthroughState *, XenPTReg *cfg_entry,
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|      uint32_t *val, uint32_t valid_mask);
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| typedef int (*xen_pt_conf_word_read)
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|     (XenPCIPassthroughState *, XenPTReg *cfg_entry,
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|      uint16_t *val, uint16_t valid_mask);
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| typedef int (*xen_pt_conf_byte_read)
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|     (XenPCIPassthroughState *, XenPTReg *cfg_entry,
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|      uint8_t *val, uint8_t valid_mask);
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| 
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| #define XEN_PT_BAR_ALLF 0xFFFFFFFF
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| #define XEN_PT_BAR_UNMAPPED (-1)
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| 
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| #define PCI_CAP_MAX 48
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| 
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| 
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| typedef enum {
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|     XEN_PT_GRP_TYPE_HARDWIRED = 0,  /* 0 Hardwired reg group */
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|     XEN_PT_GRP_TYPE_EMU,            /* emul reg group */
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| } XenPTRegisterGroupType;
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| 
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| typedef enum {
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|     XEN_PT_BAR_FLAG_MEM = 0,        /* Memory type BAR */
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|     XEN_PT_BAR_FLAG_IO,             /* I/O type BAR */
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|     XEN_PT_BAR_FLAG_UPPER,          /* upper 64bit BAR */
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|     XEN_PT_BAR_FLAG_UNUSED,         /* unused BAR */
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| } XenPTBarFlag;
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| 
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| 
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| typedef struct XenPTRegion {
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|     /* BAR flag */
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|     XenPTBarFlag bar_flag;
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|     /* Translation of the emulated address */
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|     union {
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|         uint64_t maddr;
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|         uint64_t pio_base;
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|         uint64_t u;
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|     } access;
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| } XenPTRegion;
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| 
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| /* XenPTRegInfo declaration
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|  * - only for emulated register (either a part or whole bit).
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|  * - for passthrough register that need special behavior (like interacting with
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|  *   other component), set emu_mask to all 0 and specify r/w func properly.
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|  * - do NOT use ALL F for init_val, otherwise the tbl will not be registered.
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|  */
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| 
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| /* emulated register information */
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| struct XenPTRegInfo {
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|     uint32_t offset;
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|     uint32_t size;
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|     uint32_t init_val;
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|     /* reg read only field mask (ON:RO/ROS, OFF:other) */
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|     uint32_t ro_mask;
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|     /* reg emulate field mask (ON:emu, OFF:passthrough) */
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|     uint32_t emu_mask;
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|     /* no write back allowed */
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|     uint32_t no_wb;
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|     xen_pt_conf_reg_init init;
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|     /* read/write function pointer
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|      * for double_word/word/byte size */
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|     union {
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|         struct {
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|             xen_pt_conf_dword_write write;
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|             xen_pt_conf_dword_read read;
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|         } dw;
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|         struct {
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|             xen_pt_conf_word_write write;
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|             xen_pt_conf_word_read read;
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|         } w;
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|         struct {
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|             xen_pt_conf_byte_write write;
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|             xen_pt_conf_byte_read read;
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|         } b;
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|     } u;
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| };
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| 
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| /* emulated register management */
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| struct XenPTReg {
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|     QLIST_ENTRY(XenPTReg) entries;
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|     XenPTRegInfo *reg;
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|     uint32_t data; /* emulated value */
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| };
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| 
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| typedef struct XenPTRegGroupInfo XenPTRegGroupInfo;
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| 
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| /* emul reg group size initialize method */
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| typedef int (*xen_pt_reg_size_init_fn)
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|     (XenPCIPassthroughState *, const XenPTRegGroupInfo *,
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|      uint32_t base_offset, uint8_t *size);
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| 
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| /* emulated register group information */
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| struct XenPTRegGroupInfo {
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|     uint8_t grp_id;
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|     XenPTRegisterGroupType grp_type;
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|     uint8_t grp_size;
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|     xen_pt_reg_size_init_fn size_init;
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|     XenPTRegInfo *emu_regs;
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| };
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| 
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| /* emul register group management table */
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| typedef struct XenPTRegGroup {
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|     QLIST_ENTRY(XenPTRegGroup) entries;
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|     const XenPTRegGroupInfo *reg_grp;
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|     uint32_t base_offset;
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|     uint8_t size;
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|     QLIST_HEAD(, XenPTReg) reg_tbl_list;
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| } XenPTRegGroup;
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| 
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| 
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| #define XEN_PT_UNASSIGNED_PIRQ (-1)
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| typedef struct XenPTMSI {
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|     uint16_t flags;
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|     uint32_t addr_lo;  /* guest message address */
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|     uint32_t addr_hi;  /* guest message upper address */
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|     uint16_t data;     /* guest message data */
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|     uint32_t ctrl_offset; /* saved control offset */
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|     int pirq;          /* guest pirq corresponding */
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|     bool initialized;  /* when guest MSI is initialized */
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|     bool mapped;       /* when pirq is mapped */
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| } XenPTMSI;
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| 
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| typedef struct XenPTMSIXEntry {
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|     int pirq;
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|     uint64_t addr;
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|     uint32_t data;
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|     uint32_t vector_ctrl;
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|     bool updated; /* indicate whether MSI ADDR or DATA is updated */
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| } XenPTMSIXEntry;
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| typedef struct XenPTMSIX {
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|     uint32_t ctrl_offset;
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|     bool enabled;
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|     int total_entries;
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|     int bar_index;
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|     uint64_t table_base;
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|     uint32_t table_offset_adjust; /* page align mmap */
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|     uint64_t mmio_base_addr;
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|     MemoryRegion mmio;
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|     void *phys_iomem_base;
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|     XenPTMSIXEntry msix_entry[0];
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| } XenPTMSIX;
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| 
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| struct XenPCIPassthroughState {
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|     PCIDevice dev;
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| 
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|     PCIHostDeviceAddress hostaddr;
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|     bool is_virtfn;
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|     XenHostPCIDevice real_device;
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|     XenPTRegion bases[PCI_NUM_REGIONS]; /* Access regions */
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|     QLIST_HEAD(, XenPTRegGroup) reg_grps;
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| 
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|     uint32_t machine_irq;
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| 
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|     XenPTMSI *msi;
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|     XenPTMSIX *msix;
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| 
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|     MemoryRegion bar[PCI_NUM_REGIONS - 1];
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|     MemoryRegion rom;
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| 
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|     MemoryListener memory_listener;
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|     MemoryListener io_listener;
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| };
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| 
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| int xen_pt_config_init(XenPCIPassthroughState *s);
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| void xen_pt_config_delete(XenPCIPassthroughState *s);
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| XenPTRegGroup *xen_pt_find_reg_grp(XenPCIPassthroughState *s, uint32_t address);
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| XenPTReg *xen_pt_find_reg(XenPTRegGroup *reg_grp, uint32_t address);
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| int xen_pt_bar_offset_to_index(uint32_t offset);
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| 
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| static inline pcibus_t xen_pt_get_emul_size(XenPTBarFlag flag, pcibus_t r_size)
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| {
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|     /* align resource size (memory type only) */
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|     if (flag == XEN_PT_BAR_FLAG_MEM) {
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|         return (r_size + XC_PAGE_SIZE - 1) & XC_PAGE_MASK;
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|     } else {
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|         return r_size;
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|     }
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| }
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| 
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| /* INTx */
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| /* The PCI Local Bus Specification, Rev. 3.0,
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|  * Section 6.2.4 Miscellaneous Registers, pp 223
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|  * outlines 5 valid values for the interrupt pin (intx).
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|  *  0: For devices (or device functions) that don't use an interrupt in
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|  *  1: INTA#
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|  *  2: INTB#
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|  *  3: INTC#
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|  *  4: INTD#
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|  *
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|  * Xen uses the following 4 values for intx
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|  *  0: INTA#
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|  *  1: INTB#
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|  *  2: INTC#
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|  *  3: INTD#
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|  *
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|  * Observing that these list of values are not the same, xen_pt_pci_read_intx()
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|  * uses the following mapping from hw to xen values.
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|  * This seems to reflect the current usage within Xen.
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|  *
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|  * PCI hardware    | Xen | Notes
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|  * ----------------+-----+----------------------------------------------------
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|  * 0               | 0   | No interrupt
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|  * 1               | 0   | INTA#
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|  * 2               | 1   | INTB#
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|  * 3               | 2   | INTC#
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|  * 4               | 3   | INTD#
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|  * any other value | 0   | This should never happen, log error message
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|  */
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| 
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| static inline uint8_t xen_pt_pci_read_intx(XenPCIPassthroughState *s)
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| {
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|     uint8_t v = 0;
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|     xen_host_pci_get_byte(&s->real_device, PCI_INTERRUPT_PIN, &v);
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|     return v;
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| }
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| 
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| static inline uint8_t xen_pt_pci_intx(XenPCIPassthroughState *s)
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| {
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|     uint8_t r_val = xen_pt_pci_read_intx(s);
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| 
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|     XEN_PT_LOG(&s->dev, "intx=%i\n", r_val);
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|     if (r_val < 1 || r_val > 4) {
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|         XEN_PT_LOG(&s->dev, "Interrupt pin read from hardware is out of range:"
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|                    " value=%i, acceptable range is 1 - 4\n", r_val);
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|         r_val = 0;
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|     } else {
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|         r_val -= 1;
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|     }
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| 
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|     return r_val;
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| }
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| 
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| /* MSI/MSI-X */
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| int xen_pt_msi_set_enable(XenPCIPassthroughState *s, bool en);
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| int xen_pt_msi_setup(XenPCIPassthroughState *s);
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| int xen_pt_msi_update(XenPCIPassthroughState *d);
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| void xen_pt_msi_disable(XenPCIPassthroughState *s);
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| 
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| int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base);
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| void xen_pt_msix_delete(XenPCIPassthroughState *s);
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| int xen_pt_msix_update(XenPCIPassthroughState *s);
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| int xen_pt_msix_update_remap(XenPCIPassthroughState *s, int bar_index);
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| void xen_pt_msix_disable(XenPCIPassthroughState *s);
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| 
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| static inline bool xen_pt_has_msix_mapping(XenPCIPassthroughState *s, int bar)
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| {
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|     return s->msix && s->msix->bar_index == bar;
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| }
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| 
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| 
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| #endif /* !XEN_PT_H */
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