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We should translate AArch64 mode separately from AArch32 mode. In AArch64 mode, registers look vastly different, instruction encoding is completely different, basically the system turns into a different machine. So let's do a simple if() in translate.c to decide whether we can handle the current code in the legacy AArch32 code or in the new AArch64 code. So far, the translation always complains about unallocated instructions. There is no emulator functionality in this patch! Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-11-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-5-git-send-email-john.rigby@linaro.org [PMM: * provide no-op versions of a64 functions ifndef TARGET_AARCH64; this lets us avoid #ifdefs in translate.c * insert the missing call to disas_a64_insn() * stash the insn in the DisasContext rather than reloading it in real_unallocated_encoding() ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
115 lines
3.0 KiB
C
115 lines
3.0 KiB
C
/*
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* QEMU AArch64 CPU
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*
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* Copyright (c) 2013 Linaro Ltd
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see
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* <http://www.gnu.org/licenses/gpl-2.0.html>
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*/
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#include "cpu.h"
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#include "qemu-common.h"
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#if !defined(CONFIG_USER_ONLY)
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#include "hw/loader.h"
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#endif
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#include "hw/arm/arm.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/kvm.h"
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static inline void set_feature(CPUARMState *env, int feature)
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{
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env->features |= 1ULL << feature;
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}
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#ifdef CONFIG_USER_ONLY
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static void aarch64_any_initfn(Object *obj)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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set_feature(&cpu->env, ARM_FEATURE_V8);
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set_feature(&cpu->env, ARM_FEATURE_VFP4);
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set_feature(&cpu->env, ARM_FEATURE_VFP_FP16);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
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set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
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set_feature(&cpu->env, ARM_FEATURE_V7MP);
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set_feature(&cpu->env, ARM_FEATURE_AARCH64);
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}
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#endif
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typedef struct ARMCPUInfo {
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const char *name;
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void (*initfn)(Object *obj);
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void (*class_init)(ObjectClass *oc, void *data);
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} ARMCPUInfo;
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static const ARMCPUInfo aarch64_cpus[] = {
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#ifdef CONFIG_USER_ONLY
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{ .name = "any", .initfn = aarch64_any_initfn },
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#endif
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};
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static void aarch64_cpu_initfn(Object *obj)
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{
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}
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static void aarch64_cpu_finalizefn(Object *obj)
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{
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}
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static void aarch64_cpu_class_init(ObjectClass *oc, void *data)
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{
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CPUClass *cc = CPU_CLASS(oc);
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cc->dump_state = aarch64_cpu_dump_state;
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}
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static void aarch64_cpu_register(const ARMCPUInfo *info)
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{
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TypeInfo type_info = {
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.parent = TYPE_AARCH64_CPU,
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.instance_size = sizeof(ARMCPU),
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.instance_init = info->initfn,
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.class_size = sizeof(ARMCPUClass),
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.class_init = info->class_init,
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};
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type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name);
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type_register(&type_info);
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g_free((void *)type_info.name);
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}
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static const TypeInfo aarch64_cpu_type_info = {
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.name = TYPE_AARCH64_CPU,
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.parent = TYPE_ARM_CPU,
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.instance_size = sizeof(ARMCPU),
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.instance_init = aarch64_cpu_initfn,
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.instance_finalize = aarch64_cpu_finalizefn,
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.abstract = true,
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.class_size = sizeof(AArch64CPUClass),
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.class_init = aarch64_cpu_class_init,
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};
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static void aarch64_cpu_register_types(void)
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{
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int i;
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type_register_static(&aarch64_cpu_type_info);
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for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
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aarch64_cpu_register(&aarch64_cpus[i]);
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}
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}
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type_init(aarch64_cpu_register_types)
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