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2 Commits

Author SHA1 Message Date
Max Filippov
f3df4c04d8 target-xtensa: implement CPENABLE and PRID SRs 
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2011-09-10 16:57:39 +00:00
Max Filippov
7b039f741c target-xtensa: add sample board 
Sample board and sample CPU core are used for debug and may be used for
development of custom SoC emulators.

This board has two fixed size memory regions for DTCM and ITCM and
variable length SRAM region.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2011-09-10 16:57:36 +00:00