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3 Commits

Author SHA1 Message Date
Richard Henderson
9c76219eaa irq: Introduce CPU_INTERRUPT_TGT_* defines. 
These defines will be place-holders for cpu-specific functionality.
Generic code will, at the end of the patch series, no longer have to
concern itself about how SMI, NMI, etc should be handled.  Instead,
generic code will know only that the interrupt is internal or external.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2011-05-08 16:55:23 +00:00
Michael Walle
81ea0e1304 LatticeMico32 target support 
This patch adds support for the LatticeMico32 softcore processor by Lattice
Semiconductor.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 2011-03-07 13:42:36 +01:00
Paolo Bonzini
37b76cfd93 move targphys.h and hw/poison.h inclusion to cpu-common.h 
With more files from outside the hw/ directory being placed into
libhw, avoid the need to include hw/hw.h for the sake of targ_phys_addr_t.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2010-04-09 18:55:55 +02:00