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usb/hcd-ehci: Split off instance_init from realize
This makes the mem MemoryRegion available to derived instance_inits. Keep the bus in realize for now since naming breaks in instance_init. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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08f4c90b28
commit
d4614cc312
@ -60,20 +60,28 @@ static int usb_ehci_pci_initfn(PCIDevice *dev)
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pci_conf[0x6e] = 0x00;
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pci_conf[0x6e] = 0x00;
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pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
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pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
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s->caps[0x09] = 0x68; /* EECP */
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s->irq = dev->irq[3];
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s->irq = dev->irq[3];
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s->as = pci_get_address_space(dev);
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s->as = pci_get_address_space(dev);
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s->capsbase = 0x00;
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s->opregbase = 0x20;
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usb_ehci_realize(s, DEVICE(dev), NULL);
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usb_ehci_realize(s, DEVICE(dev), NULL);
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pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
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pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
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return 0;
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return 0;
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}
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}
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static void usb_ehci_pci_init(Object *obj)
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{
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EHCIPCIState *i = PCI_EHCI(obj);
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EHCIState *s = &i->ehci;
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s->caps[0x09] = 0x68; /* EECP */
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s->capsbase = 0x00;
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s->opregbase = 0x20;
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usb_ehci_init(s, DEVICE(obj));
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}
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static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
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static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
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uint32_t val, int l)
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uint32_t val, int l)
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{
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{
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@ -122,6 +130,7 @@ static const TypeInfo ehci_pci_type_info = {
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.name = TYPE_PCI_EHCI,
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.name = TYPE_PCI_EHCI,
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.parent = TYPE_PCI_DEVICE,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(EHCIPCIState),
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.instance_size = sizeof(EHCIPCIState),
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.instance_init = usb_ehci_pci_init,
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.abstract = true,
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.abstract = true,
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.class_init = ehci_class_init,
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.class_init = ehci_class_init,
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};
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};
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@ -36,15 +36,24 @@ static void usb_ehci_sysbus_realize(DeviceState *dev, Error **errp)
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{
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{
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SysBusDevice *d = SYS_BUS_DEVICE(dev);
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SysBusDevice *d = SYS_BUS_DEVICE(dev);
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EHCISysBusState *i = SYS_BUS_EHCI(dev);
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EHCISysBusState *i = SYS_BUS_EHCI(dev);
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SysBusEHCIClass *sec = SYS_BUS_EHCI_GET_CLASS(dev);
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EHCIState *s = &i->ehci;
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usb_ehci_realize(s, dev, errp);
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sysbus_init_irq(d, &s->irq);
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}
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static void ehci_sysbus_init(Object *obj)
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{
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SysBusDevice *d = SYS_BUS_DEVICE(obj);
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EHCISysBusState *i = SYS_BUS_EHCI(obj);
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SysBusEHCIClass *sec = SYS_BUS_EHCI_GET_CLASS(obj);
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EHCIState *s = &i->ehci;
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EHCIState *s = &i->ehci;
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s->capsbase = sec->capsbase;
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s->capsbase = sec->capsbase;
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s->opregbase = sec->opregbase;
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s->opregbase = sec->opregbase;
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s->as = &address_space_memory;
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s->as = &address_space_memory;
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usb_ehci_realize(s, dev, errp);
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usb_ehci_init(s, DEVICE(obj));
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sysbus_init_irq(d, &s->irq);
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sysbus_init_mmio(d, &s->mem);
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sysbus_init_mmio(d, &s->mem);
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}
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}
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@ -61,6 +70,7 @@ static const TypeInfo ehci_type_info = {
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.name = TYPE_SYS_BUS_EHCI,
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.name = TYPE_SYS_BUS_EHCI,
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(EHCISysBusState),
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.instance_size = sizeof(EHCISysBusState),
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.instance_init = ehci_sysbus_init,
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.abstract = true,
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.abstract = true,
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.class_init = ehci_sysbus_class_init,
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.class_init = ehci_sysbus_class_init,
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.class_size = sizeof(SysBusEHCIClass),
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.class_size = sizeof(SysBusEHCIClass),
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@ -2512,6 +2512,22 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp)
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{
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{
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int i;
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int i;
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usb_bus_new(&s->bus, &ehci_bus_ops, dev);
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for (i = 0; i < NB_PORTS; i++) {
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usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
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USB_SPEED_MASK_HIGH);
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s->ports[i].dev = 0;
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}
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s->frame_timer = qemu_new_timer_ns(vm_clock, ehci_frame_timer, s);
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s->async_bh = qemu_bh_new(ehci_frame_timer, s);
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qemu_register_reset(ehci_reset, s);
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qemu_add_vm_change_state_handler(usb_ehci_vm_state_change, s);
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}
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void usb_ehci_init(EHCIState *s, DeviceState *dev)
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{
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/* 2.2 host controller interface version */
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/* 2.2 host controller interface version */
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s->caps[0x00] = (uint8_t)(s->opregbase - s->capsbase);
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s->caps[0x00] = (uint8_t)(s->opregbase - s->capsbase);
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s->caps[0x01] = 0x00;
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s->caps[0x01] = 0x00;
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@ -2525,22 +2541,10 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp)
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s->caps[0x0a] = 0x00;
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s->caps[0x0a] = 0x00;
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s->caps[0x0b] = 0x00;
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s->caps[0x0b] = 0x00;
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usb_bus_new(&s->bus, &ehci_bus_ops, dev);
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for(i = 0; i < NB_PORTS; i++) {
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usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
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USB_SPEED_MASK_HIGH);
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s->ports[i].dev = 0;
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}
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s->frame_timer = qemu_new_timer_ns(vm_clock, ehci_frame_timer, s);
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s->async_bh = qemu_bh_new(ehci_frame_timer, s);
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QTAILQ_INIT(&s->aqueues);
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QTAILQ_INIT(&s->aqueues);
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QTAILQ_INIT(&s->pqueues);
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QTAILQ_INIT(&s->pqueues);
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usb_packet_init(&s->ipacket);
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usb_packet_init(&s->ipacket);
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qemu_register_reset(ehci_reset, s);
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qemu_add_vm_change_state_handler(usb_ehci_vm_state_change, s);
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memory_region_init(&s->mem, "ehci", MMIO_SIZE);
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memory_region_init(&s->mem, "ehci", MMIO_SIZE);
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memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
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memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
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"capabilities", CAPA_SIZE);
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"capabilities", CAPA_SIZE);
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@ -322,6 +322,7 @@ struct EHCIState {
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extern const VMStateDescription vmstate_ehci;
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extern const VMStateDescription vmstate_ehci;
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void usb_ehci_init(EHCIState *s, DeviceState *dev);
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void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp);
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void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp);
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#define TYPE_PCI_EHCI "pci-ehci-usb"
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#define TYPE_PCI_EHCI "pci-ehci-usb"
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