proxmox-mirrors/qemu
1
0
Fork 0
mirror of https://git.proxmox.com/git/qemu synced 2025-08-07 07:30:33 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

target-mips: optimize gen_trap()

Browse Source 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6937 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-03-29 01:19:02 +00:00
parent 1ba74fb8f1
commit cdc0faa66a
1 changed files with 12 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
target-mips/translate.c
View File

@ -2166,7 +2166,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
int rs, int rt, int16_t imm) int rs, int rt, int16_t imm)
{ {
int cond; int cond;
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new(); TCGv t1 = tcg_temp_new();
cond = 0; cond = 0;
@ -2208,7 +2208,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
case OPC_TGEU: /* rs >= rs unsigned */ case OPC_TGEU: /* rs >= rs unsigned */
case OPC_TGEIU: /* r0 >= 0 unsigned */ case OPC_TGEIU: /* r0 >= 0 unsigned */
/* Always trap */ /* Always trap */
tcg_gen_movi_tl(t0, 1); generate_exception(ctx, EXCP_TRAP);
break; break;
case OPC_TLT: /* rs < rs */ case OPC_TLT: /* rs < rs */
case OPC_TLTI: /* r0 < 0 */ case OPC_TLTI: /* r0 < 0 */
@ -2217,54 +2217,40 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
case OPC_TNE: /* rs != rs */ case OPC_TNE: /* rs != rs */
case OPC_TNEI: /* r0 != 0 */ case OPC_TNEI: /* r0 != 0 */
/* Never trap: treat as NOP. */ /* Never trap: treat as NOP. */
goto out; break;
default:
MIPS_INVAL("trap");
generate_exception(ctx, EXCP_RI);
goto out;
} }
} else { } else {
int l1 = gen_new_label();
switch (opc) { switch (opc) {
case OPC_TEQ: case OPC_TEQ:
case OPC_TEQI: case OPC_TEQI:
gen_op_eq(t0, t0, t1); tcg_gen_brcond_tl(TCG_COND_NE, t0, t1, l1);
break; break;
case OPC_TGE: case OPC_TGE:
case OPC_TGEI: case OPC_TGEI:
gen_op_ge(t0, t0, t1); tcg_gen_brcond_tl(TCG_COND_LT, t0, t1, l1);
break; break;
case OPC_TGEU: case OPC_TGEU:
case OPC_TGEIU: case OPC_TGEIU:
gen_op_geu(t0, t0, t1); tcg_gen_brcond_tl(TCG_COND_LTU, t0, t1, l1);
break; break;
case OPC_TLT: case OPC_TLT:
case OPC_TLTI: case OPC_TLTI:
gen_op_lt(t0, t0, t1); tcg_gen_brcond_tl(TCG_COND_GE, t0, t1, l1);
break; break;
case OPC_TLTU: case OPC_TLTU:
case OPC_TLTIU: case OPC_TLTIU:
gen_op_ltu(t0, t0, t1); tcg_gen_brcond_tl(TCG_COND_GEU, t0, t1, l1);
break; break;
case OPC_TNE: case OPC_TNE:
case OPC_TNEI: case OPC_TNEI:
gen_op_ne(t0, t0, t1); tcg_gen_brcond_tl(TCG_COND_EQ, t0, t1, l1);
break; break;
default:
MIPS_INVAL("trap");
generate_exception(ctx, EXCP_RI);
goto out;
} }
} generate_exception(ctx, EXCP_TRAP);
save_cpu_state(ctx, 1);
{
int l1 = gen_new_label();
tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1);
gen_helper_0i(raise_exception, EXCP_TRAP);
gen_set_label(l1); gen_set_label(l1);
} }
ctx->bstate = BS_STOP;
out:
tcg_temp_free(t0); tcg_temp_free(t0);
tcg_temp_free(t1); tcg_temp_free(t1);
} }