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Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
# By Jan Kiszka (4) and Marcelo Tosatti (1) # Via Marcelo Tosatti * qemu-kvm/uq/master: vmxcap: Update according to SDM of January 2013 target-i386: kvm: save/restore steal time MSR vmxcap: Report APIC register emulation and RDTSCP control vmxcap: Augment reported information vmxcap: Open MSR file in unbuffered mode Message-id: cover.1366253306.git.mtosatti@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
commit
b6c99f8a6d
@ -27,9 +27,9 @@ MSR_IA32_VMX_VMFUNC = 0x491
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class msr(object):
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class msr(object):
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def __init__(self):
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def __init__(self):
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try:
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try:
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self.f = file('/dev/cpu/0/msr')
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self.f = open('/dev/cpu/0/msr', 'r', 0)
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except:
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except:
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self.f = file('/dev/msr0')
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self.f = open('/dev/msr0', 'r', 0)
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def read(self, index, default = None):
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def read(self, index, default = None):
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import struct
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import struct
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self.f.seek(index)
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self.f.seek(index)
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@ -96,6 +96,19 @@ class Misc(object):
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print ' %-40s %s' % (self.bits[bits], fmt(v))
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print ' %-40s %s' % (self.bits[bits], fmt(v))
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controls = [
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controls = [
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Misc(
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name = 'Basic VMX Information',
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bits = {
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(0, 31): 'Revision',
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(32,44): 'VMCS size',
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48: 'VMCS restricted to 32 bit addresses',
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49: 'Dual-monitor support',
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(50, 53): 'VMCS memory type',
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54: 'INS/OUTS instruction information',
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55: 'IA32_VMX_TRUE_*_CTLS support',
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},
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msr = MSR_IA32_VMX_BASIC,
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),
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Control(
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Control(
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name = 'pin-based controls',
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name = 'pin-based controls',
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bits = {
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bits = {
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@ -103,6 +116,7 @@ controls = [
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3: 'NMI exiting',
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3: 'NMI exiting',
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5: 'Virtual NMIs',
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5: 'Virtual NMIs',
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6: 'Activate VMX-preemption timer',
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6: 'Activate VMX-preemption timer',
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7: 'Process posted interrupts',
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},
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},
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cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
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cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
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true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
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true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
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@ -143,15 +157,19 @@ controls = [
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0: 'Virtualize APIC accesses',
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0: 'Virtualize APIC accesses',
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1: 'Enable EPT',
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1: 'Enable EPT',
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2: 'Descriptor-table exiting',
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2: 'Descriptor-table exiting',
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3: 'Enable RDTSCP',
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4: 'Virtualize x2APIC mode',
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4: 'Virtualize x2APIC mode',
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5: 'Enable VPID',
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5: 'Enable VPID',
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6: 'WBINVD exiting',
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6: 'WBINVD exiting',
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7: 'Unrestricted guest',
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7: 'Unrestricted guest',
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8: 'APIC register emulation',
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9: 'Virtual interrupt delivery',
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9: 'Virtual interrupt delivery',
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10: 'PAUSE-loop exiting',
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10: 'PAUSE-loop exiting',
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11: 'RDRAND exiting',
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11: 'RDRAND exiting',
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12: 'Enable INVPCID',
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12: 'Enable INVPCID',
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13: 'Enable VM functions',
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13: 'Enable VM functions',
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14: 'VMCS shadowing',
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18: 'EPT-violation #VE'
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},
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},
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cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
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cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
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),
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),
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@ -196,10 +214,12 @@ controls = [
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6: 'HLT activity state',
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6: 'HLT activity state',
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7: 'Shutdown activity state',
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7: 'Shutdown activity state',
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8: 'Wait-for-SIPI activity state',
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8: 'Wait-for-SIPI activity state',
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15: 'IA32_SMBASE support',
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(16,24): 'Number of CR3-target values',
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(16,24): 'Number of CR3-target values',
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(25,27): 'MSR-load/store count recommenation',
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(25,27): 'MSR-load/store count recommenation',
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28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
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28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
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(32,62): 'MSEG revision identifier',
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29: 'VMWRITE to VM-exit information fields',
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(32,63): 'MSEG revision identifier',
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},
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},
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msr = MSR_IA32_VMX_MISC_CTLS,
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msr = MSR_IA32_VMX_MISC_CTLS,
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),
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),
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@ -803,6 +803,7 @@ typedef struct CPUX86State {
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#endif
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#endif
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uint64_t system_time_msr;
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uint64_t system_time_msr;
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uint64_t wall_clock_msr;
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uint64_t wall_clock_msr;
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uint64_t steal_time_msr;
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uint64_t async_pf_en_msr;
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uint64_t async_pf_en_msr;
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uint64_t pv_eoi_en_msr;
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uint64_t pv_eoi_en_msr;
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@ -68,6 +68,7 @@ static bool has_msr_tsc_deadline;
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static bool has_msr_async_pf_en;
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static bool has_msr_async_pf_en;
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static bool has_msr_pv_eoi_en;
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static bool has_msr_pv_eoi_en;
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static bool has_msr_misc_enable;
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static bool has_msr_misc_enable;
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static bool has_msr_kvm_steal_time;
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static int lm_capable_kernel;
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static int lm_capable_kernel;
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bool kvm_allows_irq0_override(void)
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bool kvm_allows_irq0_override(void)
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@ -507,6 +508,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
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has_msr_pv_eoi_en = c->eax & (1 << KVM_FEATURE_PV_EOI);
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has_msr_pv_eoi_en = c->eax & (1 << KVM_FEATURE_PV_EOI);
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has_msr_kvm_steal_time = c->eax & (1 << KVM_FEATURE_STEAL_TIME);
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cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
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cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
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for (i = 0; i <= limit; i++) {
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for (i = 0; i <= limit; i++) {
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@ -1107,6 +1110,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
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kvm_msr_entry_set(&msrs[n++], MSR_KVM_PV_EOI_EN,
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kvm_msr_entry_set(&msrs[n++], MSR_KVM_PV_EOI_EN,
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env->pv_eoi_en_msr);
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env->pv_eoi_en_msr);
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}
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}
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if (has_msr_kvm_steal_time) {
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kvm_msr_entry_set(&msrs[n++], MSR_KVM_STEAL_TIME,
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env->steal_time_msr);
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}
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if (hyperv_hypercall_available()) {
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if (hyperv_hypercall_available()) {
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kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_GUEST_OS_ID, 0);
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kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_GUEST_OS_ID, 0);
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kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL, 0);
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kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL, 0);
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@ -1360,6 +1367,9 @@ static int kvm_get_msrs(X86CPU *cpu)
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if (has_msr_pv_eoi_en) {
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if (has_msr_pv_eoi_en) {
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msrs[n++].index = MSR_KVM_PV_EOI_EN;
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msrs[n++].index = MSR_KVM_PV_EOI_EN;
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}
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}
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if (has_msr_kvm_steal_time) {
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msrs[n++].index = MSR_KVM_STEAL_TIME;
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}
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if (env->mcg_cap) {
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if (env->mcg_cap) {
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msrs[n++].index = MSR_MCG_STATUS;
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msrs[n++].index = MSR_MCG_STATUS;
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@ -1445,6 +1455,9 @@ static int kvm_get_msrs(X86CPU *cpu)
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case MSR_KVM_PV_EOI_EN:
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case MSR_KVM_PV_EOI_EN:
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env->pv_eoi_en_msr = msrs[i].data;
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env->pv_eoi_en_msr = msrs[i].data;
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break;
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break;
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case MSR_KVM_STEAL_TIME:
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env->steal_time_msr = msrs[i].data;
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break;
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}
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}
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}
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}
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@ -292,6 +292,24 @@ static bool pv_eoi_msr_needed(void *opaque)
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return cpu->env.pv_eoi_en_msr != 0;
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return cpu->env.pv_eoi_en_msr != 0;
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}
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}
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static bool steal_time_msr_needed(void *opaque)
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{
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CPUX86State *cpu = opaque;
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return cpu->steal_time_msr != 0;
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}
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static const VMStateDescription vmstate_steal_time_msr = {
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.name = "cpu/steal_time_msr",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT64(steal_time_msr, CPUX86State),
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VMSTATE_END_OF_LIST()
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}
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};
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static const VMStateDescription vmstate_async_pf_msr = {
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static const VMStateDescription vmstate_async_pf_msr = {
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.name = "cpu/async_pf_msr",
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.name = "cpu/async_pf_msr",
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.version_id = 1,
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.version_id = 1,
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@ -502,6 +520,9 @@ const VMStateDescription vmstate_x86_cpu = {
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} , {
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} , {
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.vmsd = &vmstate_pv_eoi_msr,
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.vmsd = &vmstate_pv_eoi_msr,
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.needed = pv_eoi_msr_needed,
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.needed = pv_eoi_msr_needed,
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} , {
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.vmsd = &vmstate_steal_time_msr,
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.needed = steal_time_msr_needed,
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} , {
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} , {
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.vmsd = &vmstate_fpop_ip_dp,
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.vmsd = &vmstate_fpop_ip_dp,
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.needed = fpop_ip_dp_needed,
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.needed = fpop_ip_dp_needed,
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