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suppressed explicit access type and use the exception routine to infer it from the micro operation

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@529 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2004-01-04 23:26:24 +00:00
parent 9a64fbe4d8
commit ac9eb0731a
4 changed files with 41 additions and 46 deletions
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2
target-ppc/cpu.h
View File

@ -153,6 +153,8 @@ typedef struct CPUPPCState {
jmp_buf jmp_env; jmp_buf jmp_env;
int exception_index; int exception_index;
int error_code; int error_code;
int access_type; /* when a memory exception occurs, the access
type is stored here */
uint32_t exceptions; /* exception queue */ uint32_t exceptions; /* exception queue */
uint32_t errors[16]; uint32_t errors[16];
int user_mode_only; /* user mode only simulation */ int user_mode_only; /* user mode only simulation */

2
target-ppc/helper.c
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@ -512,7 +512,7 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
// printf("%s 0\n", __func__); // printf("%s 0\n", __func__);
is_user = flags & 0x01; is_user = flags & 0x01;
access_type = flags & ~0x01; access_type = env->access_type;
if (env->user_mode_only) { if (env->user_mode_only) {
/* user mode only emulation */ /* user mode only emulation */
ret = -1; ret = -1;

9
target-ppc/op_helper_mem.h
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@ -8,14 +8,14 @@ void glue(do_lsw, MEMSUFFIX) (int dst)
__func__, T0, T1, dst); __func__, T0, T1, dst);
} }
for (; T1 > 3; T1 -= 4, T0 += 4) { for (; T1 > 3; T1 -= 4, T0 += 4) {
ugpr(dst++) = glue(_ldl, MEMSUFFIX)((void *)T0, ACCESS_INT); ugpr(dst++) = glue(ldl, MEMSUFFIX)((void *)T0);
if (dst == 32) if (dst == 32)
dst = 0; dst = 0;
} }
if (T1 > 0) { if (T1 > 0) {
tmp = 0; tmp = 0;
for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) { for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) {
tmp |= glue(_ldub, MEMSUFFIX)((void *)T0, ACCESS_INT) << sh; tmp |= glue(ldub, MEMSUFFIX)((void *)T0) << sh;
} }
ugpr(dst) = tmp; ugpr(dst) = tmp;
} }
@ -30,14 +30,13 @@ void glue(do_stsw, MEMSUFFIX) (int src)
__func__, T0, T1, src); __func__, T0, T1, src);
} }
for (; T1 > 3; T1 -= 4, T0 += 4) { for (; T1 > 3; T1 -= 4, T0 += 4) {
glue(_stl, MEMSUFFIX)((void *)T0, ugpr(src++), ACCESS_INT); glue(stl, MEMSUFFIX)((void *)T0, ugpr(src++));
if (src == 32) if (src == 32)
src = 0; src = 0;
} }
if (T1 > 0) { if (T1 > 0) {
for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) for (sh = 24; T1 > 0; T1--, T0++, sh -= 8)
glue(_stb, MEMSUFFIX)((void *)T0, (ugpr(src) >> sh) & 0xFF, glue(stb, MEMSUFFIX)((void *)T0, (ugpr(src) >> sh) & 0xFF);
ACCESS_INT);
} }
} }

74
target-ppc/op_mem.h
View File

@ -2,68 +2,62 @@
void glue(do_lsw, MEMSUFFIX) (int dst); void glue(do_lsw, MEMSUFFIX) (int dst);
void glue(do_stsw, MEMSUFFIX) (int src); void glue(do_stsw, MEMSUFFIX) (int src);
/* Internal helpers for sign extension and byte-reverse */ static inline uint16_t glue(ld16r, MEMSUFFIX) (void *EA)
static inline uint32_t glue(_ld16x, MEMSUFFIX) (void *EA, int type)
{ {
return s_ext16(glue(_lduw, MEMSUFFIX)(EA, type)); uint16_t tmp = glue(lduw, MEMSUFFIX)(EA);
}
static inline uint16_t glue(_ld16r, MEMSUFFIX) (void *EA, int type)
{
uint16_t tmp = glue(_lduw, MEMSUFFIX)(EA, type);
return ((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8); return ((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8);
} }
static inline uint32_t glue(_ld32r, MEMSUFFIX) (void *EA, int type) static inline uint32_t glue(ld32r, MEMSUFFIX) (void *EA)
{ {
uint32_t tmp = glue(_ldl, MEMSUFFIX)(EA, type); uint32_t tmp = glue(ldl, MEMSUFFIX)(EA);
return ((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) | return ((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) |
((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); ((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24);
} }
static inline void glue(_st16r, MEMSUFFIX) (void *EA, uint16_t data, int type) static inline void glue(st16r, MEMSUFFIX) (void *EA, uint16_t data)
{ {
uint16_t tmp = ((data & 0xFF00) >> 8) | ((data & 0x00FF) << 8); uint16_t tmp = ((data & 0xFF00) >> 8) | ((data & 0x00FF) << 8);
glue(_stw, MEMSUFFIX)(EA, tmp, type); glue(stw, MEMSUFFIX)(EA, tmp);
} }
static inline void glue(_st32r, MEMSUFFIX) (void *EA, uint32_t data, int type) static inline void glue(st32r, MEMSUFFIX) (void *EA, uint32_t data)
{ {
uint32_t tmp = ((data & 0xFF000000) >> 24) | ((data & 0x00FF0000) >> 8) | uint32_t tmp = ((data & 0xFF000000) >> 24) | ((data & 0x00FF0000) >> 8) |
((data & 0x0000FF00) << 8) | ((data & 0x000000FF) << 24); ((data & 0x0000FF00) << 8) | ((data & 0x000000FF) << 24);
glue(_stl, MEMSUFFIX)(EA, tmp, type); glue(stl, MEMSUFFIX)(EA, tmp);
} }
/*** Integer load ***/ /*** Integer load ***/
#define PPC_LD_OP(name, op) \ #define PPC_LD_OP(name, op) \
PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ PPC_OP(glue(glue(l, name), MEMSUFFIX)) \
{ \ { \
T1 = glue(op, MEMSUFFIX)((void *)T0, ACCESS_INT); \ T1 = glue(op, MEMSUFFIX)((void *)T0); \
RETURN(); \ RETURN(); \
} }
#define PPC_ST_OP(name, op) \ #define PPC_ST_OP(name, op) \
PPC_OP(glue(glue(st, name), MEMSUFFIX)) \ PPC_OP(glue(glue(st, name), MEMSUFFIX)) \
{ \ { \
glue(op, MEMSUFFIX)((void *)T0, T1, ACCESS_INT); \ glue(op, MEMSUFFIX)((void *)T0, T1); \
RETURN(); \ RETURN(); \
} }
PPC_LD_OP(bz, _ldub); PPC_LD_OP(bz, ldub);
PPC_LD_OP(ha, _ld16x); PPC_LD_OP(ha, ldsw);
PPC_LD_OP(hz, _lduw); PPC_LD_OP(hz, lduw);
PPC_LD_OP(wz, _ldl); PPC_LD_OP(wz, ldl);
/*** Integer store ***/ /*** Integer store ***/
PPC_ST_OP(b, _stb); PPC_ST_OP(b, stb);
PPC_ST_OP(h, _stw); PPC_ST_OP(h, stw);
PPC_ST_OP(w, _stl); PPC_ST_OP(w, stl);
/*** Integer load and store with byte reverse ***/ /*** Integer load and store with byte reverse ***/
PPC_LD_OP(hbr, _ld16r); PPC_LD_OP(hbr, ld16r);
PPC_LD_OP(wbr, _ld32r); PPC_LD_OP(wbr, ld32r);
PPC_ST_OP(hbr, _st16r); PPC_ST_OP(hbr, st16r);
PPC_ST_OP(wbr, _st32r); PPC_ST_OP(wbr, st32r);
/*** Integer load and store multiple ***/ /*** Integer load and store multiple ***/
PPC_OP(glue(lmw, MEMSUFFIX)) PPC_OP(glue(lmw, MEMSUFFIX))
@ -71,7 +65,7 @@ PPC_OP(glue(lmw, MEMSUFFIX))
int dst = PARAM(1); int dst = PARAM(1);
for (; dst < 32; dst++, T0 += 4) { for (; dst < 32; dst++, T0 += 4) {
ugpr(dst) = glue(_ldl, MEMSUFFIX)((void *)T0, ACCESS_INT); ugpr(dst) = glue(ldl, MEMSUFFIX)((void *)T0);
} }
RETURN(); RETURN();
} }
@ -81,7 +75,7 @@ PPC_OP(glue(stmw, MEMSUFFIX))
int src = PARAM(1); int src = PARAM(1);
for (; src < 32; src++, T0 += 4) { for (; src < 32; src++, T0 += 4) {
glue(_stl, MEMSUFFIX)((void *)T0, ugpr(src), ACCESS_INT); glue(stl, MEMSUFFIX)((void *)T0, ugpr(src));
} }
RETURN(); RETURN();
} }
@ -150,7 +144,7 @@ PPC_OP(glue(stwcx, MEMSUFFIX))
if (regs->reserve != T0) { if (regs->reserve != T0) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(_stl, MEMSUFFIX)((void *)T0, T1, ACCESS_RES); glue(stl, MEMSUFFIX)((void *)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
@ -160,27 +154,27 @@ PPC_OP(glue(stwcx, MEMSUFFIX))
PPC_OP(glue(dcbz, MEMSUFFIX)) PPC_OP(glue(dcbz, MEMSUFFIX))
{ {
glue(_stl, MEMSUFFIX)((void *)(T0 + 0x00), 0, ACCESS_INT); glue(stl, MEMSUFFIX)((void *)(T0 + 0x00), 0);
glue(_stl, MEMSUFFIX)((void *)(T0 + 0x04), 0, ACCESS_INT); glue(stl, MEMSUFFIX)((void *)(T0 + 0x04), 0);
glue(_stl, MEMSUFFIX)((void *)(T0 + 0x08), 0, ACCESS_INT); glue(stl, MEMSUFFIX)((void *)(T0 + 0x08), 0);
glue(_stl, MEMSUFFIX)((void *)(T0 + 0x0C), 0, ACCESS_INT); glue(stl, MEMSUFFIX)((void *)(T0 + 0x0C), 0);
glue(_stl, MEMSUFFIX)((void *)(T0 + 0x10), 0, ACCESS_INT); glue(stl, MEMSUFFIX)((void *)(T0 + 0x10), 0);
glue(_stl, MEMSUFFIX)((void *)(T0 + 0x14), 0, ACCESS_INT); glue(stl, MEMSUFFIX)((void *)(T0 + 0x14), 0);
glue(_stl, MEMSUFFIX)((void *)(T0 + 0x18), 0, ACCESS_INT); glue(stl, MEMSUFFIX)((void *)(T0 + 0x18), 0);
glue(_stl, MEMSUFFIX)((void *)(T0 + 0x1C), 0, ACCESS_INT); glue(stl, MEMSUFFIX)((void *)(T0 + 0x1C), 0);
RETURN(); RETURN();
} }
/* External access */ /* External access */
PPC_OP(glue(eciwx, MEMSUFFIX)) PPC_OP(glue(eciwx, MEMSUFFIX))
{ {
T1 = glue(_ldl, MEMSUFFIX)((void *)T0, ACCESS_EXT); T1 = glue(ldl, MEMSUFFIX)((void *)T0);
RETURN(); RETURN();
} }
PPC_OP(glue(ecowx, MEMSUFFIX)) PPC_OP(glue(ecowx, MEMSUFFIX))
{ {
glue(_stl, MEMSUFFIX)((void *)T0, T1, ACCESS_EXT); glue(stl, MEMSUFFIX)((void *)T0, T1);
RETURN(); RETURN();
} }