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microblaze: Break the tb at memory barriers

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Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Edgar E. Iglesias 2012-01-10 10:33:37 +01:00
parent 5818dee572
commit 9f6113c7e6
1 changed files with 11 additions and 1 deletions
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12
target-microblaze/translate.c
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@ -1249,12 +1249,22 @@ static void dec_bcc(DisasContext *dc)
static void dec_br(DisasContext *dc) static void dec_br(DisasContext *dc)
{ {
unsigned int dslot, link, abs; unsigned int dslot, link, abs, mbar;
int mem_index = cpu_mmu_index(dc->env); int mem_index = cpu_mmu_index(dc->env);
dslot = dc->ir & (1 << 20); dslot = dc->ir & (1 << 20);
abs = dc->ir & (1 << 19); abs = dc->ir & (1 << 19);
link = dc->ir & (1 << 18); link = dc->ir & (1 << 18);
/* Memory barrier. */
mbar = (dc->ir >> 16) & 31;
if (mbar == 2 && dc->imm == 4) {
LOG_DIS("mbar %d\n", dc->rd);
/* Break the TB. */
dc->cpustate_changed = 1;
return;
}
LOG_DIS("br%s%s%s%s imm=%x\n", LOG_DIS("br%s%s%s%s imm=%x\n",
abs ? "a" : "", link ? "l" : "", abs ? "a" : "", link ? "l" : "",
dc->type_b ? "i" : "", dslot ? "d" : "", dc->type_b ? "i" : "", dslot ? "d" : "",