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pci: Derive PCI host bridges from TYPE_PCI_HOST_BRIDGE

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Use PCIHostState and PCI_HOST_BRIDGE() where appropriate.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Andreas Färber 2012-08-20 19:08:08 +02:00 committed by Anthony Liguori
parent b44ff9d430
commit 8558d942b6
13 changed files with 45 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hw/alpha_typhoon.c
View File

@ -715,7 +715,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
qdev_init_nofail(dev); qdev_init_nofail(dev);
s = TYPHOON_PCI_HOST_BRIDGE(dev); s = TYPHOON_PCI_HOST_BRIDGE(dev);
phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(dev)); phb = PCI_HOST_BRIDGE(dev);
/* Remember the CPUs so that we can deliver interrupts to them. */ /* Remember the CPUs so that we can deliver interrupts to them. */
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
@ -825,7 +825,7 @@ static void typhoon_pcihost_class_init(ObjectClass *klass, void *data)
static const TypeInfo typhoon_pcihost_info = { static const TypeInfo typhoon_pcihost_info = {
.name = TYPE_TYPHOON_PCI_HOST_BRIDGE, .name = TYPE_TYPHOON_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(TyphoonState), .instance_size = sizeof(TyphoonState),
.class_init = typhoon_pcihost_class_init, .class_init = typhoon_pcihost_class_init,
}; };

22
hw/bonito.c
View File

@ -416,7 +416,7 @@ static const MemoryRegionOps bonito_cop_ops = {
static uint32_t bonito_sbridge_pciaddr(void *opaque, target_phys_addr_t addr) static uint32_t bonito_sbridge_pciaddr(void *opaque, target_phys_addr_t addr)
{ {
PCIBonitoState *s = opaque; PCIBonitoState *s = opaque;
PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost)); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
uint32_t cfgaddr; uint32_t cfgaddr;
uint32_t idsel; uint32_t idsel;
uint32_t devno; uint32_t devno;
@ -454,7 +454,7 @@ static void bonito_spciconf_writeb(void *opaque, target_phys_addr_t addr,
{ {
PCIBonitoState *s = opaque; PCIBonitoState *s = opaque;
PCIDevice *d = PCI_DEVICE(s); PCIDevice *d = PCI_DEVICE(s);
PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost)); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
uint32_t pciaddr; uint32_t pciaddr;
uint16_t status; uint16_t status;
@ -480,7 +480,7 @@ static void bonito_spciconf_writew(void *opaque, target_phys_addr_t addr,
{ {
PCIBonitoState *s = opaque; PCIBonitoState *s = opaque;
PCIDevice *d = PCI_DEVICE(s); PCIDevice *d = PCI_DEVICE(s);
PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost)); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
uint32_t pciaddr; uint32_t pciaddr;
uint16_t status; uint16_t status;
@ -508,7 +508,7 @@ static void bonito_spciconf_writel(void *opaque, target_phys_addr_t addr,
{ {
PCIBonitoState *s = opaque; PCIBonitoState *s = opaque;
PCIDevice *d = PCI_DEVICE(s); PCIDevice *d = PCI_DEVICE(s);
PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost)); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
uint32_t pciaddr; uint32_t pciaddr;
uint16_t status; uint16_t status;
@ -535,7 +535,7 @@ static uint32_t bonito_spciconf_readb(void *opaque, target_phys_addr_t addr)
{ {
PCIBonitoState *s = opaque; PCIBonitoState *s = opaque;
PCIDevice *d = PCI_DEVICE(s); PCIDevice *d = PCI_DEVICE(s);
PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost)); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
uint32_t pciaddr; uint32_t pciaddr;
uint16_t status; uint16_t status;
@ -561,7 +561,7 @@ static uint32_t bonito_spciconf_readw(void *opaque, target_phys_addr_t addr)
{ {
PCIBonitoState *s = opaque; PCIBonitoState *s = opaque;
PCIDevice *d = PCI_DEVICE(s); PCIDevice *d = PCI_DEVICE(s);
PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost)); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
uint32_t pciaddr; uint32_t pciaddr;
uint16_t status; uint16_t status;
@ -589,7 +589,7 @@ static uint32_t bonito_spciconf_readl(void *opaque, target_phys_addr_t addr)
{ {
PCIBonitoState *s = opaque; PCIBonitoState *s = opaque;
PCIDevice *d = PCI_DEVICE(s); PCIDevice *d = PCI_DEVICE(s);
PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost)); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
uint32_t pciaddr; uint32_t pciaddr;
uint16_t status; uint16_t status;
@ -702,7 +702,7 @@ static const VMStateDescription vmstate_bonito = {
static int bonito_pcihost_initfn(SysBusDevice *dev) static int bonito_pcihost_initfn(SysBusDevice *dev)
{ {
PCIHostState *phb = FROM_SYSBUS(PCIHostState, dev); PCIHostState *phb = PCI_HOST_BRIDGE(dev);
phb->bus = pci_register_bus(DEVICE(dev), "pci", phb->bus = pci_register_bus(DEVICE(dev), "pci",
pci_bonito_set_irq, pci_bonito_map_irq, dev, pci_bonito_set_irq, pci_bonito_map_irq, dev,
@ -716,7 +716,7 @@ static int bonito_initfn(PCIDevice *dev)
{ {
PCIBonitoState *s = DO_UPCAST(PCIBonitoState, dev, dev); PCIBonitoState *s = DO_UPCAST(PCIBonitoState, dev, dev);
SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost); SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
PCIHostState *phb = FROM_SYSBUS(PCIHostState, sysbus); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
/* Bonito North Bridge, built on FPGA, VENDOR_ID/DEVICE_ID are "undefined" */ /* Bonito North Bridge, built on FPGA, VENDOR_ID/DEVICE_ID are "undefined" */
pci_config_set_prog_interface(dev->config, 0x00); pci_config_set_prog_interface(dev->config, 0x00);
@ -785,7 +785,7 @@ PCIBus *bonito_init(qemu_irq *pic)
PCIDevice *d; PCIDevice *d;
dev = qdev_create(NULL, TYPE_BONITO_PCI_HOST_BRIDGE); dev = qdev_create(NULL, TYPE_BONITO_PCI_HOST_BRIDGE);
phb = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev)); phb = PCI_HOST_BRIDGE(dev);
pcihost = BONITO_PCI_HOST_BRIDGE(dev); pcihost = BONITO_PCI_HOST_BRIDGE(dev);
pcihost->pic = pic; pcihost->pic = pic;
qdev_init_nofail(dev); qdev_init_nofail(dev);
@ -833,7 +833,7 @@ static void bonito_pcihost_class_init(ObjectClass *klass, void *data)
static const TypeInfo bonito_pcihost_info = { static const TypeInfo bonito_pcihost_info = {
.name = TYPE_BONITO_PCI_HOST_BRIDGE, .name = TYPE_BONITO_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(BonitoState), .instance_size = sizeof(BonitoState),
.class_init = bonito_pcihost_class_init, .class_init = bonito_pcihost_class_init,
}; };

4
hw/dec_pci.c
View File

@ -91,7 +91,7 @@ static int pci_dec_21154_device_init(SysBusDevice *dev)
{ {
PCIHostState *phb; PCIHostState *phb;
phb = FROM_SYSBUS(PCIHostState, dev); phb = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops, memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000); dev, "pci-conf-idx", 0x1000);
@ -136,7 +136,7 @@ static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_dec_21154_device_info = { static const TypeInfo pci_dec_21154_device_info = {
.name = TYPE_DEC_21154, .name = TYPE_DEC_21154,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(DECState), .instance_size = sizeof(DECState),
.class_init = pci_dec_21154_device_class_init, .class_init = pci_dec_21154_device_class_init,
}; };

6
hw/grackle_pci.c
View File

@ -73,7 +73,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE); dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
qdev_init_nofail(dev); qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev); s = SYS_BUS_DEVICE(dev);
phb = FROM_SYSBUS(PCIHostState, s); phb = PCI_HOST_BRIDGE(dev);
d = GRACKLE_PCI_HOST_BRIDGE(dev); d = GRACKLE_PCI_HOST_BRIDGE(dev);
memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL); memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
@ -102,7 +102,7 @@ static int pci_grackle_init_device(SysBusDevice *dev)
{ {
PCIHostState *phb; PCIHostState *phb;
phb = FROM_SYSBUS(PCIHostState, dev); phb = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops, memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000); dev, "pci-conf-idx", 0x1000);
@ -151,7 +151,7 @@ static void pci_grackle_class_init(ObjectClass *klass, void *data)
static const TypeInfo grackle_pci_host_info = { static const TypeInfo grackle_pci_host_info = {
.name = TYPE_GRACKLE_PCI_HOST_BRIDGE, .name = TYPE_GRACKLE_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(GrackleState), .instance_size = sizeof(GrackleState),
.class_init = pci_grackle_class_init, .class_init = pci_grackle_class_init,
}; };

4
hw/gt64xxx.c
View File

@ -1095,7 +1095,7 @@ PCIBus *gt64120_register(qemu_irq *pic)
dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE);
qdev_init_nofail(dev); qdev_init_nofail(dev);
d = GT64120_PCI_HOST_BRIDGE(dev); d = GT64120_PCI_HOST_BRIDGE(dev);
phb = &d->pci; phb = PCI_HOST_BRIDGE(dev);
phb->bus = pci_register_bus(dev, "pci", phb->bus = pci_register_bus(dev, "pci",
gt64120_pci_set_irq, gt64120_pci_map_irq, gt64120_pci_set_irq, gt64120_pci_map_irq,
pic, pic,
@ -1168,7 +1168,7 @@ static void gt64120_class_init(ObjectClass *klass, void *data)
static const TypeInfo gt64120_info = { static const TypeInfo gt64120_info = {
.name = TYPE_GT64120_PCI_HOST_BRIDGE, .name = TYPE_GT64120_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(GT64120State), .instance_size = sizeof(GT64120State),
.class_init = gt64120_class_init, .class_init = gt64120_class_init,
}; };

8
hw/piix_pci.c
View File

@ -225,7 +225,7 @@ static const VMStateDescription vmstate_i440fx = {
static int i440fx_pcihost_initfn(SysBusDevice *dev) static int i440fx_pcihost_initfn(SysBusDevice *dev)
{ {
I440FXState *s = FROM_SYSBUS(I440FXState, dev); PCIHostState *s = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s, memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s,
"pci-conf-idx", 4); "pci-conf-idx", 4);
@ -267,12 +267,12 @@ static PCIBus *i440fx_common_init(const char *device_name,
DeviceState *dev; DeviceState *dev;
PCIBus *b; PCIBus *b;
PCIDevice *d; PCIDevice *d;
I440FXState *s; PCIHostState *s;
PIIX3State *piix3; PIIX3State *piix3;
PCII440FXState *f; PCII440FXState *f;
dev = qdev_create(NULL, "i440FX-pcihost"); dev = qdev_create(NULL, "i440FX-pcihost");
s = FROM_SYSBUS(I440FXState, sysbus_from_qdev(dev)); s = PCI_HOST_BRIDGE(dev);
s->address_space = address_space_mem; s->address_space = address_space_mem;
b = pci_bus_new(&s->busdev.qdev, NULL, pci_address_space, b = pci_bus_new(&s->busdev.qdev, NULL, pci_address_space,
address_space_io, 0); address_space_io, 0);
@ -603,7 +603,7 @@ static void i440fx_pcihost_class_init(ObjectClass *klass, void *data)
static const TypeInfo i440fx_pcihost_info = { static const TypeInfo i440fx_pcihost_info = {
.name = "i440FX-pcihost", .name = "i440FX-pcihost",
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(I440FXState), .instance_size = sizeof(I440FXState),
.class_init = i440fx_pcihost_class_init, .class_init = i440fx_pcihost_class_init,
}; };

4
hw/ppc4xx_pci.c
View File

@ -338,7 +338,7 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev)
PCIBus *b; PCIBus *b;
int i; int i;
h = FROM_SYSBUS(PCIHostState, dev); h = PCI_HOST_BRIDGE(dev);
s = PPC4xx_PCI_HOST_BRIDGE(dev); s = PPC4xx_PCI_HOST_BRIDGE(dev);
for (i = 0; i < ARRAY_SIZE(s->irq); i++) { for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
@ -398,7 +398,7 @@ static void ppc4xx_pcihost_class_init(ObjectClass *klass, void *data)
static const TypeInfo ppc4xx_pcihost_info = { static const TypeInfo ppc4xx_pcihost_info = {
.name = TYPE_PPC4xx_PCI_HOST_BRIDGE, .name = TYPE_PPC4xx_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(PPC4xxPCIState), .instance_size = sizeof(PPC4xxPCIState),
.class_init = ppc4xx_pcihost_class_init, .class_init = ppc4xx_pcihost_class_init,
}; };

4
hw/ppc_prep.c
View File

@ -471,7 +471,6 @@ static void ppc_prep_init (ram_addr_t ram_size,
uint32_t kernel_base, initrd_base; uint32_t kernel_base, initrd_base;
long kernel_size, initrd_size; long kernel_size, initrd_size;
DeviceState *dev; DeviceState *dev;
SysBusDevice *sys;
PCIHostState *pcihost; PCIHostState *pcihost;
PCIBus *pci_bus; PCIBus *pci_bus;
PCIDevice *pci; PCIDevice *pci;
@ -584,8 +583,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
} }
dev = qdev_create(NULL, "raven-pcihost"); dev = qdev_create(NULL, "raven-pcihost");
sys = sysbus_from_qdev(dev); pcihost = PCI_HOST_BRIDGE(dev);
pcihost = DO_UPCAST(PCIHostState, busdev, sys);
pcihost->address_space = get_system_memory(); pcihost->address_space = get_system_memory();
object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev), NULL); object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev), NULL);
qdev_init_nofail(dev); qdev_init_nofail(dev);

4
hw/ppce500_pci.c
View File

@ -316,7 +316,7 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *address_space_io = get_system_io(); MemoryRegion *address_space_io = get_system_io();
h = FROM_SYSBUS(PCIHostState, dev); h = PCI_HOST_BRIDGE(dev);
s = PPC_E500_PCI_HOST_BRIDGE(dev); s = PPC_E500_PCI_HOST_BRIDGE(dev);
for (i = 0; i < ARRAY_SIZE(s->irq); i++) { for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
@ -374,7 +374,7 @@ static void e500_pcihost_class_init(ObjectClass *klass, void *data)
static const TypeInfo e500_pcihost_info = { static const TypeInfo e500_pcihost_info = {
.name = TYPE_PPC_E500_PCI_HOST_BRIDGE, .name = TYPE_PPC_E500_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(PPCE500PCIState), .instance_size = sizeof(PPCE500PCIState),
.class_init = e500_pcihost_class_init, .class_init = e500_pcihost_class_init,
}; };

4
hw/prep_pci.c
View File

@ -103,7 +103,7 @@ static void prep_set_irq(void *opaque, int irq_num, int level)
static int raven_pcihost_init(SysBusDevice *dev) static int raven_pcihost_init(SysBusDevice *dev)
{ {
PCIHostState *h = FROM_SYSBUS(PCIHostState, dev); PCIHostState *h = PCI_HOST_BRIDGE(dev);
PREPPCIState *s = RAVEN_PCI_HOST_BRIDGE(dev); PREPPCIState *s = RAVEN_PCI_HOST_BRIDGE(dev);
MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *address_space_io = get_system_io(); MemoryRegion *address_space_io = get_system_io();
@ -192,7 +192,7 @@ static void raven_pcihost_class_init(ObjectClass *klass, void *data)
static const TypeInfo raven_pcihost_info = { static const TypeInfo raven_pcihost_info = {
.name = TYPE_RAVEN_PCI_HOST_BRIDGE, .name = TYPE_RAVEN_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(PREPPCIState), .instance_size = sizeof(PREPPCIState),
.class_init = raven_pcihost_class_init, .class_init = raven_pcihost_class_init,
}; };

2
hw/spapr.c
View File

@ -743,7 +743,7 @@ static void ppc_spapr_init(ram_addr_t ram_size,
SPAPR_PCI_MEM_WIN_SIZE, SPAPR_PCI_MEM_WIN_SIZE,
SPAPR_PCI_IO_WIN_ADDR, SPAPR_PCI_IO_WIN_ADDR,
SPAPR_PCI_MSI_WIN_ADDR); SPAPR_PCI_MSI_WIN_ADDR);
phb = &QLIST_FIRST(&spapr->phbs)->host_state; phb = PCI_HOST_BRIDGE(QLIST_FIRST(&spapr->phbs));
for (i = 0; i < nb_nics; i++) { for (i = 0; i < nb_nics; i++) {
NICInfo *nd = &nd_table[i]; NICInfo *nd = &nd_table[i];

6
hw/spapr_pci.c
View File

@ -64,7 +64,7 @@ static PCIDevice *find_dev(sPAPREnvironment *spapr, uint64_t buid,
uint32_t config_addr) uint32_t config_addr)
{ {
sPAPRPHBState *sphb = find_phb(spapr, buid); sPAPRPHBState *sphb = find_phb(spapr, buid);
PCIHostState *phb = &sphb->host_state; PCIHostState *phb = PCI_HOST_BRIDGE(sphb);
BusState *bus = BUS(phb->bus); BusState *bus = BUS(phb->bus);
BusChild *kid; BusChild *kid;
int devfn = (config_addr >> 8) & 0xFF; int devfn = (config_addr >> 8) & 0xFF;
@ -517,7 +517,7 @@ static DMAContext *spapr_pci_dma_context_fn(PCIBus *bus, void *opaque,
static int spapr_phb_init(SysBusDevice *s) static int spapr_phb_init(SysBusDevice *s)
{ {
sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s); sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s);
PCIHostState *phb = FROM_SYSBUS(PCIHostState, s); PCIHostState *phb = PCI_HOST_BRIDGE(s);
char *namebuf; char *namebuf;
int i; int i;
PCIBus *bus; PCIBus *bus;
@ -617,7 +617,7 @@ static void spapr_phb_class_init(ObjectClass *klass, void *data)
static const TypeInfo spapr_phb_info = { static const TypeInfo spapr_phb_info = {
.name = TYPE_SPAPR_PCI_HOST_BRIDGE, .name = TYPE_SPAPR_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(sPAPRPHBState), .instance_size = sizeof(sPAPRPHBState),
.class_init = spapr_phb_class_init, .class_init = spapr_phb_class_init,
}; };

20
hw/unin_pci.c
View File

@ -148,7 +148,7 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
/* Use values found on a real PowerMac */ /* Use values found on a real PowerMac */
/* Uninorth main bus */ /* Uninorth main bus */
h = FROM_SYSBUS(PCIHostState, dev); h = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops, memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000); dev, "pci-conf-idx", 0x1000);
@ -166,7 +166,7 @@ static int pci_u3_agp_init_device(SysBusDevice *dev)
PCIHostState *h; PCIHostState *h;
/* Uninorth U3 AGP bus */ /* Uninorth U3 AGP bus */
h = FROM_SYSBUS(PCIHostState, dev); h = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops, memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000); dev, "pci-conf-idx", 0x1000);
@ -183,7 +183,7 @@ static int pci_unin_agp_init_device(SysBusDevice *dev)
PCIHostState *h; PCIHostState *h;
/* Uninorth AGP bus */ /* Uninorth AGP bus */
h = FROM_SYSBUS(PCIHostState, dev); h = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops, memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000); dev, "pci-conf-idx", 0x1000);
@ -199,7 +199,7 @@ static int pci_unin_internal_init_device(SysBusDevice *dev)
PCIHostState *h; PCIHostState *h;
/* Uninorth internal bus */ /* Uninorth internal bus */
h = FROM_SYSBUS(PCIHostState, dev); h = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops, memory_region_init_io(&h->conf_mem, &pci_host_conf_le_ops,
dev, "pci-conf-idx", 0x1000); dev, "pci-conf-idx", 0x1000);
@ -224,7 +224,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic,
dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
qdev_init_nofail(dev); qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev); s = SYS_BUS_DEVICE(dev);
h = FROM_SYSBUS(PCIHostState, s); h = PCI_HOST_BRIDGE(s);
d = UNI_NORTH_PCI_HOST_BRIDGE(dev); d = UNI_NORTH_PCI_HOST_BRIDGE(dev);
memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL); memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio, memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
@ -289,7 +289,7 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
qdev_init_nofail(dev); qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev); s = SYS_BUS_DEVICE(dev);
h = FROM_SYSBUS(PCIHostState, s); h = PCI_HOST_BRIDGE(dev);
d = U3_AGP_HOST_BRIDGE(dev); d = U3_AGP_HOST_BRIDGE(dev);
memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL); memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
@ -427,7 +427,7 @@ static void pci_unin_main_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_unin_main_info = { static const TypeInfo pci_unin_main_info = {
.name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE, .name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(UNINState), .instance_size = sizeof(UNINState),
.class_init = pci_unin_main_class_init, .class_init = pci_unin_main_class_init,
}; };
@ -441,7 +441,7 @@ static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_u3_agp_info = { static const TypeInfo pci_u3_agp_info = {
.name = TYPE_U3_AGP_HOST_BRIDGE, .name = TYPE_U3_AGP_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(UNINState), .instance_size = sizeof(UNINState),
.class_init = pci_u3_agp_class_init, .class_init = pci_u3_agp_class_init,
}; };
@ -455,7 +455,7 @@ static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_unin_agp_info = { static const TypeInfo pci_unin_agp_info = {
.name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE, .name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(UNINState), .instance_size = sizeof(UNINState),
.class_init = pci_unin_agp_class_init, .class_init = pci_unin_agp_class_init,
}; };
@ -469,7 +469,7 @@ static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
static const TypeInfo pci_unin_internal_info = { static const TypeInfo pci_unin_internal_info = {
.name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE, .name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_PCI_HOST_BRIDGE,
.instance_size = sizeof(UNINState), .instance_size = sizeof(UNINState),
.class_init = pci_unin_internal_class_init, .class_init = pci_unin_internal_class_init,
}; };