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target-alpha: Fix fbcond branch offset.

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The instructions use a disp21 like all other branch insns,
not the disp16 that was being passed.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2009-12-11 09:07:29 -08:00 committed by Aurelien Jarno
parent 377a43b6fb
commit 73651cce62
1 changed files with 4 additions and 5 deletions
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9
target-alpha/translate.c
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@ -314,8 +314,7 @@ static inline void gen_bcond(DisasContext *ctx, TCGCond cond, int ra,
gen_set_label(l2); gen_set_label(l2);
} }
static inline void gen_fbcond(DisasContext *ctx, int opc, int ra, static inline void gen_fbcond(DisasContext *ctx, int opc, int ra, int32_t disp)
int32_t disp16)
{ {
int l1, l2; int l1, l2;
TCGv tmp; TCGv tmp;
@ -356,7 +355,7 @@ static inline void gen_fbcond(DisasContext *ctx, int opc, int ra,
tcg_gen_movi_i64(cpu_pc, ctx->pc); tcg_gen_movi_i64(cpu_pc, ctx->pc);
tcg_gen_br(l2); tcg_gen_br(l2);
gen_set_label(l1); gen_set_label(l1);
tcg_gen_movi_i64(cpu_pc, ctx->pc + (int64_t)(disp16 << 2)); tcg_gen_movi_i64(cpu_pc, ctx->pc + (int64_t)(disp << 2));
gen_set_label(l2); gen_set_label(l2);
} }
@ -2335,7 +2334,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn)
case 0x31: /* FBEQ */ case 0x31: /* FBEQ */
case 0x32: /* FBLT */ case 0x32: /* FBLT */
case 0x33: /* FBLE */ case 0x33: /* FBLE */
gen_fbcond(ctx, opc, ra, disp16); gen_fbcond(ctx, opc, ra, disp21);
ret = 1; ret = 1;
break; break;
case 0x34: case 0x34:
@ -2348,7 +2347,7 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn)
case 0x35: /* FBNE */ case 0x35: /* FBNE */
case 0x36: /* FBGE */ case 0x36: /* FBGE */
case 0x37: /* FBGT */ case 0x37: /* FBGT */
gen_fbcond(ctx, opc, ra, disp16); gen_fbcond(ctx, opc, ra, disp21);
ret = 1; ret = 1;
break; break;
case 0x38: case 0x38: