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memory: correct documentation typos
Noted by Drew Jones. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@ -15,7 +15,7 @@ The memory model provides support for
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- setting up coalesced memory for kvm
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- setting up coalesced memory for kvm
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- setting up ioeventfd regions for kvm
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- setting up ioeventfd regions for kvm
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Memory is modelled as an tree (really acyclic graph) of MemoryRegion objects.
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Memory is modelled as a tree (really acyclic graph) of MemoryRegion objects.
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The root of the tree is memory as seen from the CPU's viewpoint (the system
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The root of the tree is memory as seen from the CPU's viewpoint (the system
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bus). Nodes in the tree represent other buses, memory controllers, and
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bus). Nodes in the tree represent other buses, memory controllers, and
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memory regions that have been rerouted. Leaves are RAM and MMIO regions.
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memory regions that have been rerouted. Leaves are RAM and MMIO regions.
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@ -87,7 +87,7 @@ guest accesses an address:
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descending priority order
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descending priority order
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- if the address lies outside the region offset/size, the subregion is
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- if the address lies outside the region offset/size, the subregion is
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discarded
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discarded
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- if the subregion is a leaf (RAM or MMIO), the seach terminates
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- if the subregion is a leaf (RAM or MMIO), the search terminates
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- if the subregion is a container, the same algorithm is used within the
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- if the subregion is a container, the same algorithm is used within the
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subregion (after the address is adjusted by the subregion offset)
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subregion (after the address is adjusted by the subregion offset)
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- if the subregion is an alias, the search is continues at the alias target
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- if the subregion is an alias, the search is continues at the alias target
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@ -128,7 +128,7 @@ so-called PCI hole, that allows a 32-bit PCI bus to exist in a system with
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4GB of memory.
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4GB of memory.
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The memory controller diverts addresses in the range 640K-768K to the PCI
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The memory controller diverts addresses in the range 640K-768K to the PCI
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address space. This is modeled using the "vga-window" alias, mapped at a
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address space. This is modelled using the "vga-window" alias, mapped at a
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higher priority so it obscures the RAM at the same addresses. The vga window
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higher priority so it obscures the RAM at the same addresses. The vga window
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can be removed by programming the memory controller; this is modelled by
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can be removed by programming the memory controller; this is modelled by
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removing the alias and exposing the RAM underneath.
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removing the alias and exposing the RAM underneath.
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@ -164,7 +164,7 @@ various constraints can be supplied to control how these callbacks are called:
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- .impl.min_access_size, .impl.max_access_size define the access sizes
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- .impl.min_access_size, .impl.max_access_size define the access sizes
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(in bytes) supported by the *implementation*; other access sizes will be
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(in bytes) supported by the *implementation*; other access sizes will be
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emulated using the ones available. For example a 4-byte write will be
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emulated using the ones available. For example a 4-byte write will be
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emulated using four 1-byte write, is .impl.max_access_size = 1.
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emulated using four 1-byte write, if .impl.max_access_size = 1.
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- .impl.valid specifies that the *implementation* only supports unaligned
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- .impl.valid specifies that the *implementation* only supports unaligned
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accesses; unaligned accesses will be emulated by two aligned accesses.
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accesses; unaligned accesses will be emulated by two aligned accesses.
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- .old_portio and .old_mmio can be used to ease porting from code using
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- .old_portio and .old_mmio can be used to ease porting from code using
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