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Change Sparc uses of pic_set_irq to pic_set_irq_new

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2572 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2007-04-01 16:05:41 +00:00
parent e0353fe250
commit 52cc07d047
6 changed files with 45 additions and 35 deletions
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6
hw/slavio_intctl.c
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@ -277,7 +277,7 @@ static void slavio_check_interrupts(void *opaque)
* "irq" here is the bit number in the system interrupt register to * "irq" here is the bit number in the system interrupt register to
* separate serial and keyboard interrupts sharing a level. * separate serial and keyboard interrupts sharing a level.
*/ */
void slavio_pic_set_irq(void *opaque, int irq, int level) void pic_set_irq_new(void *opaque, int irq, int level)
{ {
SLAVIO_INTCTLState *s = opaque; SLAVIO_INTCTLState *s = opaque;
@ -299,13 +299,13 @@ void slavio_pic_set_irq(void *opaque, int irq, int level)
} }
} }
void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu) void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu)
{ {
SLAVIO_INTCTLState *s = opaque; SLAVIO_INTCTLState *s = opaque;
DPRINTF("Set cpu %d local irq %d level %d\n", cpu, irq, level); DPRINTF("Set cpu %d local irq %d level %d\n", cpu, irq, level);
if (cpu == (unsigned int)-1) { if (cpu == (unsigned int)-1) {
slavio_pic_set_irq(opaque, irq, level); pic_set_irq_new(opaque, irq, level);
return; return;
} }
if (irq < 32) { if (irq < 32) {

11
hw/slavio_misc.c
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@ -36,6 +36,9 @@
#ifdef DEBUG_MISC #ifdef DEBUG_MISC
#define MISC_DPRINTF(fmt, args...) \ #define MISC_DPRINTF(fmt, args...) \
do { printf("MISC: " fmt , ##args); } while (0) do { printf("MISC: " fmt , ##args); } while (0)
#define pic_set_irq_new(intctl, irq, level) \
do { printf("MISC: set_irq(%d): %d\n", (irq), (level)); \
pic_set_irq_new((intctl), (irq),(level));} while (0)
#else #else
#define MISC_DPRINTF(fmt, args...) #define MISC_DPRINTF(fmt, args...)
#endif #endif
@ -45,6 +48,7 @@ typedef struct MiscState {
uint8_t config; uint8_t config;
uint8_t aux1, aux2; uint8_t aux1, aux2;
uint8_t diag, mctrl, sysctrl; uint8_t diag, mctrl, sysctrl;
void *intctl;
} MiscState; } MiscState;
#define MISC_MAXADDR 1 #define MISC_MAXADDR 1
@ -54,9 +58,9 @@ static void slavio_misc_update_irq(void *opaque)
MiscState *s = opaque; MiscState *s = opaque;
if ((s->aux2 & 0x4) && (s->config & 0x8)) { if ((s->aux2 & 0x4) && (s->config & 0x8)) {
pic_set_irq(s->irq, 1); pic_set_irq_new(s->intctl, s->irq, 1);
} else { } else {
pic_set_irq(s->irq, 0); pic_set_irq_new(s->intctl, s->irq, 0);
} }
} }
@ -207,7 +211,7 @@ static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)
return 0; return 0;
} }
void *slavio_misc_init(uint32_t base, int irq) void *slavio_misc_init(uint32_t base, int irq, void *intctl)
{ {
int slavio_misc_io_memory; int slavio_misc_io_memory;
MiscState *s; MiscState *s;
@ -233,6 +237,7 @@ void *slavio_misc_init(uint32_t base, int irq)
cpu_register_physical_memory(base + 0xa000000, MISC_MAXADDR, slavio_misc_io_memory); cpu_register_physical_memory(base + 0xa000000, MISC_MAXADDR, slavio_misc_io_memory);
s->irq = irq; s->irq = irq;
s->intctl = intctl;
register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load, s); register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load, s);
qemu_register_reset(slavio_misc_reset, s); qemu_register_reset(slavio_misc_reset, s);

15
hw/slavio_serial.c
View File

@ -52,8 +52,9 @@
#ifdef DEBUG_SERIAL #ifdef DEBUG_SERIAL
#define SER_DPRINTF(fmt, args...) \ #define SER_DPRINTF(fmt, args...) \
do { printf("SER: " fmt , ##args); } while (0) do { printf("SER: " fmt , ##args); } while (0)
#define pic_set_irq(irq, level) \ #define pic_set_irq_new(intctl, irq, level) \
do { printf("SER: set_irq(%d): %d\n", (irq), (level)); pic_set_irq((irq),(level));} while (0) do { printf("SER: set_irq(%d): %d\n", (irq), (level)); \
pic_set_irq_new((intctl), (irq),(level));} while (0)
#else #else
#define SER_DPRINTF(fmt, args...) #define SER_DPRINTF(fmt, args...)
#endif #endif
@ -97,6 +98,7 @@ typedef struct ChannelState {
uint8_t rx, tx, wregs[16], rregs[16]; uint8_t rx, tx, wregs[16], rregs[16];
SERIOQueue queue; SERIOQueue queue;
CharDriverState *chr; CharDriverState *chr;
void *intctl;
} ChannelState; } ChannelState;
struct SerialState { struct SerialState {
@ -164,7 +166,7 @@ static void slavio_serial_update_irq(ChannelState *s)
irq = slavio_serial_update_irq_chn(s); irq = slavio_serial_update_irq_chn(s);
irq |= slavio_serial_update_irq_chn(s->otherchn); irq |= slavio_serial_update_irq_chn(s->otherchn);
pic_set_irq(s->irq, irq); pic_set_irq_new(s->intctl, s->irq, irq);
} }
static void slavio_serial_reset_chn(ChannelState *s) static void slavio_serial_reset_chn(ChannelState *s)
@ -545,7 +547,8 @@ static int slavio_serial_load(QEMUFile *f, void *opaque, int version_id)
} }
SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2) SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1,
CharDriverState *chr2, void *intctl)
{ {
int slavio_serial_io_memory, i; int slavio_serial_io_memory, i;
SerialState *s; SerialState *s;
@ -564,6 +567,7 @@ SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDr
s->chn[i].irq = irq; s->chn[i].irq = irq;
s->chn[i].chn = 1 - i; s->chn[i].chn = 1 - i;
s->chn[i].type = ser; s->chn[i].type = ser;
s->chn[i].intctl = intctl;
if (s->chn[i].chr) { if (s->chn[i].chr) {
qemu_chr_add_handlers(s->chn[i].chr, serial_can_receive, qemu_chr_add_handlers(s->chn[i].chr, serial_can_receive,
serial_receive1, serial_event, &s->chn[i]); serial_receive1, serial_event, &s->chn[i]);
@ -661,7 +665,7 @@ static void sunmouse_event(void *opaque,
put_queue(s, 0); put_queue(s, 0);
} }
void slavio_serial_ms_kbd_init(int base, int irq) void slavio_serial_ms_kbd_init(int base, int irq, void *intctl)
{ {
int slavio_serial_io_memory, i; int slavio_serial_io_memory, i;
SerialState *s; SerialState *s;
@ -673,6 +677,7 @@ void slavio_serial_ms_kbd_init(int base, int irq)
s->chn[i].irq = irq; s->chn[i].irq = irq;
s->chn[i].chn = 1 - i; s->chn[i].chn = 1 - i;
s->chn[i].chr = NULL; s->chn[i].chr = NULL;
s->chn[i].intctl = intctl;
} }
s->chn[0].otherchn = &s->chn[1]; s->chn[0].otherchn = &s->chn[1];
s->chn[1].otherchn = &s->chn[0]; s->chn[1].otherchn = &s->chn[0];

12
hw/slavio_timer.c
View File

@ -28,6 +28,9 @@
#ifdef DEBUG_TIMER #ifdef DEBUG_TIMER
#define DPRINTF(fmt, args...) \ #define DPRINTF(fmt, args...) \
do { printf("TIMER: " fmt , ##args); } while (0) do { printf("TIMER: " fmt , ##args); } while (0)
#define pic_set_irq_new(intctl, irq, level) \
do { printf("TIMER: set_irq(%d): %d\n", (irq), (level)); \
pic_set_irq_new((intctl), (irq),(level));} while (0)
#else #else
#define DPRINTF(fmt, args...) #define DPRINTF(fmt, args...)
#endif #endif
@ -57,6 +60,7 @@ typedef struct SLAVIO_TIMERState {
int reached, stopped; int reached, stopped;
int mode; // 0 = processor, 1 = user, 2 = system int mode; // 0 = processor, 1 = user, 2 = system
unsigned int cpu; unsigned int cpu;
void *intctl;
} SLAVIO_TIMERState; } SLAVIO_TIMERState;
#define TIMER_MAXADDR 0x1f #define TIMER_MAXADDR 0x1f
@ -103,7 +107,7 @@ static void slavio_timer_get_out(SLAVIO_TIMERState *s)
DPRINTF("irq %d limit %d reached %d d %" PRId64 " count %d s->c %x diff %" PRId64 " stopped %d mode %d\n", s->irq, limit, s->reached?1:0, (ticks-s->count_load_time), count, s->count, s->expire_time - ticks, s->stopped, s->mode); DPRINTF("irq %d limit %d reached %d d %" PRId64 " count %d s->c %x diff %" PRId64 " stopped %d mode %d\n", s->irq, limit, s->reached?1:0, (ticks-s->count_load_time), count, s->count, s->expire_time - ticks, s->stopped, s->mode);
if (s->mode != 1) if (s->mode != 1)
pic_set_irq_cpu(s->irq, out, s->cpu); pic_set_irq_cpu(s->intctl, s->irq, out, s->cpu);
} }
// timer callback // timer callback
@ -130,7 +134,7 @@ static uint32_t slavio_timer_mem_readl(void *opaque, target_phys_addr_t addr)
// part of counter (user mode) // part of counter (user mode)
if (s->mode != 1) { if (s->mode != 1) {
// clear irq // clear irq
pic_set_irq_cpu(s->irq, 0, s->cpu); pic_set_irq_cpu(s->intctl, s->irq, 0, s->cpu);
s->reached = 0; s->reached = 0;
return s->limit; return s->limit;
} }
@ -265,7 +269,8 @@ static void slavio_timer_reset(void *opaque)
slavio_timer_get_out(s); slavio_timer_get_out(s);
} }
void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu) void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu,
void *intctl)
{ {
int slavio_timer_io_memory; int slavio_timer_io_memory;
SLAVIO_TIMERState *s; SLAVIO_TIMERState *s;
@ -277,6 +282,7 @@ void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu)
s->mode = mode; s->mode = mode;
s->cpu = cpu; s->cpu = cpu;
s->irq_timer = qemu_new_timer(vm_clock, slavio_timer_irq, s); s->irq_timer = qemu_new_timer(vm_clock, slavio_timer_irq, s);
s->intctl = intctl;
slavio_timer_io_memory = cpu_register_io_memory(0, slavio_timer_mem_read, slavio_timer_io_memory = cpu_register_io_memory(0, slavio_timer_mem_read,
slavio_timer_mem_write, s); slavio_timer_mem_write, s);

24
hw/sun4m.c
View File

@ -184,17 +184,7 @@ void irq_info()
void pic_set_irq(int irq, int level) void pic_set_irq(int irq, int level)
{ {
slavio_pic_set_irq(slavio_intctl, irq, level); pic_set_irq_new(slavio_intctl, irq, level);
}
void pic_set_irq_new(void *opaque, int irq, int level)
{
pic_set_irq(irq, level);
}
void pic_set_irq_cpu(int irq, int level, unsigned int cpu)
{
slavio_pic_set_irq_cpu(slavio_intctl, irq, level, cpu);
} }
static void *slavio_misc; static void *slavio_misc;
@ -261,15 +251,16 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
nvram = m48t59_init(0, hwdef->nvram_base, 0, hwdef->nvram_size, 8); nvram = m48t59_init(0, hwdef->nvram_base, 0, hwdef->nvram_size, 8);
for (i = 0; i < MAX_CPUS; i++) { for (i = 0; i < MAX_CPUS; i++) {
slavio_timer_init(hwdef->counter_base + i * TARGET_PAGE_SIZE, slavio_timer_init(hwdef->counter_base + i * TARGET_PAGE_SIZE,
hwdef->clock_irq, 0, i); hwdef->clock_irq, 0, i, slavio_intctl);
} }
slavio_timer_init(hwdef->counter_base + 0x10000, hwdef->clock1_irq, 2, slavio_timer_init(hwdef->counter_base + 0x10000, hwdef->clock1_irq, 2,
(unsigned int)-1); (unsigned int)-1, slavio_intctl);
slavio_serial_ms_kbd_init(hwdef->ms_kb_base, hwdef->ms_kb_irq); slavio_serial_ms_kbd_init(hwdef->ms_kb_base, hwdef->ms_kb_irq,
slavio_intctl);
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device // Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
slavio_serial_init(hwdef->serial_base, hwdef->ser_irq, slavio_serial_init(hwdef->serial_base, hwdef->ser_irq,
serial_hds[1], serial_hds[0]); serial_hds[1], serial_hds[0], slavio_intctl);
fdctrl_init(hwdef->fd_irq, 0, 1, hwdef->fd_base, fd_table); fdctrl_init(hwdef->fd_irq, 0, 1, hwdef->fd_base, fd_table);
main_esp = esp_init(bs_table, hwdef->esp_base, dma); main_esp = esp_init(bs_table, hwdef->esp_base, dma);
@ -279,7 +270,8 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
} }
} }
slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->me_irq); slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->me_irq,
slavio_intctl);
cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl);
sparc32_dma_set_reset_data(dma, main_esp, main_lance); sparc32_dma_set_reset_data(dma, main_esp, main_lance);
} }

12
vl.h
View File

@ -1144,7 +1144,6 @@ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
/* sun4m.c */ /* sun4m.c */
extern QEMUMachine ss5_machine, ss10_machine; extern QEMUMachine ss5_machine, ss10_machine;
void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
/* iommu.c */ /* iommu.c */
void *iommu_init(uint32_t addr); void *iommu_init(uint32_t addr);
@ -1169,6 +1168,7 @@ void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
unsigned long vram_offset, int vram_size, int width, int height); unsigned long vram_offset, int vram_size, int width, int height);
/* slavio_intctl.c */ /* slavio_intctl.c */
void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
void *slavio_intctl_init(uint32_t addr, uint32_t addrg, void *slavio_intctl_init(uint32_t addr, uint32_t addrg,
const uint32_t *intbit_to_level); const uint32_t *intbit_to_level);
void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
@ -1185,14 +1185,16 @@ int load_aout(const char *filename, uint8_t *addr);
int load_uboot(const char *filename, target_ulong *ep, int *is_linux); int load_uboot(const char *filename, target_ulong *ep, int *is_linux);
/* slavio_timer.c */ /* slavio_timer.c */
void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu,
void *intctl);
/* slavio_serial.c */ /* slavio_serial.c */
SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1,
void slavio_serial_ms_kbd_init(int base, int irq); CharDriverState *chr2, void *intctl);
void slavio_serial_ms_kbd_init(int base, int irq, void *intctl);
/* slavio_misc.c */ /* slavio_misc.c */
void *slavio_misc_init(uint32_t base, int irq); void *slavio_misc_init(uint32_t base, int irq, void *intctl);
void slavio_set_power_fail(void *opaque, int power_failing); void slavio_set_power_fail(void *opaque, int power_failing);
/* esp.c */ /* esp.c */