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pxa2xx_pcmcia.c: convert attribute memory space to memory API

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Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Benoît Canet 2011-10-30 14:50:13 +01:00 committed by Avi Kivity
parent 354a8c0676
commit 4beeaa718c
1 changed files with 14 additions and 17 deletions
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31
hw/pxa2xx_pcmcia.c
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@ -11,10 +11,12 @@
#include "pcmcia.h" #include "pcmcia.h"
#include "pxa.h" #include "pxa.h"
struct PXA2xxPCMCIAState { struct PXA2xxPCMCIAState {
PCMCIASocket slot; PCMCIASocket slot;
PCMCIACardState *card; PCMCIACardState *card;
MemoryRegion common_iomem; MemoryRegion common_iomem;
MemoryRegion attr_iomem;
qemu_irq irq; qemu_irq irq;
qemu_irq cd_irq; qemu_irq cd_irq;
@ -42,8 +44,8 @@ static void pxa2xx_pcmcia_common_write(void *opaque, target_phys_addr_t offset,
} }
} }
static uint32_t pxa2xx_pcmcia_attr_read(void *opaque, static uint64_t pxa2xx_pcmcia_attr_read(void *opaque,
target_phys_addr_t offset) target_phys_addr_t offset, unsigned size)
{ {
PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
@ -54,8 +56,8 @@ static uint32_t pxa2xx_pcmcia_attr_read(void *opaque,
return 0; return 0;
} }
static void pxa2xx_pcmcia_attr_write(void *opaque, static void pxa2xx_pcmcia_attr_write(void *opaque, target_phys_addr_t offset,
target_phys_addr_t offset, uint32_t value) uint64_t value, unsigned size)
{ {
PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
@ -92,16 +94,10 @@ static const MemoryRegionOps pxa2xx_pcmcia_common_ops = {
.endianness = DEVICE_NATIVE_ENDIAN .endianness = DEVICE_NATIVE_ENDIAN
}; };
static CPUReadMemoryFunc * const pxa2xx_pcmcia_attr_readfn[] = { static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = {
pxa2xx_pcmcia_attr_read, .read = pxa2xx_pcmcia_attr_read,
pxa2xx_pcmcia_attr_read, .write = pxa2xx_pcmcia_attr_write,
pxa2xx_pcmcia_attr_read, .endianness = DEVICE_NATIVE_ENDIAN
};
static CPUWriteMemoryFunc * const pxa2xx_pcmcia_attr_writefn[] = {
pxa2xx_pcmcia_attr_write,
pxa2xx_pcmcia_attr_write,
pxa2xx_pcmcia_attr_write,
}; };
static CPUReadMemoryFunc * const pxa2xx_pcmcia_io_readfn[] = { static CPUReadMemoryFunc * const pxa2xx_pcmcia_io_readfn[] = {
@ -142,9 +138,10 @@ PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
/* Then next 64 MB is reserved */ /* Then next 64 MB is reserved */
/* Socket Attribute Memory Space */ /* Socket Attribute Memory Space */
iomemtype = cpu_register_io_memory(pxa2xx_pcmcia_attr_readfn, memory_region_init_io(&s->attr_iomem, &pxa2xx_pcmcia_attr_ops, s,
pxa2xx_pcmcia_attr_writefn, s, DEVICE_NATIVE_ENDIAN); "pxa2xx-pcmcia-attribute", 0x04000000);
cpu_register_physical_memory(base | 0x08000000, 0x04000000, iomemtype); memory_region_add_subregion(sysmem, base | 0x08000000,
&s->attr_iomem);
/* Socket Common Memory Space */ /* Socket Common Memory Space */
memory_region_init_io(&s->common_iomem, &pxa2xx_pcmcia_common_ops, s, memory_region_init_io(&s->common_iomem, &pxa2xx_pcmcia_common_ops, s,