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ETRAX-TIMER: qdevify.

Browse Source 
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Edgar E. Iglesias 2009-05-16 02:08:16 +02:00
parent 84ceea5736
commit 3b1fd90ed1
4 changed files with 38 additions and 39 deletions
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6
hw/axis_dev88.c
View File

@ -316,12 +316,12 @@ void axisdev88_init (ram_addr_t ram_size,
} }
/* 2 timers. */ /* 2 timers. */
etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3001e000); sysbus_create_varargs("etraxfs,timer", 0x3001e000, irq[0x1b], nmi[1], NULL);
etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3005e000); sysbus_create_varargs("etraxfs,timer", 0x3005e000, irq[0x1b], nmi[1], NULL);
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000, sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000,
irq[0x14 + i]); irq[0x14 + i]);
} }
if (kernel_filename) { if (kernel_filename) {

5
hw/etraxfs.c
View File

@ -26,6 +26,7 @@
#include "boards.h" #include "boards.h"
#include "sysemu.h" #include "sysemu.h"
#include "net.h" #include "net.h"
#include "flash.h"
#include "etraxfs.h" #include "etraxfs.h"
#define FLASH_SIZE 0x2000000 #define FLASH_SIZE 0x2000000
@ -106,8 +107,8 @@ void bareetraxfs_init (ram_addr_t ram_size,
} }
/* 2 timers. */ /* 2 timers. */
etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3001e000); sysbus_create_varargs("etraxfs,timer", 0x3001e000, irq[0x1b], nmi[1], NULL);
etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3005e000); sysbus_create_varargs("etraxfs,timer", 0x3005e000, irq[0x1b], nmi[1], NULL);
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000, sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000,

4
hw/etraxfs.h
View File

@ -25,9 +25,5 @@
#include "etraxfs_dma.h" #include "etraxfs_dma.h"
qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base); qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base);
void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, qemu_irq *nmi,
target_phys_addr_t base);
void *etraxfs_eth_init(NICInfo *nd, CPUState *env, void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
qemu_irq *irq, target_phys_addr_t base, int phyaddr); qemu_irq *irq, target_phys_addr_t base, int phyaddr);
//void etraxfs_ser_init(CPUState *env, qemu_irq *irq, CharDriverState *chr,
// target_phys_addr_t base);

62
hw/etraxfs_timer.c
View File

@ -21,12 +21,9 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE. * THE SOFTWARE.
*/ */
#include <stdio.h> #include "sysbus.h"
#include <sys/time.h>
#include "hw.h"
#include "sysemu.h" #include "sysemu.h"
#include "qemu-timer.h" #include "qemu-timer.h"
#include "etraxfs.h"
#define D(x) #define D(x)
@ -44,10 +41,10 @@
#define R_INTR 0x50 #define R_INTR 0x50
#define R_MASKED_INTR 0x54 #define R_MASKED_INTR 0x54
struct fs_timer_t { struct etrax_timer {
CPUState *env; SysBusDevice busdev;
qemu_irq *irq; qemu_irq irq;
qemu_irq *nmi; qemu_irq nmi;
QEMUBH *bh_t0; QEMUBH *bh_t0;
QEMUBH *bh_t1; QEMUBH *bh_t1;
@ -78,7 +75,7 @@ struct fs_timer_t {
static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
{ {
struct fs_timer_t *t = opaque; struct etrax_timer *t = opaque;
uint32_t r = 0; uint32_t r = 0;
switch (addr) { switch (addr) {
@ -105,7 +102,7 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
} }
#define TIMER_SLOWDOWN 1 #define TIMER_SLOWDOWN 1
static void update_ctrl(struct fs_timer_t *t, int tnum) static void update_ctrl(struct etrax_timer *t, int tnum)
{ {
unsigned int op; unsigned int op;
unsigned int freq; unsigned int freq;
@ -172,38 +169,38 @@ static void update_ctrl(struct fs_timer_t *t, int tnum)
} }
} }
static void timer_update_irq(struct fs_timer_t *t) static void timer_update_irq(struct etrax_timer *t)
{ {
t->r_intr &= ~(t->rw_ack_intr); t->r_intr &= ~(t->rw_ack_intr);
t->r_masked_intr = t->r_intr & t->rw_intr_mask; t->r_masked_intr = t->r_intr & t->rw_intr_mask;
D(printf("%s: masked_intr=%x\n", __func__, t->r_masked_intr)); D(printf("%s: masked_intr=%x\n", __func__, t->r_masked_intr));
qemu_set_irq(t->irq[0], !!t->r_masked_intr); qemu_set_irq(t->irq, !!t->r_masked_intr);
} }
static void timer0_hit(void *opaque) static void timer0_hit(void *opaque)
{ {
struct fs_timer_t *t = opaque; struct etrax_timer *t = opaque;
t->r_intr |= 1; t->r_intr |= 1;
timer_update_irq(t); timer_update_irq(t);
} }
static void timer1_hit(void *opaque) static void timer1_hit(void *opaque)
{ {
struct fs_timer_t *t = opaque; struct etrax_timer *t = opaque;
t->r_intr |= 2; t->r_intr |= 2;
timer_update_irq(t); timer_update_irq(t);
} }
static void watchdog_hit(void *opaque) static void watchdog_hit(void *opaque)
{ {
struct fs_timer_t *t = opaque; struct etrax_timer *t = opaque;
if (t->wd_hits == 0) { if (t->wd_hits == 0) {
/* real hw gives a single tick before reseting but we are /* real hw gives a single tick before reseting but we are
a bit friendlier to compensate for our slower execution. */ a bit friendlier to compensate for our slower execution. */
ptimer_set_count(t->ptimer_wd, 10); ptimer_set_count(t->ptimer_wd, 10);
ptimer_run(t->ptimer_wd, 1); ptimer_run(t->ptimer_wd, 1);
qemu_irq_raise(t->nmi[0]); qemu_irq_raise(t->nmi);
} }
else else
qemu_system_reset_request(); qemu_system_reset_request();
@ -211,7 +208,7 @@ static void watchdog_hit(void *opaque)
t->wd_hits++; t->wd_hits++;
} }
static inline void timer_watchdog_update(struct fs_timer_t *t, uint32_t value) static inline void timer_watchdog_update(struct etrax_timer *t, uint32_t value)
{ {
unsigned int wd_en = t->rw_wd_ctrl & (1 << 8); unsigned int wd_en = t->rw_wd_ctrl & (1 << 8);
unsigned int wd_key = t->rw_wd_ctrl >> 9; unsigned int wd_key = t->rw_wd_ctrl >> 9;
@ -230,7 +227,7 @@ static inline void timer_watchdog_update(struct fs_timer_t *t, uint32_t value)
wd_en, new_key, wd_key, new_cmd, wd_cnt)); wd_en, new_key, wd_key, new_cmd, wd_cnt));
if (t->wd_hits) if (t->wd_hits)
qemu_irq_lower(t->nmi[0]); qemu_irq_lower(t->nmi);
t->wd_hits = 0; t->wd_hits = 0;
@ -249,7 +246,7 @@ static inline void timer_watchdog_update(struct fs_timer_t *t, uint32_t value)
static void static void
timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value) timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{ {
struct fs_timer_t *t = opaque; struct etrax_timer *t = opaque;
switch (addr) switch (addr)
{ {
@ -301,7 +298,7 @@ static CPUWriteMemoryFunc *timer_write[] = {
static void etraxfs_timer_reset(void *opaque) static void etraxfs_timer_reset(void *opaque)
{ {
struct fs_timer_t *t = opaque; struct etrax_timer *t = opaque;
ptimer_stop(t->ptimer_t0); ptimer_stop(t->ptimer_t0);
ptimer_stop(t->ptimer_t1); ptimer_stop(t->ptimer_t1);
@ -309,29 +306,34 @@ static void etraxfs_timer_reset(void *opaque)
t->rw_wd_ctrl = 0; t->rw_wd_ctrl = 0;
t->r_intr = 0; t->r_intr = 0;
t->rw_intr_mask = 0; t->rw_intr_mask = 0;
qemu_irq_lower(t->irq[0]); qemu_irq_lower(t->irq);
} }
void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, qemu_irq *nmi, static void etraxfs_timer_init(SysBusDevice *dev)
target_phys_addr_t base)
{ {
static struct fs_timer_t *t; struct etrax_timer *t = FROM_SYSBUS(typeof (*t), dev);
int timer_regs; int timer_regs;
t = qemu_mallocz(sizeof *t);
t->bh_t0 = qemu_bh_new(timer0_hit, t); t->bh_t0 = qemu_bh_new(timer0_hit, t);
t->bh_t1 = qemu_bh_new(timer1_hit, t); t->bh_t1 = qemu_bh_new(timer1_hit, t);
t->bh_wd = qemu_bh_new(watchdog_hit, t); t->bh_wd = qemu_bh_new(watchdog_hit, t);
t->ptimer_t0 = ptimer_init(t->bh_t0); t->ptimer_t0 = ptimer_init(t->bh_t0);
t->ptimer_t1 = ptimer_init(t->bh_t1); t->ptimer_t1 = ptimer_init(t->bh_t1);
t->ptimer_wd = ptimer_init(t->bh_wd); t->ptimer_wd = ptimer_init(t->bh_wd);
t->irq = irqs;
t->nmi = nmi; sysbus_init_irq(dev, &t->irq);
t->env = env; sysbus_init_irq(dev, &t->nmi);
timer_regs = cpu_register_io_memory(0, timer_read, timer_write, t); timer_regs = cpu_register_io_memory(0, timer_read, timer_write, t);
cpu_register_physical_memory (base, 0x5c, timer_regs); sysbus_init_mmio(dev, 0x5c, timer_regs);
qemu_register_reset(etraxfs_timer_reset, t); qemu_register_reset(etraxfs_timer_reset, t);
} }
static void etraxfs_timer_register(void)
{
sysbus_register_dev("etraxfs,timer", sizeof (struct etrax_timer),
etraxfs_timer_init);
}
device_init(etraxfs_timer_register)