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ppc4xx_devs: Return PowerPCCPU from ppc4xx_init()

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Prepares for passing PowerPCCPU to ppc_booke_timers_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2012-12-01 04:47:33 +01:00
parent ee0c98e650
commit 2f9859fb49
3 changed files with 13 additions and 9 deletions
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8
hw/ppc405_uc.c
View File

@ -2111,12 +2111,14 @@ CPUPPCState *ppc405cr_init(MemoryRegion *address_space_mem,
{ {
clk_setup_t clk_setup[PPC405CR_CLK_NB]; clk_setup_t clk_setup[PPC405CR_CLK_NB];
qemu_irq dma_irqs[4]; qemu_irq dma_irqs[4];
PowerPCCPU *cpu;
CPUPPCState *env; CPUPPCState *env;
qemu_irq *pic, *irqs; qemu_irq *pic, *irqs;
memset(clk_setup, 0, sizeof(clk_setup)); memset(clk_setup, 0, sizeof(clk_setup));
env = ppc4xx_init("405cr", &clk_setup[PPC405CR_CPU_CLK], cpu = ppc4xx_init("405cr", &clk_setup[PPC405CR_CPU_CLK],
&clk_setup[PPC405CR_TMR_CLK], sysclk); &clk_setup[PPC405CR_TMR_CLK], sysclk);
env = &cpu->env;
/* Memory mapped devices registers */ /* Memory mapped devices registers */
/* PLB arbitrer */ /* PLB arbitrer */
ppc4xx_plb_init(env); ppc4xx_plb_init(env);
@ -2460,13 +2462,15 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem,
{ {
clk_setup_t clk_setup[PPC405EP_CLK_NB], tlb_clk_setup; clk_setup_t clk_setup[PPC405EP_CLK_NB], tlb_clk_setup;
qemu_irq dma_irqs[4], gpt_irqs[5], mal_irqs[4]; qemu_irq dma_irqs[4], gpt_irqs[5], mal_irqs[4];
PowerPCCPU *cpu;
CPUPPCState *env; CPUPPCState *env;
qemu_irq *pic, *irqs; qemu_irq *pic, *irqs;
memset(clk_setup, 0, sizeof(clk_setup)); memset(clk_setup, 0, sizeof(clk_setup));
/* init CPUs */ /* init CPUs */
env = ppc4xx_init("405ep", &clk_setup[PPC405EP_CPU_CLK], cpu = ppc4xx_init("405ep", &clk_setup[PPC405EP_CPU_CLK],
&tlb_clk_setup, sysclk); &tlb_clk_setup, sysclk);
env = &cpu->env;
clk_setup[PPC405EP_CPU_CLK].cb = tlb_clk_setup.cb; clk_setup[PPC405EP_CPU_CLK].cb = tlb_clk_setup.cb;
clk_setup[PPC405EP_CPU_CLK].opaque = tlb_clk_setup.opaque; clk_setup[PPC405EP_CPU_CLK].opaque = tlb_clk_setup.opaque;
/* Internal devices init */ /* Internal devices init */

6
hw/ppc4xx.h
View File

@ -28,9 +28,9 @@
#include "pci.h" #include "pci.h"
/* PowerPC 4xx core initialization */ /* PowerPC 4xx core initialization */
CPUPPCState *ppc4xx_init (const char *cpu_model, PowerPCCPU *ppc4xx_init(const char *cpu_model,
clk_setup_t *cpu_clk, clk_setup_t *tb_clk, clk_setup_t *cpu_clk, clk_setup_t *tb_clk,
uint32_t sysclk); uint32_t sysclk);
/* PowerPC 4xx universal interrupt controller */ /* PowerPC 4xx universal interrupt controller */
enum { enum {

8
hw/ppc4xx_devs.c
View File

@ -47,9 +47,9 @@ static void ppc4xx_reset(void *opaque)
/*****************************************************************************/ /*****************************************************************************/
/* Generic PowerPC 4xx processor instantiation */ /* Generic PowerPC 4xx processor instantiation */
CPUPPCState *ppc4xx_init (const char *cpu_model, PowerPCCPU *ppc4xx_init(const char *cpu_model,
clk_setup_t *cpu_clk, clk_setup_t *tb_clk, clk_setup_t *cpu_clk, clk_setup_t *tb_clk,
uint32_t sysclk) uint32_t sysclk)
{ {
PowerPCCPU *cpu; PowerPCCPU *cpu;
CPUPPCState *env; CPUPPCState *env;
@ -72,7 +72,7 @@ CPUPPCState *ppc4xx_init (const char *cpu_model,
/* Register qemu callbacks */ /* Register qemu callbacks */
qemu_register_reset(ppc4xx_reset, cpu); qemu_register_reset(ppc4xx_reset, cpu);
return env; return cpu;
} }
/*****************************************************************************/ /*****************************************************************************/