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bonito: convert north bridge pci config to memory API
Signed-off-by: Benoît Canet <benoit.canet@gmail.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
parent
89200979aa
commit
183e1d40db
37
hw/bonito.c
37
hw/bonito.c
@ -203,10 +203,6 @@ typedef struct PCIBonitoState
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/* Bonito registers */
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/* Bonito registers */
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MemoryRegion iomem;
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MemoryRegion iomem;
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target_phys_addr_t bonito_pciconf_start;
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target_phys_addr_t bonito_pciconf_length;
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int bonito_pciconf_handle;
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target_phys_addr_t bonito_spciconf_start;
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target_phys_addr_t bonito_spciconf_start;
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target_phys_addr_t bonito_spciconf_length;
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target_phys_addr_t bonito_spciconf_length;
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int bonito_spciconf_handle;
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int bonito_spciconf_handle;
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@ -322,7 +318,7 @@ static const MemoryRegionOps bonito_ops = {
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};
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};
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static void bonito_pciconf_writel(void *opaque, target_phys_addr_t addr,
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static void bonito_pciconf_writel(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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uint64_t val, unsigned size)
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{
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{
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PCIBonitoState *s = opaque;
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PCIBonitoState *s = opaque;
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@ -330,7 +326,8 @@ static void bonito_pciconf_writel(void *opaque, target_phys_addr_t addr,
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s->dev.config_write(&s->dev, addr, val, 4);
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s->dev.config_write(&s->dev, addr, val, 4);
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}
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}
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static uint32_t bonito_pciconf_readl(void *opaque, target_phys_addr_t addr)
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static uint64_t bonito_pciconf_readl(void *opaque, target_phys_addr_t addr,
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unsigned size)
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{
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{
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PCIBonitoState *s = opaque;
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PCIBonitoState *s = opaque;
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@ -340,16 +337,15 @@ static uint32_t bonito_pciconf_readl(void *opaque, target_phys_addr_t addr)
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}
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}
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/* north bridge PCI configure space. 0x1fe0 0000 - 0x1fe0 00ff */
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/* north bridge PCI configure space. 0x1fe0 0000 - 0x1fe0 00ff */
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static CPUWriteMemoryFunc * const bonito_pciconf_write[] = {
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NULL,
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NULL,
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bonito_pciconf_writel,
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};
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static CPUReadMemoryFunc * const bonito_pciconf_read[] = {
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static const MemoryRegionOps bonito_pciconf_ops = {
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NULL,
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.read = bonito_pciconf_readl,
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NULL,
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.write = bonito_pciconf_writel,
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bonito_pciconf_readl,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.valid = {
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.min_access_size = 4,
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.max_access_size = 4,
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},
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};
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};
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static uint32_t bonito_ldma_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t bonito_ldma_readl(void *opaque, target_phys_addr_t addr)
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@ -700,13 +696,10 @@ static int bonito_initfn(PCIDevice *dev)
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sysbus_mmio_map(sysbus, 0, BONITO_INTERNAL_REG_BASE);
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sysbus_mmio_map(sysbus, 0, BONITO_INTERNAL_REG_BASE);
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/* set the north bridge pci configure mapping */
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/* set the north bridge pci configure mapping */
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s->bonito_pciconf_handle = cpu_register_io_memory(bonito_pciconf_read,
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memory_region_init_io(&s->pcihost->conf_mem, &bonito_pciconf_ops, s,
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bonito_pciconf_write, s,
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"north-bridge-pci-config", BONITO_PCICONFIG_SIZE);
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DEVICE_NATIVE_ENDIAN);
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sysbus_init_mmio_region(sysbus, &s->pcihost->conf_mem);
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s->bonito_pciconf_start = BONITO_PCICONFIG_BASE;
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sysbus_mmio_map(sysbus, 1, BONITO_PCICONFIG_BASE);
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s->bonito_pciconf_length = BONITO_PCICONFIG_SIZE;
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cpu_register_physical_memory(s->bonito_pciconf_start, s->bonito_pciconf_length,
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s->bonito_pciconf_handle);
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/* set the south bridge pci configure mapping */
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/* set the south bridge pci configure mapping */
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s->bonito_spciconf_handle = cpu_register_io_memory(bonito_spciconf_read,
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s->bonito_spciconf_handle = cpu_register_io_memory(bonito_spciconf_read,
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