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target-ppc: kill a few warnings
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5941 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -21,6 +21,8 @@
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* 4xx SoCs, such as the 440EP. */
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* 4xx SoCs, such as the 440EP. */
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#include "hw.h"
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#include "hw.h"
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#include "ppc.h"
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#include "ppc4xx.h"
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typedef target_phys_addr_t pci_addr_t;
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typedef target_phys_addr_t pci_addr_t;
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#include "pci.h"
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#include "pci.h"
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@ -3024,7 +3024,7 @@ GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, PPC_64B)
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#endif
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#endif
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/*** Integer load and store with byte reverse ***/
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/*** Integer load and store with byte reverse ***/
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/* lhbrx */
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/* lhbrx */
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void always_inline gen_qemu_ld16ur(TCGv t0, TCGv t1, int flags)
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static void always_inline gen_qemu_ld16ur(TCGv t0, TCGv t1, int flags)
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{
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{
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TCGv_i32 temp = tcg_temp_new_i32();
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TCGv_i32 temp = tcg_temp_new_i32();
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gen_qemu_ld16u(t0, t1, flags);
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gen_qemu_ld16u(t0, t1, flags);
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@ -3036,7 +3036,7 @@ void always_inline gen_qemu_ld16ur(TCGv t0, TCGv t1, int flags)
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GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER);
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GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER);
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/* lwbrx */
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/* lwbrx */
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void always_inline gen_qemu_ld32ur(TCGv t0, TCGv t1, int flags)
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static void always_inline gen_qemu_ld32ur(TCGv t0, TCGv t1, int flags)
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{
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{
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TCGv_i32 temp = tcg_temp_new_i32();
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TCGv_i32 temp = tcg_temp_new_i32();
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gen_qemu_ld32u(t0, t1, flags);
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gen_qemu_ld32u(t0, t1, flags);
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@ -3048,7 +3048,7 @@ void always_inline gen_qemu_ld32ur(TCGv t0, TCGv t1, int flags)
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GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
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GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
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/* sthbrx */
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/* sthbrx */
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void always_inline gen_qemu_st16r(TCGv t0, TCGv t1, int flags)
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static void always_inline gen_qemu_st16r(TCGv t0, TCGv t1, int flags)
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{
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{
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TCGv_i32 temp = tcg_temp_new_i32();
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TCGv_i32 temp = tcg_temp_new_i32();
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TCGv t2 = tcg_temp_new();
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TCGv t2 = tcg_temp_new();
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@ -3063,7 +3063,7 @@ void always_inline gen_qemu_st16r(TCGv t0, TCGv t1, int flags)
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GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER);
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GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER);
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/* stwbrx */
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/* stwbrx */
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void always_inline gen_qemu_st32r(TCGv t0, TCGv t1, int flags)
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static void always_inline gen_qemu_st32r(TCGv t0, TCGv t1, int flags)
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{
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{
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TCGv_i32 temp = tcg_temp_new_i32();
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TCGv_i32 temp = tcg_temp_new_i32();
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TCGv t2 = tcg_temp_new();
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TCGv t2 = tcg_temp_new();
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