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target-arm: Don't decode RFE or SRS on M profile cores

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M profile cores do not have the RFE or SRS instructions, so
correctly UNDEF these insn patterns on those cores.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2013-03-05 00:31:17 +00:00
parent 81465888c5
commit 00115976bb
1 changed files with 3 additions and 2 deletions
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5
target-arm/translate.c
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@ -8180,9 +8180,10 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
} else { } else {
/* Load/store multiple, RFE, SRS. */ /* Load/store multiple, RFE, SRS. */
if (((insn >> 23) & 1) == ((insn >> 24) & 1)) { if (((insn >> 23) & 1) == ((insn >> 24) & 1)) {
/* Not available in user mode. */ /* RFE, SRS: not available in user mode or on M profile */
if (IS_USER(s)) if (IS_USER(s) || IS_M(env)) {
goto illegal_op; goto illegal_op;
}
if (insn & (1 << 20)) { if (insn & (1 << 20)) {
/* rfe */ /* rfe */
addr = load_reg(s, rn); addr = load_reg(s, rn);