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https://git.proxmox.com/git/pve-qemu
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903a63402e
Includes fixes for VirtIO-net, ARM and x86(_64) emulation, CVEs to harden NBD server against malicious clients, as well as a few others (VNC, physmem, Intel IOMMU, ...). Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
58 lines
2.4 KiB
Diff
58 lines
2.4 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Peter Maydell <peter.maydell@linaro.org>
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Date: Mon, 22 Jul 2024 18:29:54 +0100
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Subject: [PATCH] target/arm: Don't assert for 128-bit tile accesses when SVL
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is 128
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For an instruction which accesses a 128-bit element tile when
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the SVL is also 128 (for example MOV z0.Q, p0/M, ZA0H.Q[w0,0]),
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we will assert in get_tile_rowcol():
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qemu-system-aarch64: ../../tcg/tcg-op.c:926: tcg_gen_deposit_z_i32: Assertion `len > 0' failed.
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This happens because we calculate
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len = ctz32(streaming_vec_reg_size(s)) - esz;$
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but if the SVL and the element size are the same len is 0, and
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the deposit operation asserts.
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In this case the ZA storage contains exactly one 128 bit
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element ZA tile, and the horizontal or vertical slice is just
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that tile. This means that regardless of the index value in
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the Ws register, we always access that tile. (In pseudocode terms,
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we calculate (index + offset) MOD 1, which is 0.)
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Special case the len == 0 case to avoid hitting the assertion
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in tcg_gen_deposit_z_i32().
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Cc: qemu-stable@nongnu.org
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20240722172957.1041231-2-peter.maydell@linaro.org
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(cherry picked from commit 56f1c0db928aae0b83fd91c89ddb226b137e2b21)
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Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
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---
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target/arm/tcg/translate-sme.c | 10 +++++++++-
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1 file changed, 9 insertions(+), 1 deletion(-)
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diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c
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index 185a8a917b..a50a419af2 100644
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--- a/target/arm/tcg/translate-sme.c
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+++ b/target/arm/tcg/translate-sme.c
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@@ -49,7 +49,15 @@ static TCGv_ptr get_tile_rowcol(DisasContext *s, int esz, int rs,
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/* Prepare a power-of-two modulo via extraction of @len bits. */
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len = ctz32(streaming_vec_reg_size(s)) - esz;
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- if (vertical) {
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+ if (!len) {
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+ /*
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+ * SVL is 128 and the element size is 128. There is exactly
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+ * one 128x128 tile in the ZA storage, and so we calculate
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+ * (Rs + imm) MOD 1, which is always 0. We need to special case
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+ * this because TCG doesn't allow deposit ops with len 0.
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+ */
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+ tcg_gen_movi_i32(tmp, 0);
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+ } else if (vertical) {
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/*
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* Compute the byte offset of the index within the tile:
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* (index % (svl / size)) * size
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