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5d3fc48e11
In particular, the i386 patches fix an issue that was newly introduced in 7.2.10 and the LSI patches improve the reentrancy fix. The others also sounded relevant and nice to have. Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
87 lines
2.8 KiB
Diff
87 lines
2.8 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Richard Henderson <richard.henderson@linaro.org>
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Date: Wed, 10 Apr 2024 08:43:57 +0300
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Subject: [PATCH] tcg/optimize: Fix sign_mask for logical right-shift
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The 'sign' computation is attempting to locate the sign bit that has
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been repeated, so that we can test if that bit is known zero. That
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computation can be zero if there are no known sign repetitions.
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Cc: qemu-stable@nongnu.org
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Fixes: 93a967fbb57 ("tcg/optimize: Propagate sign info for shifting")
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2248
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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(cherry picked from commit 2911e9b95f3bb03783ae5ca3e2494dc3b44a9161)
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Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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(Mjt: trivial context fixup in tests/tcg/aarch64/Makefile.target)
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---
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tcg/optimize.c | 2 +-
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tests/tcg/aarch64/Makefile.target | 1 +
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tests/tcg/aarch64/test-2248.c | 28 ++++++++++++++++++++++++++++
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3 files changed, 30 insertions(+), 1 deletion(-)
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create mode 100644 tests/tcg/aarch64/test-2248.c
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diff --git a/tcg/optimize.c b/tcg/optimize.c
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index ae081ab29c..b6f6436c74 100644
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--- a/tcg/optimize.c
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+++ b/tcg/optimize.c
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@@ -1907,7 +1907,7 @@ static bool fold_shift(OptContext *ctx, TCGOp *op)
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* will not reduced the number of input sign repetitions.
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*/
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sign = (s_mask & -s_mask) >> 1;
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- if (!(z_mask & sign)) {
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+ if (sign && !(z_mask & sign)) {
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ctx->s_mask = s_mask;
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}
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break;
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diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
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index 5e4ea7c998..474f61bc30 100644
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--- a/tests/tcg/aarch64/Makefile.target
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+++ b/tests/tcg/aarch64/Makefile.target
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@@ -10,6 +10,7 @@ VPATH += $(AARCH64_SRC)
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# Base architecture tests
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AARCH64_TESTS=fcvt pcalign-a64
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+AARCH64_TESTS += test-2248
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fcvt: LDFLAGS+=-lm
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diff --git a/tests/tcg/aarch64/test-2248.c b/tests/tcg/aarch64/test-2248.c
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new file mode 100644
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index 0000000000..aac2e17836
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--- /dev/null
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+++ b/tests/tcg/aarch64/test-2248.c
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@@ -0,0 +1,28 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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+/* See https://gitlab.com/qemu-project/qemu/-/issues/2248 */
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+
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+#include <assert.h>
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+
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+__attribute__((noinline))
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+long test(long x, long y, long sh)
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+{
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+ long r;
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+ asm("cmp %1, %2\n\t"
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+ "cset x12, lt\n\t"
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+ "and w11, w12, #0xff\n\t"
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+ "cmp w11, #0\n\t"
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+ "csetm x14, ne\n\t"
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+ "lsr x13, x14, %3\n\t"
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+ "sxtb %0, w13"
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+ : "=r"(r)
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+ : "r"(x), "r"(y), "r"(sh)
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+ : "x11", "x12", "x13", "x14");
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+ return r;
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+}
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+
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+int main()
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+{
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+ long r = test(0, 1, 2);
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+ assert(r == -1);
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+ return 0;
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+}
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