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5d3fc48e11
In particular, the i386 patches fix an issue that was newly introduced in 7.2.10 and the LSI patches improve the reentrancy fix. The others also sounded relevant and nice to have. Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
47 lines
2.1 KiB
Diff
47 lines
2.1 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Wed, 10 Apr 2024 08:43:51 +0300
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Subject: [PATCH] target/i386: fix direction of "32-bit MMU" test
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The low bit of MMU indices for x86 TCG indicates whether the processor is
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in 32-bit mode and therefore linear addresses have to be masked to 32 bits.
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However, the index was computed incorrectly, leading to possible conflicts
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in the TLB for any address above 4G.
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Analyzed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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Fixes: b1661801c18 ("target/i386: Fix physical address truncation", 2024-02-28)
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Fixes: 1c15f97b4f1 ("target/i386: Fix physical address truncation" in stable-7.2)
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Cc: qemu-stable@nongnu.org
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2206
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 2cc68629a6fc198f4a972698bdd6477f883aedfb)
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Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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(Mjt: move changes for x86_cpu_mmu_index() to cpu_mmu_index() due to missing
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v8.2.0-1030-gace0c5fe59 "target/i386: Populate CPUClass.mmu_index")
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---
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target/i386/cpu.h | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index 73eee08f3f..326649ca99 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -2201,7 +2201,7 @@ uint64_t cpu_get_tsc(CPUX86State *env);
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static inline int cpu_mmu_index(CPUX86State *env, bool ifetch)
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{
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- int mmu_index_32 = (env->hflags & HF_CS64_MASK) ? 1 : 0;
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+ int mmu_index_32 = (env->hflags & HF_CS64_MASK) ? 0 : 1;
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int mmu_index_base =
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(env->hflags & HF_CPL_MASK) == 3 ? MMU_USER64_IDX :
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!(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX :
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@@ -2228,7 +2228,7 @@ static inline bool is_mmu_index_32(int mmu_index)
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static inline int cpu_mmu_index_kernel(CPUX86State *env)
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{
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- int mmu_index_32 = (env->hflags & HF_LMA_MASK) ? 1 : 0;
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+ int mmu_index_32 = (env->hflags & HF_LMA_MASK) ? 0 : 1;
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int mmu_index_base =
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!(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX :
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((env->hflags & HF_CPL_MASK) < 3 && (env->eflags & AC_MASK)) ? MMU_KNOSMAP64_IDX : MMU_KSMAP64_IDX;
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